Trait embedded_hal_async::spi::SpiDeviceWrite
source · pub trait SpiDeviceWrite<Word: Copy + 'static = u8>: ErrorType {
// Required method
async fn write_transaction(
&mut self,
operations: &[&[Word]]
) -> Result<(), Self::Error>;
// Provided method
async fn write(&mut self, buf: &[Word]) -> Result<(), Self::Error> { ... }
}
Expand description
SPI write-only device trait
SpiDeviceWrite
represents ownership over a single SPI device on a (possibly shared) bus, selected
with a CS (Chip Select) pin.
See (the docs on embedded-hal)embedded_hal::spi for important information on SPI Bus vs Device traits.
See the module-level documentation for important usage information.
Required Methods§
sourceasync fn write_transaction(
&mut self,
operations: &[&[Word]]
) -> Result<(), Self::Error>
async fn write_transaction( &mut self, operations: &[&[Word]] ) -> Result<(), Self::Error>
Perform a write transaction against the device.
- Locks the bus
- Asserts the CS (Chip Select) pin.
- Performs all the operations.
- Flushes the bus.
- Deasserts the CS pin.
- Unlocks the bus.
The locking mechanism is implementation-defined. The only requirement is it must prevent two transactions from executing concurrently against the same bus. Examples of implementations are: critical sections, blocking mutexes, returning an error or panicking if the bus is already busy.
On bus errors the implementation should try to deassert CS. If an error occurs while deasserting CS the bus error should take priority as the return value.
Provided Methods§
sourceasync fn write(&mut self, buf: &[Word]) -> Result<(), Self::Error>
async fn write(&mut self, buf: &[Word]) -> Result<(), Self::Error>
Do a write within a transaction.
This is a convenience method equivalent to device.write_transaction(&mut [buf])
.
See also: SpiDeviceWrite::write_transaction
, SpiBusWrite::write