Struct efr32x12p::lesense::altexconf::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
fn bits(&self) -> u32[src]
Value of the register as raw bits
fn idleconf0(&self) -> IDLECONF0R[src]
Bits 0:1 - ALTEX0 idle phase configuration
fn idleconf1(&self) -> IDLECONF1R[src]
Bits 2:3 - ALTEX1 idle phase configuration
fn idleconf2(&self) -> IDLECONF2R[src]
Bits 4:5 - ALTEX2 idle phase configuration
fn idleconf3(&self) -> IDLECONF3R[src]
Bits 6:7 - ALTEX3 idle phase configuration
fn idleconf4(&self) -> IDLECONF4R[src]
Bits 8:9 - ALTEX4 idle phase configuration
fn idleconf5(&self) -> IDLECONF5R[src]
Bits 10:11 - ALTEX5 idle phase configuration
fn idleconf6(&self) -> IDLECONF6R[src]
Bits 12:13 - ALTEX6 idle phase configuration
fn idleconf7(&self) -> IDLECONF7R[src]
Bits 14:15 - ALTEX7 idle phase configuration
fn aex0(&self) -> AEX0R[src]
Bit 16 - ALTEX0 always excite enable
fn aex1(&self) -> AEX1R[src]
Bit 17 - ALTEX1 always excite enable
fn aex2(&self) -> AEX2R[src]
Bit 18 - ALTEX2 always excite enable
fn aex3(&self) -> AEX3R[src]
Bit 19 - ALTEX3 always excite enable
fn aex4(&self) -> AEX4R[src]
Bit 20 - ALTEX4 always excite enable
fn aex5(&self) -> AEX5R[src]
Bit 21 - ALTEX5 always excite enable
fn aex6(&self) -> AEX6R[src]
Bit 22 - ALTEX6 always excite enable
fn aex7(&self) -> AEX7R[src]
Bit 23 - ALTEX7 always excite enable