efm32lg890_pac::rtc

Type Alias CTRL

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pub type CTRL = Reg<CTRL_SPEC>;
Expand description

CTRL register accessor: an alias for Reg<CTRL_SPEC>

Aliased Type§

struct CTRL { /* private fields */ }

Implementations

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impl<REG: Writable> Reg<REG>
where REG::Ux: Default,

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pub unsafe fn write_with_zero<F>(&self, f: F)
where F: FnOnce(&mut REG::Writer) -> &mut W<REG>,

Writes 0 to a Writable register.

Similar to write, but unused bits will contain 0.

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impl<REG: Readable + Writable> Reg<REG>

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pub fn modify<F>(&self, f: F)
where for<'w> F: FnOnce(&REG::Reader, &'w mut REG::Writer) -> &'w mut W<REG>,

Modifies the contents of the register by reading and then writing it.

E.g. to do a read-modify-write sequence to change parts of a register:

periph.reg.modify(|r, w| unsafe { w.bits(
   r.bits() | 3
) });

or

periph.reg.modify(|_, w| w
    .field1().bits(newfield1bits)
    .field2().set_bit()
    .field3().variant(VARIANT)
);

Other fields will have the value they had before the call to modify.

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impl<REG: RegisterSpec> Reg<REG>

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pub fn as_ptr(&self) -> *mut REG::Ux

Returns the underlying memory address of register.

let reg_ptr = periph.reg.as_ptr();
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impl<REG: Readable> Reg<REG>

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pub fn read(&self) -> REG::Reader

Reads the contents of a Readable register.

You can read the raw contents of a register by using bits:

let bits = periph.reg.read().bits();

or get the content of a particular field of a register:

let reader = periph.reg.read();
let bits = reader.field1().bits();
let flag = reader.field2().bit_is_set();
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impl<REG: Resettable + Writable> Reg<REG>

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pub fn reset(&self)

Writes the reset value to Writable register.

Resets the register to its initial state.

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pub fn write<F>(&self, f: F)
where F: FnOnce(&mut REG::Writer) -> &mut W<REG>,

Writes bits to a Writable register.

You can write raw bits into a register:

periph.reg.write(|w| unsafe { w.bits(rawbits) });

or write only the fields you need:

periph.reg.write(|w| w
    .field1().bits(newfield1bits)
    .field2().set_bit()
    .field3().variant(VARIANT)
);

In the latter case, other fields will be set to their reset value.

Trait Implementations

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impl<REG: RegisterSpec> Send for Reg<REG>
where REG::Ux: Send,