#[repr(C)]pub struct RegisterBlock {Show 119 fields
pub ctrl: Reg<CTRL_SPEC>,
pub timctrl: Reg<TIMCTRL_SPEC>,
pub perctrl: Reg<PERCTRL_SPEC>,
pub decctrl: Reg<DECCTRL_SPEC>,
pub biasctrl: Reg<BIASCTRL_SPEC>,
pub cmd: Reg<CMD_SPEC>,
pub chen: Reg<CHEN_SPEC>,
pub scanres: Reg<SCANRES_SPEC>,
pub status: Reg<STATUS_SPEC>,
pub ptr: Reg<PTR_SPEC>,
pub bufdata: Reg<BUFDATA_SPEC>,
pub curch: Reg<CURCH_SPEC>,
pub decstate: Reg<DECSTATE_SPEC>,
pub sensorstate: Reg<SENSORSTATE_SPEC>,
pub idleconf: Reg<IDLECONF_SPEC>,
pub altexconf: Reg<ALTEXCONF_SPEC>,
pub if_: Reg<IF_SPEC>,
pub ifc: Reg<IFC_SPEC>,
pub ifs: Reg<IFS_SPEC>,
pub ien: Reg<IEN_SPEC>,
pub syncbusy: Reg<SYNCBUSY_SPEC>,
pub route: Reg<ROUTE_SPEC>,
pub powerdown: Reg<POWERDOWN_SPEC>,
pub st0_tconfa: Reg<ST0_TCONFA_SPEC>,
pub st0_tconfb: Reg<ST0_TCONFB_SPEC>,
pub st1_tconfa: Reg<ST1_TCONFA_SPEC>,
pub st1_tconfb: Reg<ST1_TCONFB_SPEC>,
pub st2_tconfa: Reg<ST2_TCONFA_SPEC>,
pub st2_tconfb: Reg<ST2_TCONFB_SPEC>,
pub st3_tconfa: Reg<ST3_TCONFA_SPEC>,
pub st3_tconfb: Reg<ST3_TCONFB_SPEC>,
pub st4_tconfa: Reg<ST4_TCONFA_SPEC>,
pub st4_tconfb: Reg<ST4_TCONFB_SPEC>,
pub st5_tconfa: Reg<ST5_TCONFA_SPEC>,
pub st5_tconfb: Reg<ST5_TCONFB_SPEC>,
pub st6_tconfa: Reg<ST6_TCONFA_SPEC>,
pub st6_tconfb: Reg<ST6_TCONFB_SPEC>,
pub st7_tconfa: Reg<ST7_TCONFA_SPEC>,
pub st7_tconfb: Reg<ST7_TCONFB_SPEC>,
pub st8_tconfa: Reg<ST8_TCONFA_SPEC>,
pub st8_tconfb: Reg<ST8_TCONFB_SPEC>,
pub st9_tconfa: Reg<ST9_TCONFA_SPEC>,
pub st9_tconfb: Reg<ST9_TCONFB_SPEC>,
pub st10_tconfa: Reg<ST10_TCONFA_SPEC>,
pub st10_tconfb: Reg<ST10_TCONFB_SPEC>,
pub st11_tconfa: Reg<ST11_TCONFA_SPEC>,
pub st11_tconfb: Reg<ST11_TCONFB_SPEC>,
pub st12_tconfa: Reg<ST12_TCONFA_SPEC>,
pub st12_tconfb: Reg<ST12_TCONFB_SPEC>,
pub st13_tconfa: Reg<ST13_TCONFA_SPEC>,
pub st13_tconfb: Reg<ST13_TCONFB_SPEC>,
pub st14_tconfa: Reg<ST14_TCONFA_SPEC>,
pub st14_tconfb: Reg<ST14_TCONFB_SPEC>,
pub st15_tconfa: Reg<ST15_TCONFA_SPEC>,
pub st15_tconfb: Reg<ST15_TCONFB_SPEC>,
pub buf0_data: Reg<BUF0_DATA_SPEC>,
pub buf1_data: Reg<BUF1_DATA_SPEC>,
pub buf2_data: Reg<BUF2_DATA_SPEC>,
pub buf3_data: Reg<BUF3_DATA_SPEC>,
pub buf4_data: Reg<BUF4_DATA_SPEC>,
pub buf5_data: Reg<BUF5_DATA_SPEC>,
pub buf6_data: Reg<BUF6_DATA_SPEC>,
pub buf7_data: Reg<BUF7_DATA_SPEC>,
pub buf8_data: Reg<BUF8_DATA_SPEC>,
pub buf9_data: Reg<BUF9_DATA_SPEC>,
pub buf10_data: Reg<BUF10_DATA_SPEC>,
pub buf11_data: Reg<BUF11_DATA_SPEC>,
pub buf12_data: Reg<BUF12_DATA_SPEC>,
pub buf13_data: Reg<BUF13_DATA_SPEC>,
pub buf14_data: Reg<BUF14_DATA_SPEC>,
pub buf15_data: Reg<BUF15_DATA_SPEC>,
pub ch0_timing: Reg<CH0_TIMING_SPEC>,
pub ch0_interact: Reg<CH0_INTERACT_SPEC>,
pub ch0_eval: Reg<CH0_EVAL_SPEC>,
pub ch1_timing: Reg<CH1_TIMING_SPEC>,
pub ch1_interact: Reg<CH1_INTERACT_SPEC>,
pub ch1_eval: Reg<CH1_EVAL_SPEC>,
pub ch2_timing: Reg<CH2_TIMING_SPEC>,
pub ch2_interact: Reg<CH2_INTERACT_SPEC>,
pub ch2_eval: Reg<CH2_EVAL_SPEC>,
pub ch3_timing: Reg<CH3_TIMING_SPEC>,
pub ch3_interact: Reg<CH3_INTERACT_SPEC>,
pub ch3_eval: Reg<CH3_EVAL_SPEC>,
pub ch4_timing: Reg<CH4_TIMING_SPEC>,
pub ch4_interact: Reg<CH4_INTERACT_SPEC>,
pub ch4_eval: Reg<CH4_EVAL_SPEC>,
pub ch5_timing: Reg<CH5_TIMING_SPEC>,
pub ch5_interact: Reg<CH5_INTERACT_SPEC>,
pub ch5_eval: Reg<CH5_EVAL_SPEC>,
pub ch6_timing: Reg<CH6_TIMING_SPEC>,
pub ch6_interact: Reg<CH6_INTERACT_SPEC>,
pub ch6_eval: Reg<CH6_EVAL_SPEC>,
pub ch7_timing: Reg<CH7_TIMING_SPEC>,
pub ch7_interact: Reg<CH7_INTERACT_SPEC>,
pub ch7_eval: Reg<CH7_EVAL_SPEC>,
pub ch8_timing: Reg<CH8_TIMING_SPEC>,
pub ch8_interact: Reg<CH8_INTERACT_SPEC>,
pub ch8_eval: Reg<CH8_EVAL_SPEC>,
pub ch9_timing: Reg<CH9_TIMING_SPEC>,
pub ch9_interact: Reg<CH9_INTERACT_SPEC>,
pub ch9_eval: Reg<CH9_EVAL_SPEC>,
pub ch10_timing: Reg<CH10_TIMING_SPEC>,
pub ch10_interact: Reg<CH10_INTERACT_SPEC>,
pub ch10_eval: Reg<CH10_EVAL_SPEC>,
pub ch11_timing: Reg<CH11_TIMING_SPEC>,
pub ch11_interact: Reg<CH11_INTERACT_SPEC>,
pub ch11_eval: Reg<CH11_EVAL_SPEC>,
pub ch12_timing: Reg<CH12_TIMING_SPEC>,
pub ch12_interact: Reg<CH12_INTERACT_SPEC>,
pub ch12_eval: Reg<CH12_EVAL_SPEC>,
pub ch13_timing: Reg<CH13_TIMING_SPEC>,
pub ch13_interact: Reg<CH13_INTERACT_SPEC>,
pub ch13_eval: Reg<CH13_EVAL_SPEC>,
pub ch14_timing: Reg<CH14_TIMING_SPEC>,
pub ch14_interact: Reg<CH14_INTERACT_SPEC>,
pub ch14_eval: Reg<CH14_EVAL_SPEC>,
pub ch15_timing: Reg<CH15_TIMING_SPEC>,
pub ch15_interact: Reg<CH15_INTERACT_SPEC>,
pub ch15_eval: Reg<CH15_EVAL_SPEC>,
/* private fields */
}Expand description
Register block
Fields§
§ctrl: Reg<CTRL_SPEC>0x00 - Control Register
timctrl: Reg<TIMCTRL_SPEC>0x04 - Timing Control Register
perctrl: Reg<PERCTRL_SPEC>0x08 - Peripheral Control Register
decctrl: Reg<DECCTRL_SPEC>0x0c - Decoder control Register
biasctrl: Reg<BIASCTRL_SPEC>0x10 - Bias Control Register
cmd: Reg<CMD_SPEC>0x14 - Command Register
chen: Reg<CHEN_SPEC>0x18 - Channel enable Register
scanres: Reg<SCANRES_SPEC>0x1c - Scan result register
status: Reg<STATUS_SPEC>0x20 - Status Register
ptr: Reg<PTR_SPEC>0x24 - Result buffer pointers
bufdata: Reg<BUFDATA_SPEC>0x28 - Result buffer data register
curch: Reg<CURCH_SPEC>0x2c - Current channel index
decstate: Reg<DECSTATE_SPEC>0x30 - Current decoder state
sensorstate: Reg<SENSORSTATE_SPEC>0x34 - Decoder input register
idleconf: Reg<IDLECONF_SPEC>0x38 - GPIO Idle phase configuration
altexconf: Reg<ALTEXCONF_SPEC>0x3c - Alternative excite pin configuration
if_: Reg<IF_SPEC>0x40 - Interrupt Flag Register
ifc: Reg<IFC_SPEC>0x44 - Interrupt Flag Clear Register
ifs: Reg<IFS_SPEC>0x48 - Interrupt Flag Set Register
ien: Reg<IEN_SPEC>0x4c - Interrupt Enable Register
syncbusy: Reg<SYNCBUSY_SPEC>0x50 - Synchronization Busy Register
route: Reg<ROUTE_SPEC>0x54 - I/O Routing Register
powerdown: Reg<POWERDOWN_SPEC>0x58 - LESENSE RAM power-down register
st0_tconfa: Reg<ST0_TCONFA_SPEC>0x200 - State transition configuration A
st0_tconfb: Reg<ST0_TCONFB_SPEC>0x204 - State transition configuration B
st1_tconfa: Reg<ST1_TCONFA_SPEC>0x208 - State transition configuration A
st1_tconfb: Reg<ST1_TCONFB_SPEC>0x20c - State transition configuration B
st2_tconfa: Reg<ST2_TCONFA_SPEC>0x210 - State transition configuration A
st2_tconfb: Reg<ST2_TCONFB_SPEC>0x214 - State transition configuration B
st3_tconfa: Reg<ST3_TCONFA_SPEC>0x218 - State transition configuration A
st3_tconfb: Reg<ST3_TCONFB_SPEC>0x21c - State transition configuration B
st4_tconfa: Reg<ST4_TCONFA_SPEC>0x220 - State transition configuration A
st4_tconfb: Reg<ST4_TCONFB_SPEC>0x224 - State transition configuration B
st5_tconfa: Reg<ST5_TCONFA_SPEC>0x228 - State transition configuration A
st5_tconfb: Reg<ST5_TCONFB_SPEC>0x22c - State transition configuration B
st6_tconfa: Reg<ST6_TCONFA_SPEC>0x230 - State transition configuration A
st6_tconfb: Reg<ST6_TCONFB_SPEC>0x234 - State transition configuration B
st7_tconfa: Reg<ST7_TCONFA_SPEC>0x238 - State transition configuration A
st7_tconfb: Reg<ST7_TCONFB_SPEC>0x23c - State transition configuration B
st8_tconfa: Reg<ST8_TCONFA_SPEC>0x240 - State transition configuration A
st8_tconfb: Reg<ST8_TCONFB_SPEC>0x244 - State transition configuration B
st9_tconfa: Reg<ST9_TCONFA_SPEC>0x248 - State transition configuration A
st9_tconfb: Reg<ST9_TCONFB_SPEC>0x24c - State transition configuration B
st10_tconfa: Reg<ST10_TCONFA_SPEC>0x250 - State transition configuration A
st10_tconfb: Reg<ST10_TCONFB_SPEC>0x254 - State transition configuration B
st11_tconfa: Reg<ST11_TCONFA_SPEC>0x258 - State transition configuration A
st11_tconfb: Reg<ST11_TCONFB_SPEC>0x25c - State transition configuration B
st12_tconfa: Reg<ST12_TCONFA_SPEC>0x260 - State transition configuration A
st12_tconfb: Reg<ST12_TCONFB_SPEC>0x264 - State transition configuration B
st13_tconfa: Reg<ST13_TCONFA_SPEC>0x268 - State transition configuration A
st13_tconfb: Reg<ST13_TCONFB_SPEC>0x26c - State transition configuration B
st14_tconfa: Reg<ST14_TCONFA_SPEC>0x270 - State transition configuration A
st14_tconfb: Reg<ST14_TCONFB_SPEC>0x274 - State transition configuration B
st15_tconfa: Reg<ST15_TCONFA_SPEC>0x278 - State transition configuration A
st15_tconfb: Reg<ST15_TCONFB_SPEC>0x27c - State transition configuration B
buf0_data: Reg<BUF0_DATA_SPEC>0x280 - Scan results
buf1_data: Reg<BUF1_DATA_SPEC>0x284 - Scan results
buf2_data: Reg<BUF2_DATA_SPEC>0x288 - Scan results
buf3_data: Reg<BUF3_DATA_SPEC>0x28c - Scan results
buf4_data: Reg<BUF4_DATA_SPEC>0x290 - Scan results
buf5_data: Reg<BUF5_DATA_SPEC>0x294 - Scan results
buf6_data: Reg<BUF6_DATA_SPEC>0x298 - Scan results
buf7_data: Reg<BUF7_DATA_SPEC>0x29c - Scan results
buf8_data: Reg<BUF8_DATA_SPEC>0x2a0 - Scan results
buf9_data: Reg<BUF9_DATA_SPEC>0x2a4 - Scan results
buf10_data: Reg<BUF10_DATA_SPEC>0x2a8 - Scan results
buf11_data: Reg<BUF11_DATA_SPEC>0x2ac - Scan results
buf12_data: Reg<BUF12_DATA_SPEC>0x2b0 - Scan results
buf13_data: Reg<BUF13_DATA_SPEC>0x2b4 - Scan results
buf14_data: Reg<BUF14_DATA_SPEC>0x2b8 - Scan results
buf15_data: Reg<BUF15_DATA_SPEC>0x2bc - Scan results
ch0_timing: Reg<CH0_TIMING_SPEC>0x2c0 - Scan configuration
ch0_interact: Reg<CH0_INTERACT_SPEC>0x2c4 - Scan configuration
ch0_eval: Reg<CH0_EVAL_SPEC>0x2c8 - Scan configuration
ch1_timing: Reg<CH1_TIMING_SPEC>0x2d0 - Scan configuration
ch1_interact: Reg<CH1_INTERACT_SPEC>0x2d4 - Scan configuration
ch1_eval: Reg<CH1_EVAL_SPEC>0x2d8 - Scan configuration
ch2_timing: Reg<CH2_TIMING_SPEC>0x2e0 - Scan configuration
ch2_interact: Reg<CH2_INTERACT_SPEC>0x2e4 - Scan configuration
ch2_eval: Reg<CH2_EVAL_SPEC>0x2e8 - Scan configuration
ch3_timing: Reg<CH3_TIMING_SPEC>0x2f0 - Scan configuration
ch3_interact: Reg<CH3_INTERACT_SPEC>0x2f4 - Scan configuration
ch3_eval: Reg<CH3_EVAL_SPEC>0x2f8 - Scan configuration
ch4_timing: Reg<CH4_TIMING_SPEC>0x300 - Scan configuration
ch4_interact: Reg<CH4_INTERACT_SPEC>0x304 - Scan configuration
ch4_eval: Reg<CH4_EVAL_SPEC>0x308 - Scan configuration
ch5_timing: Reg<CH5_TIMING_SPEC>0x310 - Scan configuration
ch5_interact: Reg<CH5_INTERACT_SPEC>0x314 - Scan configuration
ch5_eval: Reg<CH5_EVAL_SPEC>0x318 - Scan configuration
ch6_timing: Reg<CH6_TIMING_SPEC>0x320 - Scan configuration
ch6_interact: Reg<CH6_INTERACT_SPEC>0x324 - Scan configuration
ch6_eval: Reg<CH6_EVAL_SPEC>0x328 - Scan configuration
ch7_timing: Reg<CH7_TIMING_SPEC>0x330 - Scan configuration
ch7_interact: Reg<CH7_INTERACT_SPEC>0x334 - Scan configuration
ch7_eval: Reg<CH7_EVAL_SPEC>0x338 - Scan configuration
ch8_timing: Reg<CH8_TIMING_SPEC>0x340 - Scan configuration
ch8_interact: Reg<CH8_INTERACT_SPEC>0x344 - Scan configuration
ch8_eval: Reg<CH8_EVAL_SPEC>0x348 - Scan configuration
ch9_timing: Reg<CH9_TIMING_SPEC>0x350 - Scan configuration
ch9_interact: Reg<CH9_INTERACT_SPEC>0x354 - Scan configuration
ch9_eval: Reg<CH9_EVAL_SPEC>0x358 - Scan configuration
ch10_timing: Reg<CH10_TIMING_SPEC>0x360 - Scan configuration
ch10_interact: Reg<CH10_INTERACT_SPEC>0x364 - Scan configuration
ch10_eval: Reg<CH10_EVAL_SPEC>0x368 - Scan configuration
ch11_timing: Reg<CH11_TIMING_SPEC>0x370 - Scan configuration
ch11_interact: Reg<CH11_INTERACT_SPEC>0x374 - Scan configuration
ch11_eval: Reg<CH11_EVAL_SPEC>0x378 - Scan configuration
ch12_timing: Reg<CH12_TIMING_SPEC>0x380 - Scan configuration
ch12_interact: Reg<CH12_INTERACT_SPEC>0x384 - Scan configuration
ch12_eval: Reg<CH12_EVAL_SPEC>0x388 - Scan configuration
ch13_timing: Reg<CH13_TIMING_SPEC>0x390 - Scan configuration
ch13_interact: Reg<CH13_INTERACT_SPEC>0x394 - Scan configuration
ch13_eval: Reg<CH13_EVAL_SPEC>0x398 - Scan configuration
ch14_timing: Reg<CH14_TIMING_SPEC>0x3a0 - Scan configuration
ch14_interact: Reg<CH14_INTERACT_SPEC>0x3a4 - Scan configuration
ch14_eval: Reg<CH14_EVAL_SPEC>0x3a8 - Scan configuration
ch15_timing: Reg<CH15_TIMING_SPEC>0x3b0 - Scan configuration
ch15_interact: Reg<CH15_INTERACT_SPEC>0x3b4 - Scan configuration
ch15_eval: Reg<CH15_EVAL_SPEC>0x3b8 - Scan configuration