RegisterBlock

efm32lg230_pac::etm

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 40 fields
    pub etmcr: Reg<ETMCR_SPEC>,
    pub etmccr: Reg<ETMCCR_SPEC>,
    pub etmtrigger: Reg<ETMTRIGGER_SPEC>,
    pub etmsr: Reg<ETMSR_SPEC>,
    pub etmscr: Reg<ETMSCR_SPEC>,
    pub etmteevr: Reg<ETMTEEVR_SPEC>,
    pub etmtecr1: Reg<ETMTECR1_SPEC>,
    pub etmfflr: Reg<ETMFFLR_SPEC>,
    pub etmcntrldvr1: Reg<ETMCNTRLDVR1_SPEC>,
    pub etmsyncfr: Reg<ETMSYNCFR_SPEC>,
    pub etmidr: Reg<ETMIDR_SPEC>,
    pub etmccer: Reg<ETMCCER_SPEC>,
    pub etmtesseicr: Reg<ETMTESSEICR_SPEC>,
    pub etmtsevr: Reg<ETMTSEVR_SPEC>,
    pub etmtraceidr: Reg<ETMTRACEIDR_SPEC>,
    pub etmidr2: Reg<ETMIDR2_SPEC>,
    pub etmpdsr: Reg<ETMPDSR_SPEC>,
    pub etmiscin: Reg<ETMISCIN_SPEC>,
    pub ittrigout: Reg<ITTRIGOUT_SPEC>,
    pub etmitatbctr2: Reg<ETMITATBCTR2_SPEC>,
    pub etmitatbctr0: Reg<ETMITATBCTR0_SPEC>,
    pub etmitctrl: Reg<ETMITCTRL_SPEC>,
    pub etmclaimset: Reg<ETMCLAIMSET_SPEC>,
    pub etmclaimclr: Reg<ETMCLAIMCLR_SPEC>,
    pub etmlar: Reg<ETMLAR_SPEC>,
    pub etmlsr: Reg<ETMLSR_SPEC>,
    pub etmauthstatus: Reg<ETMAUTHSTATUS_SPEC>,
    pub etmdevtype: Reg<ETMDEVTYPE_SPEC>,
    pub etmpidr4: Reg<ETMPIDR4_SPEC>,
    pub etmpidr5: Reg<ETMPIDR5_SPEC>,
    pub etmpidr6: Reg<ETMPIDR6_SPEC>,
    pub etmpidr7: Reg<ETMPIDR7_SPEC>,
    pub etmpidr0: Reg<ETMPIDR0_SPEC>,
    pub etmpidr1: Reg<ETMPIDR1_SPEC>,
    pub etmpidr2: Reg<ETMPIDR2_SPEC>,
    pub etmpidr3: Reg<ETMPIDR3_SPEC>,
    pub etmcidr0: Reg<ETMCIDR0_SPEC>,
    pub etmcidr1: Reg<ETMCIDR1_SPEC>,
    pub etmcidr2: Reg<ETMCIDR2_SPEC>,
    pub etmcidr3: Reg<ETMCIDR3_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§etmcr: Reg<ETMCR_SPEC>

0x00 - Main Control Register

§etmccr: Reg<ETMCCR_SPEC>

0x04 - Configuration Code Register

§etmtrigger: Reg<ETMTRIGGER_SPEC>

0x08 - ETM Trigger Event Register

§etmsr: Reg<ETMSR_SPEC>

0x10 - ETM Status Register

§etmscr: Reg<ETMSCR_SPEC>

0x14 - ETM System Configuration Register

§etmteevr: Reg<ETMTEEVR_SPEC>

0x20 - ETM TraceEnable Event Register

§etmtecr1: Reg<ETMTECR1_SPEC>

0x24 - ETM Trace control Register

§etmfflr: Reg<ETMFFLR_SPEC>

0x2c - ETM Fifo Full Level Register

§etmcntrldvr1: Reg<ETMCNTRLDVR1_SPEC>

0x140 - Counter Reload Value

§etmsyncfr: Reg<ETMSYNCFR_SPEC>

0x1e0 - Synchronisation Frequency Register

§etmidr: Reg<ETMIDR_SPEC>

0x1e4 - ID Register

§etmccer: Reg<ETMCCER_SPEC>

0x1e8 - Configuration Code Extension Register

§etmtesseicr: Reg<ETMTESSEICR_SPEC>

0x1f0 - TraceEnable Start/Stop EmbeddedICE Control Register

§etmtsevr: Reg<ETMTSEVR_SPEC>

0x1f8 - Timestamp Event Register

§etmtraceidr: Reg<ETMTRACEIDR_SPEC>

0x200 - CoreSight Trace ID Register

§etmidr2: Reg<ETMIDR2_SPEC>

0x208 - ETM ID Register 2

§etmpdsr: Reg<ETMPDSR_SPEC>

0x314 - Device Power-down Status Register

§etmiscin: Reg<ETMISCIN_SPEC>

0xee0 - Integration Test Miscellaneous Inputs Register

§ittrigout: Reg<ITTRIGOUT_SPEC>

0xee8 - Integration Test Trigger Out Register

§etmitatbctr2: Reg<ETMITATBCTR2_SPEC>

0xef0 - ETM Integration Test ATB Control 2 Register

§etmitatbctr0: Reg<ETMITATBCTR0_SPEC>

0xef8 - ETM Integration Test ATB Control 0 Register

§etmitctrl: Reg<ETMITCTRL_SPEC>

0xf00 - ETM Integration Control Register

§etmclaimset: Reg<ETMCLAIMSET_SPEC>

0xfa0 - ETM Claim Tag Set Register

§etmclaimclr: Reg<ETMCLAIMCLR_SPEC>

0xfa4 - ETM Claim Tag Clear Register

§etmlar: Reg<ETMLAR_SPEC>

0xfb0 - ETM Lock Access Register

§etmlsr: Reg<ETMLSR_SPEC>

0xfb4 - Lock Status Register

§etmauthstatus: Reg<ETMAUTHSTATUS_SPEC>

0xfb8 - ETM Authentication Status Register

§etmdevtype: Reg<ETMDEVTYPE_SPEC>

0xfcc - CoreSight Device Type Register

§etmpidr4: Reg<ETMPIDR4_SPEC>

0xfd0 - Peripheral ID4 Register

§etmpidr5: Reg<ETMPIDR5_SPEC>

0xfd4 - Peripheral ID5 Register

§etmpidr6: Reg<ETMPIDR6_SPEC>

0xfd8 - Peripheral ID6 Register

§etmpidr7: Reg<ETMPIDR7_SPEC>

0xfdc - Peripheral ID7 Register

§etmpidr0: Reg<ETMPIDR0_SPEC>

0xfe0 - Peripheral ID0 Register

§etmpidr1: Reg<ETMPIDR1_SPEC>

0xfe4 - Peripheral ID1 Register

§etmpidr2: Reg<ETMPIDR2_SPEC>

0xfe8 - Peripheral ID2 Register

§etmpidr3: Reg<ETMPIDR3_SPEC>

0xfec - Peripheral ID3 Register

§etmcidr0: Reg<ETMCIDR0_SPEC>

0xff0 - Component ID0 Register

§etmcidr1: Reg<ETMCIDR1_SPEC>

0xff4 - Component ID1 Register

§etmcidr2: Reg<ETMCIDR2_SPEC>

0xff8 - Component ID2 Register

§etmcidr3: Reg<ETMCIDR3_SPEC>

0xffc - Component ID3 Register

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