efm32gg990_pac::cmu

Struct RegisterBlock

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 28 fields
    pub ctrl: Reg<CTRL_SPEC>,
    pub hfcoreclkdiv: Reg<HFCORECLKDIV_SPEC>,
    pub hfperclkdiv: Reg<HFPERCLKDIV_SPEC>,
    pub hfrcoctrl: Reg<HFRCOCTRL_SPEC>,
    pub lfrcoctrl: Reg<LFRCOCTRL_SPEC>,
    pub auxhfrcoctrl: Reg<AUXHFRCOCTRL_SPEC>,
    pub calctrl: Reg<CALCTRL_SPEC>,
    pub calcnt: Reg<CALCNT_SPEC>,
    pub oscencmd: Reg<OSCENCMD_SPEC>,
    pub cmd: Reg<CMD_SPEC>,
    pub lfclksel: Reg<LFCLKSEL_SPEC>,
    pub status: Reg<STATUS_SPEC>,
    pub if_: Reg<IF_SPEC>,
    pub ifs: Reg<IFS_SPEC>,
    pub ifc: Reg<IFC_SPEC>,
    pub ien: Reg<IEN_SPEC>,
    pub hfcoreclken0: Reg<HFCORECLKEN0_SPEC>,
    pub hfperclken0: Reg<HFPERCLKEN0_SPEC>,
    pub syncbusy: Reg<SYNCBUSY_SPEC>,
    pub freeze: Reg<FREEZE_SPEC>,
    pub lfaclken0: Reg<LFACLKEN0_SPEC>,
    pub lfbclken0: Reg<LFBCLKEN0_SPEC>,
    pub lfapresc0: Reg<LFAPRESC0_SPEC>,
    pub lfbpresc0: Reg<LFBPRESC0_SPEC>,
    pub pcntctrl: Reg<PCNTCTRL_SPEC>,
    pub lcdctrl: Reg<LCDCTRL_SPEC>,
    pub route: Reg<ROUTE_SPEC>,
    pub lock: Reg<LOCK_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§ctrl: Reg<CTRL_SPEC>

0x00 - CMU Control Register

§hfcoreclkdiv: Reg<HFCORECLKDIV_SPEC>

0x04 - High Frequency Core Clock Division Register

§hfperclkdiv: Reg<HFPERCLKDIV_SPEC>

0x08 - High Frequency Peripheral Clock Division Register

§hfrcoctrl: Reg<HFRCOCTRL_SPEC>

0x0c - HFRCO Control Register

§lfrcoctrl: Reg<LFRCOCTRL_SPEC>

0x10 - LFRCO Control Register

§auxhfrcoctrl: Reg<AUXHFRCOCTRL_SPEC>

0x14 - AUXHFRCO Control Register

§calctrl: Reg<CALCTRL_SPEC>

0x18 - Calibration Control Register

§calcnt: Reg<CALCNT_SPEC>

0x1c - Calibration Counter Register

§oscencmd: Reg<OSCENCMD_SPEC>

0x20 - Oscillator Enable/Disable Command Register

§cmd: Reg<CMD_SPEC>

0x24 - Command Register

§lfclksel: Reg<LFCLKSEL_SPEC>

0x28 - Low Frequency Clock Select Register

§status: Reg<STATUS_SPEC>

0x2c - Status Register

§if_: Reg<IF_SPEC>

0x30 - Interrupt Flag Register

§ifs: Reg<IFS_SPEC>

0x34 - Interrupt Flag Set Register

§ifc: Reg<IFC_SPEC>

0x38 - Interrupt Flag Clear Register

§ien: Reg<IEN_SPEC>

0x3c - Interrupt Enable Register

§hfcoreclken0: Reg<HFCORECLKEN0_SPEC>

0x40 - High Frequency Core Clock Enable Register 0

§hfperclken0: Reg<HFPERCLKEN0_SPEC>

0x44 - High Frequency Peripheral Clock Enable Register 0

§syncbusy: Reg<SYNCBUSY_SPEC>

0x50 - Synchronization Busy Register

§freeze: Reg<FREEZE_SPEC>

0x54 - Freeze Register

§lfaclken0: Reg<LFACLKEN0_SPEC>

0x58 - Low Frequency A Clock Enable Register 0 (Async Reg)

§lfbclken0: Reg<LFBCLKEN0_SPEC>

0x60 - Low Frequency B Clock Enable Register 0 (Async Reg)

§lfapresc0: Reg<LFAPRESC0_SPEC>

0x68 - Low Frequency A Prescaler Register 0 (Async Reg)

§lfbpresc0: Reg<LFBPRESC0_SPEC>

0x70 - Low Frequency B Prescaler Register 0 (Async Reg)

§pcntctrl: Reg<PCNTCTRL_SPEC>

0x78 - PCNT Control Register

§lcdctrl: Reg<LCDCTRL_SPEC>

0x7c - LCD Control Register

§route: Reg<ROUTE_SPEC>

0x80 - I/O Routing Register

§lock: Reg<LOCK_SPEC>

0x84 - Configuration Lock Register

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