#[repr(u8)]
pub enum CACHELPLEVEL_A {
BASE,
ADVANCED,
MINACTIVITY,
}
Expand description
Instruction Cache Low-Power Level
Value on reset: 3
Variants§
BASE
0: Base instruction cache functionality.
ADVANCED
1: Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory.
MINACTIVITY
3: Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality.
Trait Implementations§
source§impl Clone for CACHELPLEVEL_A
impl Clone for CACHELPLEVEL_A
source§fn clone(&self) -> CACHELPLEVEL_A
fn clone(&self) -> CACHELPLEVEL_A
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Debug for CACHELPLEVEL_A
impl Debug for CACHELPLEVEL_A
source§impl From<CACHELPLEVEL_A> for u8
impl From<CACHELPLEVEL_A> for u8
source§fn from(variant: CACHELPLEVEL_A) -> Self
fn from(variant: CACHELPLEVEL_A) -> Self
source§impl PartialEq<CACHELPLEVEL_A> for CACHELPLEVEL_A
impl PartialEq<CACHELPLEVEL_A> for CACHELPLEVEL_A
source§fn eq(&self, other: &CACHELPLEVEL_A) -> bool
fn eq(&self, other: &CACHELPLEVEL_A) -> bool
self
and other
values to be equal, and is used
by ==
.