Struct Control1Reg 

pub struct Control1Reg(pub u8);

Tuple Fields

0: u8

Implementations

impl Control1Reg

pub fn startup_boost(&self) -> bool

This bit applies higher loop gain during overdrive to enhance actuator transient response.

pub fn ac_couple(&self) -> bool

This bit applies a 0.9-V common mode voltage to the IN/TRIG pin when an AC- coupling capacitor is used. This bit is only useful for analog input mode. This bit should not be asserted for PWM mode or external trigger mode. 0: Common-mode drive disabled for DC-coupling or digital inputs modes 1: Common-mode drive enabled for AC coupling

pub fn drive_time(&self) -> u8

LRA Mode: Sets initial guess for LRA drive-time in LRA mode. Drive time is automatically adjusted for optimum drive in real time; however, this register should be optimized for the approximate LRA frequency. If the bit is set too low, it can affect the actuator startup time. If it is set too high, it can cause instability. Optimum drive time (ms) ≈ 0.5 × LRA Period Drive time (ms) = DRIVE_TIME[4:0] × 0.1 ms + 0.5 ms ERM Mode: Sets the sample rate for the back-EMF detection. Lower drive times cause higher peak-to-average ratios in the output signal, requiring more supply headroom. Higher drive times cause the feedback to react at a slower rate. Drive Time (ms) = DRIVE_TIME[4:0] × 0.2 ms + 1 ms

pub fn set_startup_boost(&mut self, value: bool)

This bit applies higher loop gain during overdrive to enhance actuator transient response.

pub fn set_ac_couple(&mut self, value: bool)

This bit applies a 0.9-V common mode voltage to the IN/TRIG pin when an AC- coupling capacitor is used. This bit is only useful for analog input mode. This bit should not be asserted for PWM mode or external trigger mode. 0: Common-mode drive disabled for DC-coupling or digital inputs modes 1: Common-mode drive enabled for AC coupling

pub fn set_drive_time(&mut self, value: u8)

LRA Mode: Sets initial guess for LRA drive-time in LRA mode. Drive time is automatically adjusted for optimum drive in real time; however, this register should be optimized for the approximate LRA frequency. If the bit is set too low, it can affect the actuator startup time. If it is set too high, it can cause instability. Optimum drive time (ms) ≈ 0.5 × LRA Period Drive time (ms) = DRIVE_TIME[4:0] × 0.1 ms + 0.5 ms ERM Mode: Sets the sample rate for the back-EMF detection. Lower drive times cause higher peak-to-average ratios in the output signal, requiring more supply headroom. Higher drive times cause the feedback to react at a slower rate. Drive Time (ms) = DRIVE_TIME[4:0] × 0.2 ms + 1 ms

Trait Implementations

impl<T> BitRange<T> for Control1Reg

where u8: BitRange<T>,

fn bit_range(&self, msb: usize, lsb: usize) -> T

Get a range of bits.

impl<T> BitRangeMut<T> for Control1Reg

where u8: BitRangeMut<T>,

fn set_bit_range(&mut self, msb: usize, lsb: usize, value: T)

Set a range of bits.

impl Debug for Control1Reg

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.