Struct ShiftRegister 

pub struct ShiftRegister<SPI, OE, CLR, LATCH, D> { /* private fields */ }

A 74hc595 (compatible) shift register.

Implementations

impl<SPI, OE, CLR, LATCH, D> ShiftRegister<SPI, OE, CLR, LATCH, D>

where SPI: SpiBus, OE: OutputPin, CLR: OutputPin, LATCH: OutputPin, D: DelayNs,

pub fn new(spi: SPI, not_oe: OE, not_clr: CLR, latch: LATCH, delay: D) -> Self

Creates a new ShiftRegister.

pub fn output_enable(&mut self, enable: bool) -> Result<(), OE::Error>

Enables or disables the shift register output drivers.

pub async fn clear(&mut self) -> Result<(), CLR::Error>

Clears the shift register.

This does not change the value of the output latches. Use Self::latch() after clearing if you want the outputs to be reset.

pub async fn latch(&mut self) -> Result<(), LATCH::Error>

Latches the current values in the shift register into the output latches.

pub async fn load(&mut self, data: &[u8]) -> Result<(), SPI::Error>

Loads data into the shift register.

pub async fn transfer( &mut self, read: &mut [u8], write: &[u8], ) -> Result<(), SPI::Error>

Loads write into the shift register and writes the data shifted out of the shift register into read.