Enum deepmesa_collections::bitvec::BitOrder [−][src]
pub enum BitOrder { Lsb0, Msb0, }
Expand description
This enum indicates the order in which bits are traversed and counted.
Msb0
indicates that the MSB (Most Significant
Bit) should be considered as position 0
and consequently bits
should be counted from the MSB to the LSB.
Lsb0
indicates tht the LSB (Least Significant
Bit) should be considered as position 0
and the bits should
therefore be counter from the LSB to the MSB.
Here is an illustrative example:
Examples
let val: u8 = 0b1011_1100;
Counting 4 bits from the Msb0
would yield 1011
while counting 4
bits from the Lsb0
would result in 1100
Variants
Counts bits from the LSB (Least Significant Bit) to the MSB (Most Significant Bit).
Counts bits from the MSB (Most Significant Bit) to the LSB (Least Significant Bit).
Trait Implementations
Auto Trait Implementations
impl RefUnwindSafe for BitOrder
impl UnwindSafe for BitOrder
Blanket Implementations
Mutably borrows from an owned value. Read more