Struct debug_probe::target::m0::FakeM0

pub struct FakeM0 { /* fields omitted */ }

Methods

impl FakeM0

pub fn new(dump: CortexDump) -> FakeM0

Trait Implementations

impl Core for FakeM0

fn wait_for_core_halted(
    &self,
    mi: &mut MasterProbe
) -> Result<(), DebugProbeError>

fn halt(&self, mi: &mut MasterProbe) -> Result<CpuInformation, DebugProbeError>

fn run(&self, mi: &mut MasterProbe) -> Result<(), DebugProbeError>

fn step(&self, mi: &mut MasterProbe) -> Result<CpuInformation, DebugProbeError>

Steps one instruction and then enters halted state again.

fn read_core_reg(
    &self,
    mi: &mut MasterProbe,
    addr: CoreRegisterAddress
) -> Result<u32, DebugProbeError>

fn write_core_reg(
    &self,
    mi: &mut MasterProbe,
    addr: CoreRegisterAddress,
    value: u32
) -> Result<(), DebugProbeError>

fn get_available_breakpoint_units(
    &self,
    mi: &mut MasterProbe
) -> Result<u32, DebugProbeError>

fn enable_breakpoints(
    &self,
    mi: &mut MasterProbe,
    state: bool
) -> Result<(), DebugProbeError>

fn set_breakpoint(
    &self,
    mi: &mut MasterProbe,
    addr: u32
) -> Result<(), DebugProbeError>

fn enable_breakpoint(
    &self,
    mi: &mut MasterProbe,
    addr: u32
) -> Result<(), DebugProbeError>

fn disable_breakpoint(
    &self,
    mi: &mut MasterProbe,
    addr: u32
) -> Result<(), DebugProbeError>

fn read_block8(
    &self,
    mi: &mut MasterProbe,
    address: u32,
    data: &mut [u8]
) -> Result<(), DebugProbeError>