pub struct Uart2 { /* private fields */ }Implementations§
Source§impl Uart2
impl Uart2
Sourcepub const fn uart2_ctr_high_reg(&self) -> &'static Reg<Uart2CtrHighReg_SPEC, RW>
pub const fn uart2_ctr_high_reg(&self) -> &'static Reg<Uart2CtrHighReg_SPEC, RW>
Component Type Register
Sourcepub const fn uart2_ctr_reg(&self) -> &'static Reg<Uart2CtrReg_SPEC, RW>
pub const fn uart2_ctr_reg(&self) -> &'static Reg<Uart2CtrReg_SPEC, RW>
Component Type Register
Sourcepub const fn uart2_dlf_reg(&self) -> &'static Reg<Uart2DlfReg_SPEC, RW>
pub const fn uart2_dlf_reg(&self) -> &'static Reg<Uart2DlfReg_SPEC, RW>
Divisor Latch Fraction Register
Sourcepub const fn uart2_dmasa_reg(&self) -> &'static Reg<Uart2DmasaReg_SPEC, RW>
pub const fn uart2_dmasa_reg(&self) -> &'static Reg<Uart2DmasaReg_SPEC, RW>
DMA Software Acknowledge
Sourcepub const fn uart2_far_reg(&self) -> &'static Reg<Uart2FarReg_SPEC, RW>
pub const fn uart2_far_reg(&self) -> &'static Reg<Uart2FarReg_SPEC, RW>
FIFO Access Register
Sourcepub const fn uart2_htx_reg(&self) -> &'static Reg<Uart2HtxReg_SPEC, RW>
pub const fn uart2_htx_reg(&self) -> &'static Reg<Uart2HtxReg_SPEC, RW>
Halt TX
Sourcepub const fn uart2_ier_dlh_reg(&self) -> &'static Reg<Uart2IerDlhReg_SPEC, RW>
pub const fn uart2_ier_dlh_reg(&self) -> &'static Reg<Uart2IerDlhReg_SPEC, RW>
Interrupt Enable Register/Divisor Latch High
Sourcepub const fn uart2_iir_fcr_reg(&self) -> &'static Reg<Uart2IirFcrReg_SPEC, RW>
pub const fn uart2_iir_fcr_reg(&self) -> &'static Reg<Uart2IirFcrReg_SPEC, RW>
Interrupt Identification Register/FIFO Control Register
Sourcepub const fn uart2_lcr_reg(&self) -> &'static Reg<Uart2LcrReg_SPEC, RW>
pub const fn uart2_lcr_reg(&self) -> &'static Reg<Uart2LcrReg_SPEC, RW>
Line Control Register
Sourcepub const fn uart2_lsr_reg(&self) -> &'static Reg<Uart2LsrReg_SPEC, RW>
pub const fn uart2_lsr_reg(&self) -> &'static Reg<Uart2LsrReg_SPEC, RW>
Line Status Register
Sourcepub const fn uart2_mcr_reg(&self) -> &'static Reg<Uart2McrReg_SPEC, RW>
pub const fn uart2_mcr_reg(&self) -> &'static Reg<Uart2McrReg_SPEC, RW>
Modem Control Register
Sourcepub const fn uart2_rbr_thr_dll_reg(
&self,
) -> &'static Reg<Uart2RbrThrDllReg_SPEC, RW>
pub const fn uart2_rbr_thr_dll_reg( &self, ) -> &'static Reg<Uart2RbrThrDllReg_SPEC, RW>
Receive Buffer Register/Transmit Holding Register/Divisor Latch Low
Sourcepub const fn uart2_rfl_reg(&self) -> &'static Reg<Uart2RflReg_SPEC, RW>
pub const fn uart2_rfl_reg(&self) -> &'static Reg<Uart2RflReg_SPEC, RW>
Receive FIFO Level
Sourcepub const fn uart2_sbcr_reg(&self) -> &'static Reg<Uart2SbcrReg_SPEC, RW>
pub const fn uart2_sbcr_reg(&self) -> &'static Reg<Uart2SbcrReg_SPEC, RW>
Shadow Break Control Register
Sourcepub const fn uart2_scr_reg(&self) -> &'static Reg<Uart2ScrReg_SPEC, RW>
pub const fn uart2_scr_reg(&self) -> &'static Reg<Uart2ScrReg_SPEC, RW>
Scratchpad Register
Sourcepub const fn uart2_sdmam_reg(&self) -> &'static Reg<Uart2SdmamReg_SPEC, RW>
pub const fn uart2_sdmam_reg(&self) -> &'static Reg<Uart2SdmamReg_SPEC, RW>
Shadow DMA Mode
Sourcepub const fn uart2_sfe_reg(&self) -> &'static Reg<Uart2SfeReg_SPEC, RW>
pub const fn uart2_sfe_reg(&self) -> &'static Reg<Uart2SfeReg_SPEC, RW>
Shadow FIFO Enable
Sourcepub const fn uart2_srbr_sthr0_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr0Reg_SPEC, RW>
pub const fn uart2_srbr_sthr0_reg( &self, ) -> &'static Reg<Uart2SrbrSthr0Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr10_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr10Reg_SPEC, RW>
pub const fn uart2_srbr_sthr10_reg( &self, ) -> &'static Reg<Uart2SrbrSthr10Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr11_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr11Reg_SPEC, RW>
pub const fn uart2_srbr_sthr11_reg( &self, ) -> &'static Reg<Uart2SrbrSthr11Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr12_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr12Reg_SPEC, RW>
pub const fn uart2_srbr_sthr12_reg( &self, ) -> &'static Reg<Uart2SrbrSthr12Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr13_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr13Reg_SPEC, RW>
pub const fn uart2_srbr_sthr13_reg( &self, ) -> &'static Reg<Uart2SrbrSthr13Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr14_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr14Reg_SPEC, RW>
pub const fn uart2_srbr_sthr14_reg( &self, ) -> &'static Reg<Uart2SrbrSthr14Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr15_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr15Reg_SPEC, RW>
pub const fn uart2_srbr_sthr15_reg( &self, ) -> &'static Reg<Uart2SrbrSthr15Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr1_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr1Reg_SPEC, RW>
pub const fn uart2_srbr_sthr1_reg( &self, ) -> &'static Reg<Uart2SrbrSthr1Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr2_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr2Reg_SPEC, RW>
pub const fn uart2_srbr_sthr2_reg( &self, ) -> &'static Reg<Uart2SrbrSthr2Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr3_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr3Reg_SPEC, RW>
pub const fn uart2_srbr_sthr3_reg( &self, ) -> &'static Reg<Uart2SrbrSthr3Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr4_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr4Reg_SPEC, RW>
pub const fn uart2_srbr_sthr4_reg( &self, ) -> &'static Reg<Uart2SrbrSthr4Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr5_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr5Reg_SPEC, RW>
pub const fn uart2_srbr_sthr5_reg( &self, ) -> &'static Reg<Uart2SrbrSthr5Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr6_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr6Reg_SPEC, RW>
pub const fn uart2_srbr_sthr6_reg( &self, ) -> &'static Reg<Uart2SrbrSthr6Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr7_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr7Reg_SPEC, RW>
pub const fn uart2_srbr_sthr7_reg( &self, ) -> &'static Reg<Uart2SrbrSthr7Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr8_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr8Reg_SPEC, RW>
pub const fn uart2_srbr_sthr8_reg( &self, ) -> &'static Reg<Uart2SrbrSthr8Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srbr_sthr9_reg(
&self,
) -> &'static Reg<Uart2SrbrSthr9Reg_SPEC, RW>
pub const fn uart2_srbr_sthr9_reg( &self, ) -> &'static Reg<Uart2SrbrSthr9Reg_SPEC, RW>
Shadow Receive/Transmit Buffer Register
Sourcepub const fn uart2_srr_reg(&self) -> &'static Reg<Uart2SrrReg_SPEC, RW>
pub const fn uart2_srr_reg(&self) -> &'static Reg<Uart2SrrReg_SPEC, RW>
Software Reset Register.
Sourcepub const fn uart2_srt_reg(&self) -> &'static Reg<Uart2SrtReg_SPEC, RW>
pub const fn uart2_srt_reg(&self) -> &'static Reg<Uart2SrtReg_SPEC, RW>
Shadow RCVR Trigger
Sourcepub const fn uart2_stet_reg(&self) -> &'static Reg<Uart2StetReg_SPEC, RW>
pub const fn uart2_stet_reg(&self) -> &'static Reg<Uart2StetReg_SPEC, RW>
Shadow TX Empty Trigger
Sourcepub const fn uart2_tfl_reg(&self) -> &'static Reg<Uart2TflReg_SPEC, RW>
pub const fn uart2_tfl_reg(&self) -> &'static Reg<Uart2TflReg_SPEC, RW>
Transmit FIFO Level
Sourcepub const fn uart2_ucv_high_reg(&self) -> &'static Reg<Uart2UcvHighReg_SPEC, RW>
pub const fn uart2_ucv_high_reg(&self) -> &'static Reg<Uart2UcvHighReg_SPEC, RW>
Component Version
Sourcepub const fn uart2_ucv_reg(&self) -> &'static Reg<Uart2UcvReg_SPEC, RW>
pub const fn uart2_ucv_reg(&self) -> &'static Reg<Uart2UcvReg_SPEC, RW>
Component Version
Sourcepub const fn uart2_usr_reg(&self) -> &'static Reg<Uart2UsrReg_SPEC, RW>
pub const fn uart2_usr_reg(&self) -> &'static Reg<Uart2UsrReg_SPEC, RW>
UART Status Register
Trait Implementations§
impl Copy for Uart2
impl Eq for Uart2
impl Send for Uart2
UART2 registers