RegisterBlock

cw32f030_hal::svd::sysctrl

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
Show 28 fields
    pub cr0: CR0,
    pub cr1: CR1,
    pub cr2: CR2,
    pub ier: IER,
    pub isr: ISR,
    pub icr: ICR,
    pub hsi: HSI,
    pub hse: HSE,
    pub lsi: LSI,
    pub lse: LSE,
    pub pll: PLL,
    pub debug: DEBUG,
    pub ahben: AHBEN,
    pub apben2: APBEN2,
    pub apben1: APBEN1,
    pub ahbrst: AHBRST,
    pub apbrst2: APBRST2,
    pub apbrst1: APBRST1,
    pub resetflag: RESETFLAG,
    pub gtim1cap: GTIM1CAP,
    pub gtim2cap: GTIM2CAP,
    pub gtim3cap: GTIM3CAP,
    pub gtim4cap: GTIM4CAP,
    pub atimetr: ATIMETR,
    pub gtimetr: GTIMETR,
    pub timitr: TIMITR,
    pub mco: MCO,
    pub irmod: IRMOD,
    /* private fields */

}
Expand description

Register block

Fields§

§cr0: CR0

0x00 - Control Reg0

§cr1: CR1

0x04 - Control Reg1

§cr2: CR2

0x08 - Control Reg2

§ier: IER

0x0c - Interupt Enable Reg

§isr: ISR

0x10 - Interupt Status Reg

§icr: ICR

0x14 - Interupt Clear Reg

§hsi: HSI

0x18 - HSI Control Reg

§hse: HSE

0x1c - HSE Control Reg

§lsi: LSI

0x20 - LSI Control Reg

§lse: LSE

0x24 - LSE Control Reg

§pll: PLL

0x28 - PLL Control Reg

§debug: DEBUG

0x2c - Debug Control Reg

§ahben: AHBEN

0x30 - AHB Clock Control Reg

§apben2: APBEN2

0x34 - APB Clock Control Reg2

§apben1: APBEN1

0x38 - APB Clock Control Reg1

§ahbrst: AHBRST

0x40 - AHB Reset Control Reg

§apbrst2: APBRST2

0x44 - APB Reset Control Reg2

§apbrst1: APBRST1

0x48 - APB Reset Control Reg1

§resetflag: RESETFLAG

0x4c - Reset Status Reg

§gtim1cap: GTIM1CAP

0x50 - GTIM1 CAP Control Reg

§gtim2cap: GTIM2CAP

0x54 - GTIM2 CAP Control Reg

§gtim3cap: GTIM3CAP

0x58 - GTIM3 CAP Control Reg

§gtim4cap: GTIM4CAP

0x5c - GTIM4 CAP Control Reg

§atimetr: ATIMETR

0x60 - ATIM ETR Control Reg

§gtimetr: GTIMETR

0x64 - GTIM1-4 ETR Control Reg

§timitr: TIMITR

0x6c - BTIMx GTIMx ATIM ITR Control Reg

§mco: MCO

0x70 - Master Clock Output Control Reg

§irmod: IRMOD

0x74 - IR MOD Control Reg

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