Enum Instruction 

pub enum Instruction {
    Registers {
        config: RegisterBlock,
    },
    Cmma,
    Mma {
        io: MmaIo,
        operands: MmaOperands,
    },
    Wgmma,
}

What one plane contracts through: a software register block or a hardware fragment form.

Variants

Registers

A register block, run under config. Asks nothing of the hardware.

Fields

config: RegisterBlock

Cmma

The vendor’s fragment API: wmma on CUDA, rocWMMA on HIP.

Mma

This crate’s own fragment transport over the matrix intrinsics, with per-role io, over operands of one form.

Fields

io: MmaIo

operands: MmaOperands

Wgmma

Hopper’s warpgroup MMA: a plane group of four contracts its 64 × n tile together, reading both operands out of shared memory, asynchronously.

Implementations

impl Instruction

pub fn scales_its_sum_in_place(self) -> bool

Whether a sum this instruction contracts is scaled where it is held: a register block’s cells and a manual-mma fragment’s are each unit’s own registers. A cmma fragment hides which unit holds a cell, so it is scaled only through a round trip in shared memory, and a warpgroup’s sum only once its MMAs land.

Trait Implementations

impl Clone for Instruction

fn clone(&self) -> Self

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Instruction

impl Debug for Instruction

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for Instruction

impl Hash for Instruction

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for Instruction

fn eq(&self, other: &Self) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for Instruction