Struct yosys_netlist_json::Port

pub struct Port {
    pub direction: PortDirection,
    pub bits: Vec<BitVal>,
    pub offset: usize,
    pub upto: usize,
    pub signed: usize,
}

Represents a port on a module

Fields

direction: PortDirection

Port direction

bits: Vec<BitVal>

Bit value(s) representing the wire(s) connected to this port

offset: usize

Bit offset for mapping to HDL bit numbering

upto: usize

Whether or not HDL bit numbering is MSB-first

signed: usize

Whether or not HDL considers value signed

Trait Implementations

impl Clone for Port

fn clone(&self) -> Port

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Port

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<'de> Deserialize<'de> for Port

fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error> where
    __D: Deserializer<'de>, 

Deserialize this value from the given Serde deserializer.

impl PartialEq<Port> for Port

fn eq(&self, other: &Port) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Port) -> bool

This method tests for !=.

impl Serialize for Port

fn serialize<__S>(&self, __serializer: __S) -> Result<__S::Ok, __S::Error> where
    __S: Serializer, 

Serialize this value into the given Serde serializer.

impl Eq for Port

impl StructuralEq for Port

impl StructuralPartialEq for Port