Enum yaxpeax_lc87::Operand[][src]

pub enum Operand {
    Nothing,
    BranchAbsU17 {
        addr: u32,
    },
    BranchRelU12 {
        rel: u16,
    },
    ImmU8 {
        imm: u8,
    },
    ImmU16 {
        imm: u16,
    },
    AbsU16 {
        addr: u16,
    },
    BitIndex {
        index: u8,
    },
    IndirectReg {
        n: u8,
    },
    IndirectRegPlusC {
        n: u8,
    },
    R0Offset {
        off: i8,
    },
}
Expand description

an operand for an lc87 instruction.

Variants

Nothing

no operand in this position.

reaching this as a user of yaxpeax_lc87 is almost certainly a bug. Instruction::operand will return None rather than Operand::Nothing.

BranchAbsU17

branch to the absolute address addr.

Show fields

Fields of BranchAbsU17

addr: u32
BranchRelU12

branch to the relative address rel (PC + inst.len() + rel).

Show fields

Fields of BranchRelU12

rel: u16
ImmU8

an 8-bit immediate.

the meaning of this immediate is opcode-dependent, but usually a value used for a bitwise or arithmetic operation.

Show fields

Fields of ImmU8

imm: u8
ImmU16

a 16-bit immediate.

this is only used for the wide mov that loads both A and B registers at once. A gets the low byte, B gets the high byte.

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Fields of ImmU16

imm: u16
AbsU16

a memory access to an absolute 16-bit address.

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Fields of AbsU16

addr: u16
BitIndex

an address of a bit in some byte.

this is coupled with some memory operand which specifies the byte in question. the usage of the bit selected by address/bit varies by opcode.

Show fields

Fields of BitIndex

index: u8
IndirectReg

a memory access to the address specified by indirect register Rn.

n may only be in the range [0, 63], inclusive. indirect registers are pairs of bytes n * 2 and n * 2 + 1 from zero. for example, indirect register 5 would select the address formed by the word at memory 0x0a and 0x0b.

Show fields

Fields of IndirectReg

n: u8
IndirectRegPlusC

a memory access to the address specified by indirect register Rn plus signed displacement from register C.

n may only be in the range [0, 63], inclusive. indirect registers are pairs of bytes n * 2 and n * 2 + 1 from zero. for example, indirect register 5 would select the address formed by the word at memory 0x0a and 0x0b.

Show fields

Fields of IndirectRegPlusC

n: u8
R0Offset

a memory access to the address specified by indirect register R0 plus the signed offset off.

off may only be in the range [-64, 64], inclusive.

Show fields

Fields of R0Offset

off: i8

Trait Implementations

Returns a copy of the value. Read more

Performs copy-assignment from source. Read more

Formats the value using the given formatter. Read more

Formats the value using the given formatter. Read more

Feeds this value into the given Hasher. Read more

Feeds a slice of this type into the given Hasher. Read more

This method tests for self and other values to be equal, and is used by ==. Read more

This method tests for !=.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.