xmc4800/ebu/
busrap3.rs

1#[doc = "Register `BUSRAP3` reader"]
2pub type R = crate::R<BUSRAP3_SPEC>;
3#[doc = "Register `BUSRAP3` writer"]
4pub type W = crate::W<BUSRAP3_SPEC>;
5#[doc = "Recovery Cycles between Different Regions\n\nValue on reset: 15"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum RDDTACS_A {
9    #[doc = "0: No Recovery Phase clock cycles available."]
10    VALUE1 = 0,
11    #[doc = "1: 1 clock cycle selected."]
12    VALUE2 = 1,
13    #[doc = "14: 14 clock cycles selected."]
14    VALUE3 = 14,
15    #[doc = "15: 15 clock cycles selected."]
16    VALUE4 = 15,
17}
18impl From<RDDTACS_A> for u8 {
19    #[inline(always)]
20    fn from(variant: RDDTACS_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for RDDTACS_A {
25    type Ux = u8;
26}
27impl crate::IsEnum for RDDTACS_A {}
28#[doc = "Field `RDDTACS` reader - Recovery Cycles between Different Regions"]
29pub type RDDTACS_R = crate::FieldReader<RDDTACS_A>;
30impl RDDTACS_R {
31    #[doc = "Get enumerated values variant"]
32    #[inline(always)]
33    pub const fn variant(&self) -> Option<RDDTACS_A> {
34        match self.bits {
35            0 => Some(RDDTACS_A::VALUE1),
36            1 => Some(RDDTACS_A::VALUE2),
37            14 => Some(RDDTACS_A::VALUE3),
38            15 => Some(RDDTACS_A::VALUE4),
39            _ => None,
40        }
41    }
42    #[doc = "No Recovery Phase clock cycles available."]
43    #[inline(always)]
44    pub fn is_value1(&self) -> bool {
45        *self == RDDTACS_A::VALUE1
46    }
47    #[doc = "1 clock cycle selected."]
48    #[inline(always)]
49    pub fn is_value2(&self) -> bool {
50        *self == RDDTACS_A::VALUE2
51    }
52    #[doc = "14 clock cycles selected."]
53    #[inline(always)]
54    pub fn is_value3(&self) -> bool {
55        *self == RDDTACS_A::VALUE3
56    }
57    #[doc = "15 clock cycles selected."]
58    #[inline(always)]
59    pub fn is_value4(&self) -> bool {
60        *self == RDDTACS_A::VALUE4
61    }
62}
63#[doc = "Field `RDDTACS` writer - Recovery Cycles between Different Regions"]
64pub type RDDTACS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RDDTACS_A>;
65impl<'a, REG> RDDTACS_W<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "No Recovery Phase clock cycles available."]
71    #[inline(always)]
72    pub fn value1(self) -> &'a mut crate::W<REG> {
73        self.variant(RDDTACS_A::VALUE1)
74    }
75    #[doc = "1 clock cycle selected."]
76    #[inline(always)]
77    pub fn value2(self) -> &'a mut crate::W<REG> {
78        self.variant(RDDTACS_A::VALUE2)
79    }
80    #[doc = "14 clock cycles selected."]
81    #[inline(always)]
82    pub fn value3(self) -> &'a mut crate::W<REG> {
83        self.variant(RDDTACS_A::VALUE3)
84    }
85    #[doc = "15 clock cycles selected."]
86    #[inline(always)]
87    pub fn value4(self) -> &'a mut crate::W<REG> {
88        self.variant(RDDTACS_A::VALUE4)
89    }
90}
91#[doc = "Recovery Cycles after Read Accesses\n\nValue on reset: 7"]
92#[derive(Clone, Copy, Debug, PartialEq, Eq)]
93#[repr(u8)]
94pub enum RDRECOVC_A {
95    #[doc = "0: No Recovery Phase clock cycles available."]
96    VALUE1 = 0,
97    #[doc = "1: 1 clock cycle selected."]
98    VALUE2 = 1,
99    #[doc = "6: 6 clock cycles selected."]
100    VALUE3 = 6,
101    #[doc = "7: 7 clock cycles selected."]
102    VALUE4 = 7,
103}
104impl From<RDRECOVC_A> for u8 {
105    #[inline(always)]
106    fn from(variant: RDRECOVC_A) -> Self {
107        variant as _
108    }
109}
110impl crate::FieldSpec for RDRECOVC_A {
111    type Ux = u8;
112}
113impl crate::IsEnum for RDRECOVC_A {}
114#[doc = "Field `RDRECOVC` reader - Recovery Cycles after Read Accesses"]
115pub type RDRECOVC_R = crate::FieldReader<RDRECOVC_A>;
116impl RDRECOVC_R {
117    #[doc = "Get enumerated values variant"]
118    #[inline(always)]
119    pub const fn variant(&self) -> Option<RDRECOVC_A> {
120        match self.bits {
121            0 => Some(RDRECOVC_A::VALUE1),
122            1 => Some(RDRECOVC_A::VALUE2),
123            6 => Some(RDRECOVC_A::VALUE3),
124            7 => Some(RDRECOVC_A::VALUE4),
125            _ => None,
126        }
127    }
128    #[doc = "No Recovery Phase clock cycles available."]
129    #[inline(always)]
130    pub fn is_value1(&self) -> bool {
131        *self == RDRECOVC_A::VALUE1
132    }
133    #[doc = "1 clock cycle selected."]
134    #[inline(always)]
135    pub fn is_value2(&self) -> bool {
136        *self == RDRECOVC_A::VALUE2
137    }
138    #[doc = "6 clock cycles selected."]
139    #[inline(always)]
140    pub fn is_value3(&self) -> bool {
141        *self == RDRECOVC_A::VALUE3
142    }
143    #[doc = "7 clock cycles selected."]
144    #[inline(always)]
145    pub fn is_value4(&self) -> bool {
146        *self == RDRECOVC_A::VALUE4
147    }
148}
149#[doc = "Field `RDRECOVC` writer - Recovery Cycles after Read Accesses"]
150pub type RDRECOVC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RDRECOVC_A>;
151impl<'a, REG> RDRECOVC_W<'a, REG>
152where
153    REG: crate::Writable + crate::RegisterSpec,
154    REG::Ux: From<u8>,
155{
156    #[doc = "No Recovery Phase clock cycles available."]
157    #[inline(always)]
158    pub fn value1(self) -> &'a mut crate::W<REG> {
159        self.variant(RDRECOVC_A::VALUE1)
160    }
161    #[doc = "1 clock cycle selected."]
162    #[inline(always)]
163    pub fn value2(self) -> &'a mut crate::W<REG> {
164        self.variant(RDRECOVC_A::VALUE2)
165    }
166    #[doc = "6 clock cycles selected."]
167    #[inline(always)]
168    pub fn value3(self) -> &'a mut crate::W<REG> {
169        self.variant(RDRECOVC_A::VALUE3)
170    }
171    #[doc = "7 clock cycles selected."]
172    #[inline(always)]
173    pub fn value4(self) -> &'a mut crate::W<REG> {
174        self.variant(RDRECOVC_A::VALUE4)
175    }
176}
177#[doc = "Programmed Wait States for read accesses\n\nValue on reset: 31"]
178#[derive(Clone, Copy, Debug, PartialEq, Eq)]
179#[repr(u8)]
180pub enum WAITRDC_A {
181    #[doc = "0: 1 wait state."]
182    VALUE1 = 0,
183    #[doc = "1: 1 wait states."]
184    VALUE2 = 1,
185    #[doc = "2: 2 wait state."]
186    VALUE3 = 2,
187    #[doc = "30: 30 wait states."]
188    VALUE4 = 30,
189    #[doc = "31: 31 wait states."]
190    VALUE5 = 31,
191}
192impl From<WAITRDC_A> for u8 {
193    #[inline(always)]
194    fn from(variant: WAITRDC_A) -> Self {
195        variant as _
196    }
197}
198impl crate::FieldSpec for WAITRDC_A {
199    type Ux = u8;
200}
201impl crate::IsEnum for WAITRDC_A {}
202#[doc = "Field `WAITRDC` reader - Programmed Wait States for read accesses"]
203pub type WAITRDC_R = crate::FieldReader<WAITRDC_A>;
204impl WAITRDC_R {
205    #[doc = "Get enumerated values variant"]
206    #[inline(always)]
207    pub const fn variant(&self) -> Option<WAITRDC_A> {
208        match self.bits {
209            0 => Some(WAITRDC_A::VALUE1),
210            1 => Some(WAITRDC_A::VALUE2),
211            2 => Some(WAITRDC_A::VALUE3),
212            30 => Some(WAITRDC_A::VALUE4),
213            31 => Some(WAITRDC_A::VALUE5),
214            _ => None,
215        }
216    }
217    #[doc = "1 wait state."]
218    #[inline(always)]
219    pub fn is_value1(&self) -> bool {
220        *self == WAITRDC_A::VALUE1
221    }
222    #[doc = "1 wait states."]
223    #[inline(always)]
224    pub fn is_value2(&self) -> bool {
225        *self == WAITRDC_A::VALUE2
226    }
227    #[doc = "2 wait state."]
228    #[inline(always)]
229    pub fn is_value3(&self) -> bool {
230        *self == WAITRDC_A::VALUE3
231    }
232    #[doc = "30 wait states."]
233    #[inline(always)]
234    pub fn is_value4(&self) -> bool {
235        *self == WAITRDC_A::VALUE4
236    }
237    #[doc = "31 wait states."]
238    #[inline(always)]
239    pub fn is_value5(&self) -> bool {
240        *self == WAITRDC_A::VALUE5
241    }
242}
243#[doc = "Field `WAITRDC` writer - Programmed Wait States for read accesses"]
244pub type WAITRDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5, WAITRDC_A>;
245impl<'a, REG> WAITRDC_W<'a, REG>
246where
247    REG: crate::Writable + crate::RegisterSpec,
248    REG::Ux: From<u8>,
249{
250    #[doc = "1 wait state."]
251    #[inline(always)]
252    pub fn value1(self) -> &'a mut crate::W<REG> {
253        self.variant(WAITRDC_A::VALUE1)
254    }
255    #[doc = "1 wait states."]
256    #[inline(always)]
257    pub fn value2(self) -> &'a mut crate::W<REG> {
258        self.variant(WAITRDC_A::VALUE2)
259    }
260    #[doc = "2 wait state."]
261    #[inline(always)]
262    pub fn value3(self) -> &'a mut crate::W<REG> {
263        self.variant(WAITRDC_A::VALUE3)
264    }
265    #[doc = "30 wait states."]
266    #[inline(always)]
267    pub fn value4(self) -> &'a mut crate::W<REG> {
268        self.variant(WAITRDC_A::VALUE4)
269    }
270    #[doc = "31 wait states."]
271    #[inline(always)]
272    pub fn value5(self) -> &'a mut crate::W<REG> {
273        self.variant(WAITRDC_A::VALUE5)
274    }
275}
276#[doc = "Field `DATAC` reader - Data Hold Cycles for Read Accesses"]
277pub type DATAC_R = crate::FieldReader;
278#[doc = "Field `DATAC` writer - Data Hold Cycles for Read Accesses"]
279pub type DATAC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
280#[doc = "Frequency of external clock at pin BFCLKO\n\nValue on reset: 3"]
281#[derive(Clone, Copy, Debug, PartialEq, Eq)]
282#[repr(u8)]
283pub enum EXTCLOCK_A {
284    #[doc = "0: Equal to INT_CLK frequency."]
285    VALUE1 = 0,
286    #[doc = "1: 1/2 of INT_CLK frequency."]
287    VALUE2 = 1,
288    #[doc = "2: 1/3 of INT_CLK frequency."]
289    VALUE3 = 2,
290    #[doc = "3: 1/4 of INT_CLK frequency (default after reset)."]
291    VALUE4 = 3,
292}
293impl From<EXTCLOCK_A> for u8 {
294    #[inline(always)]
295    fn from(variant: EXTCLOCK_A) -> Self {
296        variant as _
297    }
298}
299impl crate::FieldSpec for EXTCLOCK_A {
300    type Ux = u8;
301}
302impl crate::IsEnum for EXTCLOCK_A {}
303#[doc = "Field `EXTCLOCK` reader - Frequency of external clock at pin BFCLKO"]
304pub type EXTCLOCK_R = crate::FieldReader<EXTCLOCK_A>;
305impl EXTCLOCK_R {
306    #[doc = "Get enumerated values variant"]
307    #[inline(always)]
308    pub const fn variant(&self) -> EXTCLOCK_A {
309        match self.bits {
310            0 => EXTCLOCK_A::VALUE1,
311            1 => EXTCLOCK_A::VALUE2,
312            2 => EXTCLOCK_A::VALUE3,
313            3 => EXTCLOCK_A::VALUE4,
314            _ => unreachable!(),
315        }
316    }
317    #[doc = "Equal to INT_CLK frequency."]
318    #[inline(always)]
319    pub fn is_value1(&self) -> bool {
320        *self == EXTCLOCK_A::VALUE1
321    }
322    #[doc = "1/2 of INT_CLK frequency."]
323    #[inline(always)]
324    pub fn is_value2(&self) -> bool {
325        *self == EXTCLOCK_A::VALUE2
326    }
327    #[doc = "1/3 of INT_CLK frequency."]
328    #[inline(always)]
329    pub fn is_value3(&self) -> bool {
330        *self == EXTCLOCK_A::VALUE3
331    }
332    #[doc = "1/4 of INT_CLK frequency (default after reset)."]
333    #[inline(always)]
334    pub fn is_value4(&self) -> bool {
335        *self == EXTCLOCK_A::VALUE4
336    }
337}
338#[doc = "Field `EXTCLOCK` writer - Frequency of external clock at pin BFCLKO"]
339pub type EXTCLOCK_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXTCLOCK_A, crate::Safe>;
340impl<'a, REG> EXTCLOCK_W<'a, REG>
341where
342    REG: crate::Writable + crate::RegisterSpec,
343    REG::Ux: From<u8>,
344{
345    #[doc = "Equal to INT_CLK frequency."]
346    #[inline(always)]
347    pub fn value1(self) -> &'a mut crate::W<REG> {
348        self.variant(EXTCLOCK_A::VALUE1)
349    }
350    #[doc = "1/2 of INT_CLK frequency."]
351    #[inline(always)]
352    pub fn value2(self) -> &'a mut crate::W<REG> {
353        self.variant(EXTCLOCK_A::VALUE2)
354    }
355    #[doc = "1/3 of INT_CLK frequency."]
356    #[inline(always)]
357    pub fn value3(self) -> &'a mut crate::W<REG> {
358        self.variant(EXTCLOCK_A::VALUE3)
359    }
360    #[doc = "1/4 of INT_CLK frequency (default after reset)."]
361    #[inline(always)]
362    pub fn value4(self) -> &'a mut crate::W<REG> {
363        self.variant(EXTCLOCK_A::VALUE4)
364    }
365}
366#[doc = "Extended data\n\nValue on reset: 3"]
367#[derive(Clone, Copy, Debug, PartialEq, Eq)]
368#[repr(u8)]
369pub enum EXTDATA_A {
370    #[doc = "0: external memory outputs data every BFCLK cycle"]
371    VALUE1 = 0,
372    #[doc = "1: external memory outputs data every two BFCLK cycles"]
373    VALUE2 = 1,
374    #[doc = "2: external memory outputs data every four BFCLK cycles"]
375    VALUE3 = 2,
376    #[doc = "3: external memory outputs data every eight BFCLK cycles"]
377    VALUE4 = 3,
378}
379impl From<EXTDATA_A> for u8 {
380    #[inline(always)]
381    fn from(variant: EXTDATA_A) -> Self {
382        variant as _
383    }
384}
385impl crate::FieldSpec for EXTDATA_A {
386    type Ux = u8;
387}
388impl crate::IsEnum for EXTDATA_A {}
389#[doc = "Field `EXTDATA` reader - Extended data"]
390pub type EXTDATA_R = crate::FieldReader<EXTDATA_A>;
391impl EXTDATA_R {
392    #[doc = "Get enumerated values variant"]
393    #[inline(always)]
394    pub const fn variant(&self) -> EXTDATA_A {
395        match self.bits {
396            0 => EXTDATA_A::VALUE1,
397            1 => EXTDATA_A::VALUE2,
398            2 => EXTDATA_A::VALUE3,
399            3 => EXTDATA_A::VALUE4,
400            _ => unreachable!(),
401        }
402    }
403    #[doc = "external memory outputs data every BFCLK cycle"]
404    #[inline(always)]
405    pub fn is_value1(&self) -> bool {
406        *self == EXTDATA_A::VALUE1
407    }
408    #[doc = "external memory outputs data every two BFCLK cycles"]
409    #[inline(always)]
410    pub fn is_value2(&self) -> bool {
411        *self == EXTDATA_A::VALUE2
412    }
413    #[doc = "external memory outputs data every four BFCLK cycles"]
414    #[inline(always)]
415    pub fn is_value3(&self) -> bool {
416        *self == EXTDATA_A::VALUE3
417    }
418    #[doc = "external memory outputs data every eight BFCLK cycles"]
419    #[inline(always)]
420    pub fn is_value4(&self) -> bool {
421        *self == EXTDATA_A::VALUE4
422    }
423}
424#[doc = "Field `EXTDATA` writer - Extended data"]
425pub type EXTDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXTDATA_A, crate::Safe>;
426impl<'a, REG> EXTDATA_W<'a, REG>
427where
428    REG: crate::Writable + crate::RegisterSpec,
429    REG::Ux: From<u8>,
430{
431    #[doc = "external memory outputs data every BFCLK cycle"]
432    #[inline(always)]
433    pub fn value1(self) -> &'a mut crate::W<REG> {
434        self.variant(EXTDATA_A::VALUE1)
435    }
436    #[doc = "external memory outputs data every two BFCLK cycles"]
437    #[inline(always)]
438    pub fn value2(self) -> &'a mut crate::W<REG> {
439        self.variant(EXTDATA_A::VALUE2)
440    }
441    #[doc = "external memory outputs data every four BFCLK cycles"]
442    #[inline(always)]
443    pub fn value3(self) -> &'a mut crate::W<REG> {
444        self.variant(EXTDATA_A::VALUE3)
445    }
446    #[doc = "external memory outputs data every eight BFCLK cycles"]
447    #[inline(always)]
448    pub fn value4(self) -> &'a mut crate::W<REG> {
449        self.variant(EXTDATA_A::VALUE4)
450    }
451}
452#[doc = "Command Delay Cycles\n\nValue on reset: 15"]
453#[derive(Clone, Copy, Debug, PartialEq, Eq)]
454#[repr(u8)]
455pub enum CMDDELAY_A {
456    #[doc = "0: 0 clock cycle selected."]
457    VALUE1 = 0,
458    #[doc = "1: 1 clock cycle selected."]
459    VALUE2 = 1,
460    #[doc = "14: 14 clock cycles selected."]
461    VALUE3 = 14,
462    #[doc = "15: 15 clock cycles selected."]
463    VALUE4 = 15,
464}
465impl From<CMDDELAY_A> for u8 {
466    #[inline(always)]
467    fn from(variant: CMDDELAY_A) -> Self {
468        variant as _
469    }
470}
471impl crate::FieldSpec for CMDDELAY_A {
472    type Ux = u8;
473}
474impl crate::IsEnum for CMDDELAY_A {}
475#[doc = "Field `CMDDELAY` reader - Command Delay Cycles"]
476pub type CMDDELAY_R = crate::FieldReader<CMDDELAY_A>;
477impl CMDDELAY_R {
478    #[doc = "Get enumerated values variant"]
479    #[inline(always)]
480    pub const fn variant(&self) -> Option<CMDDELAY_A> {
481        match self.bits {
482            0 => Some(CMDDELAY_A::VALUE1),
483            1 => Some(CMDDELAY_A::VALUE2),
484            14 => Some(CMDDELAY_A::VALUE3),
485            15 => Some(CMDDELAY_A::VALUE4),
486            _ => None,
487        }
488    }
489    #[doc = "0 clock cycle selected."]
490    #[inline(always)]
491    pub fn is_value1(&self) -> bool {
492        *self == CMDDELAY_A::VALUE1
493    }
494    #[doc = "1 clock cycle selected."]
495    #[inline(always)]
496    pub fn is_value2(&self) -> bool {
497        *self == CMDDELAY_A::VALUE2
498    }
499    #[doc = "14 clock cycles selected."]
500    #[inline(always)]
501    pub fn is_value3(&self) -> bool {
502        *self == CMDDELAY_A::VALUE3
503    }
504    #[doc = "15 clock cycles selected."]
505    #[inline(always)]
506    pub fn is_value4(&self) -> bool {
507        *self == CMDDELAY_A::VALUE4
508    }
509}
510#[doc = "Field `CMDDELAY` writer - Command Delay Cycles"]
511pub type CMDDELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CMDDELAY_A>;
512impl<'a, REG> CMDDELAY_W<'a, REG>
513where
514    REG: crate::Writable + crate::RegisterSpec,
515    REG::Ux: From<u8>,
516{
517    #[doc = "0 clock cycle selected."]
518    #[inline(always)]
519    pub fn value1(self) -> &'a mut crate::W<REG> {
520        self.variant(CMDDELAY_A::VALUE1)
521    }
522    #[doc = "1 clock cycle selected."]
523    #[inline(always)]
524    pub fn value2(self) -> &'a mut crate::W<REG> {
525        self.variant(CMDDELAY_A::VALUE2)
526    }
527    #[doc = "14 clock cycles selected."]
528    #[inline(always)]
529    pub fn value3(self) -> &'a mut crate::W<REG> {
530        self.variant(CMDDELAY_A::VALUE3)
531    }
532    #[doc = "15 clock cycles selected."]
533    #[inline(always)]
534    pub fn value4(self) -> &'a mut crate::W<REG> {
535        self.variant(CMDDELAY_A::VALUE4)
536    }
537}
538#[doc = "Address Hold Cycles\n\nValue on reset: 15"]
539#[derive(Clone, Copy, Debug, PartialEq, Eq)]
540#[repr(u8)]
541pub enum AHOLDC_A {
542    #[doc = "0: 0 clock cycle selected"]
543    VALUE1 = 0,
544    #[doc = "1: 1 clock cycle selected"]
545    VALUE2 = 1,
546    #[doc = "14: 14 clock cycles selected"]
547    VALUE3 = 14,
548    #[doc = "15: 15 clock cycles selected"]
549    VALUE4 = 15,
550}
551impl From<AHOLDC_A> for u8 {
552    #[inline(always)]
553    fn from(variant: AHOLDC_A) -> Self {
554        variant as _
555    }
556}
557impl crate::FieldSpec for AHOLDC_A {
558    type Ux = u8;
559}
560impl crate::IsEnum for AHOLDC_A {}
561#[doc = "Field `AHOLDC` reader - Address Hold Cycles"]
562pub type AHOLDC_R = crate::FieldReader<AHOLDC_A>;
563impl AHOLDC_R {
564    #[doc = "Get enumerated values variant"]
565    #[inline(always)]
566    pub const fn variant(&self) -> Option<AHOLDC_A> {
567        match self.bits {
568            0 => Some(AHOLDC_A::VALUE1),
569            1 => Some(AHOLDC_A::VALUE2),
570            14 => Some(AHOLDC_A::VALUE3),
571            15 => Some(AHOLDC_A::VALUE4),
572            _ => None,
573        }
574    }
575    #[doc = "0 clock cycle selected"]
576    #[inline(always)]
577    pub fn is_value1(&self) -> bool {
578        *self == AHOLDC_A::VALUE1
579    }
580    #[doc = "1 clock cycle selected"]
581    #[inline(always)]
582    pub fn is_value2(&self) -> bool {
583        *self == AHOLDC_A::VALUE2
584    }
585    #[doc = "14 clock cycles selected"]
586    #[inline(always)]
587    pub fn is_value3(&self) -> bool {
588        *self == AHOLDC_A::VALUE3
589    }
590    #[doc = "15 clock cycles selected"]
591    #[inline(always)]
592    pub fn is_value4(&self) -> bool {
593        *self == AHOLDC_A::VALUE4
594    }
595}
596#[doc = "Field `AHOLDC` writer - Address Hold Cycles"]
597pub type AHOLDC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, AHOLDC_A>;
598impl<'a, REG> AHOLDC_W<'a, REG>
599where
600    REG: crate::Writable + crate::RegisterSpec,
601    REG::Ux: From<u8>,
602{
603    #[doc = "0 clock cycle selected"]
604    #[inline(always)]
605    pub fn value1(self) -> &'a mut crate::W<REG> {
606        self.variant(AHOLDC_A::VALUE1)
607    }
608    #[doc = "1 clock cycle selected"]
609    #[inline(always)]
610    pub fn value2(self) -> &'a mut crate::W<REG> {
611        self.variant(AHOLDC_A::VALUE2)
612    }
613    #[doc = "14 clock cycles selected"]
614    #[inline(always)]
615    pub fn value3(self) -> &'a mut crate::W<REG> {
616        self.variant(AHOLDC_A::VALUE3)
617    }
618    #[doc = "15 clock cycles selected"]
619    #[inline(always)]
620    pub fn value4(self) -> &'a mut crate::W<REG> {
621        self.variant(AHOLDC_A::VALUE4)
622    }
623}
624#[doc = "Address Cycles\n\nValue on reset: 15"]
625#[derive(Clone, Copy, Debug, PartialEq, Eq)]
626#[repr(u8)]
627pub enum ADDRC_A {
628    #[doc = "0: 1 clock cycle selected"]
629    VALUE1 = 0,
630    #[doc = "1: 1 clock cycle selected"]
631    VALUE2 = 1,
632    #[doc = "14: 14 clock cycles selected"]
633    VALUE3 = 14,
634    #[doc = "15: 15 clock cycles selected"]
635    VALUE4 = 15,
636}
637impl From<ADDRC_A> for u8 {
638    #[inline(always)]
639    fn from(variant: ADDRC_A) -> Self {
640        variant as _
641    }
642}
643impl crate::FieldSpec for ADDRC_A {
644    type Ux = u8;
645}
646impl crate::IsEnum for ADDRC_A {}
647#[doc = "Field `ADDRC` reader - Address Cycles"]
648pub type ADDRC_R = crate::FieldReader<ADDRC_A>;
649impl ADDRC_R {
650    #[doc = "Get enumerated values variant"]
651    #[inline(always)]
652    pub const fn variant(&self) -> Option<ADDRC_A> {
653        match self.bits {
654            0 => Some(ADDRC_A::VALUE1),
655            1 => Some(ADDRC_A::VALUE2),
656            14 => Some(ADDRC_A::VALUE3),
657            15 => Some(ADDRC_A::VALUE4),
658            _ => None,
659        }
660    }
661    #[doc = "1 clock cycle selected"]
662    #[inline(always)]
663    pub fn is_value1(&self) -> bool {
664        *self == ADDRC_A::VALUE1
665    }
666    #[doc = "1 clock cycle selected"]
667    #[inline(always)]
668    pub fn is_value2(&self) -> bool {
669        *self == ADDRC_A::VALUE2
670    }
671    #[doc = "14 clock cycles selected"]
672    #[inline(always)]
673    pub fn is_value3(&self) -> bool {
674        *self == ADDRC_A::VALUE3
675    }
676    #[doc = "15 clock cycles selected"]
677    #[inline(always)]
678    pub fn is_value4(&self) -> bool {
679        *self == ADDRC_A::VALUE4
680    }
681}
682#[doc = "Field `ADDRC` writer - Address Cycles"]
683pub type ADDRC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ADDRC_A>;
684impl<'a, REG> ADDRC_W<'a, REG>
685where
686    REG: crate::Writable + crate::RegisterSpec,
687    REG::Ux: From<u8>,
688{
689    #[doc = "1 clock cycle selected"]
690    #[inline(always)]
691    pub fn value1(self) -> &'a mut crate::W<REG> {
692        self.variant(ADDRC_A::VALUE1)
693    }
694    #[doc = "1 clock cycle selected"]
695    #[inline(always)]
696    pub fn value2(self) -> &'a mut crate::W<REG> {
697        self.variant(ADDRC_A::VALUE2)
698    }
699    #[doc = "14 clock cycles selected"]
700    #[inline(always)]
701    pub fn value3(self) -> &'a mut crate::W<REG> {
702        self.variant(ADDRC_A::VALUE3)
703    }
704    #[doc = "15 clock cycles selected"]
705    #[inline(always)]
706    pub fn value4(self) -> &'a mut crate::W<REG> {
707        self.variant(ADDRC_A::VALUE4)
708    }
709}
710impl R {
711    #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"]
712    #[inline(always)]
713    pub fn rddtacs(&self) -> RDDTACS_R {
714        RDDTACS_R::new((self.bits & 0x0f) as u8)
715    }
716    #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"]
717    #[inline(always)]
718    pub fn rdrecovc(&self) -> RDRECOVC_R {
719        RDRECOVC_R::new(((self.bits >> 4) & 7) as u8)
720    }
721    #[doc = "Bits 7:11 - Programmed Wait States for read accesses"]
722    #[inline(always)]
723    pub fn waitrdc(&self) -> WAITRDC_R {
724        WAITRDC_R::new(((self.bits >> 7) & 0x1f) as u8)
725    }
726    #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"]
727    #[inline(always)]
728    pub fn datac(&self) -> DATAC_R {
729        DATAC_R::new(((self.bits >> 12) & 0x0f) as u8)
730    }
731    #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"]
732    #[inline(always)]
733    pub fn extclock(&self) -> EXTCLOCK_R {
734        EXTCLOCK_R::new(((self.bits >> 16) & 3) as u8)
735    }
736    #[doc = "Bits 18:19 - Extended data"]
737    #[inline(always)]
738    pub fn extdata(&self) -> EXTDATA_R {
739        EXTDATA_R::new(((self.bits >> 18) & 3) as u8)
740    }
741    #[doc = "Bits 20:23 - Command Delay Cycles"]
742    #[inline(always)]
743    pub fn cmddelay(&self) -> CMDDELAY_R {
744        CMDDELAY_R::new(((self.bits >> 20) & 0x0f) as u8)
745    }
746    #[doc = "Bits 24:27 - Address Hold Cycles"]
747    #[inline(always)]
748    pub fn aholdc(&self) -> AHOLDC_R {
749        AHOLDC_R::new(((self.bits >> 24) & 0x0f) as u8)
750    }
751    #[doc = "Bits 28:31 - Address Cycles"]
752    #[inline(always)]
753    pub fn addrc(&self) -> ADDRC_R {
754        ADDRC_R::new(((self.bits >> 28) & 0x0f) as u8)
755    }
756}
757impl W {
758    #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"]
759    #[inline(always)]
760    pub fn rddtacs(&mut self) -> RDDTACS_W<BUSRAP3_SPEC> {
761        RDDTACS_W::new(self, 0)
762    }
763    #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"]
764    #[inline(always)]
765    pub fn rdrecovc(&mut self) -> RDRECOVC_W<BUSRAP3_SPEC> {
766        RDRECOVC_W::new(self, 4)
767    }
768    #[doc = "Bits 7:11 - Programmed Wait States for read accesses"]
769    #[inline(always)]
770    pub fn waitrdc(&mut self) -> WAITRDC_W<BUSRAP3_SPEC> {
771        WAITRDC_W::new(self, 7)
772    }
773    #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"]
774    #[inline(always)]
775    pub fn datac(&mut self) -> DATAC_W<BUSRAP3_SPEC> {
776        DATAC_W::new(self, 12)
777    }
778    #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"]
779    #[inline(always)]
780    pub fn extclock(&mut self) -> EXTCLOCK_W<BUSRAP3_SPEC> {
781        EXTCLOCK_W::new(self, 16)
782    }
783    #[doc = "Bits 18:19 - Extended data"]
784    #[inline(always)]
785    pub fn extdata(&mut self) -> EXTDATA_W<BUSRAP3_SPEC> {
786        EXTDATA_W::new(self, 18)
787    }
788    #[doc = "Bits 20:23 - Command Delay Cycles"]
789    #[inline(always)]
790    pub fn cmddelay(&mut self) -> CMDDELAY_W<BUSRAP3_SPEC> {
791        CMDDELAY_W::new(self, 20)
792    }
793    #[doc = "Bits 24:27 - Address Hold Cycles"]
794    #[inline(always)]
795    pub fn aholdc(&mut self) -> AHOLDC_W<BUSRAP3_SPEC> {
796        AHOLDC_W::new(self, 24)
797    }
798    #[doc = "Bits 28:31 - Address Cycles"]
799    #[inline(always)]
800    pub fn addrc(&mut self) -> ADDRC_W<BUSRAP3_SPEC> {
801        ADDRC_W::new(self, 28)
802    }
803}
804#[doc = "EBU Bus Read Access Parameter Register\n\nYou can [`read`](crate::Reg::read) this register and get [`busrap3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`busrap3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
805pub struct BUSRAP3_SPEC;
806impl crate::RegisterSpec for BUSRAP3_SPEC {
807    type Ux = u32;
808}
809#[doc = "`read()` method returns [`busrap3::R`](R) reader structure"]
810impl crate::Readable for BUSRAP3_SPEC {}
811#[doc = "`write(|w| ..)` method takes [`busrap3::W`](W) writer structure"]
812impl crate::Writable for BUSRAP3_SPEC {
813    type Safety = crate::Unsafe;
814    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
815    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
816}
817#[doc = "`reset()` method sets BUSRAP3 to value 0xffff_ffff"]
818impl crate::Resettable for BUSRAP3_SPEC {
819    const RESET_VALUE: u32 = 0xffff_ffff;
820}
xmc4800/ebu/busrap3.rs

xmc4800/ebu/
busrap3.rs
