[−][src]Type Definition xmc4800::ebu::buswcon0::W
type W = W<u32, BUSWCON0>;
Writer for register BUSWCON0
Methods
impl W
[src]
pub fn fetblen(&mut self) -> FETBLEN_W
[src]
Bits 0:2 - Burst Length for Synchronous Burst
pub fn fbbmsel(&mut self) -> FBBMSEL_W
[src]
Bit 3 - Synchronous burst buffer mode select
pub fn ecse(&mut self) -> ECSE_W
[src]
Bit 16 - Early Chip Select for Synchronous Burst
pub fn ebse(&mut self) -> EBSE_W
[src]
Bit 17 - Early Burst Signal Enable for Synchronous Burst
pub fn waitinv(&mut self) -> WAITINV_W
[src]
Bit 19 - Reversed polarity at WAIT
pub fn bcgen(&mut self) -> BCGEN_W
[src]
Bits 20:21 - Byte Control Signal Control
pub fn wait(&mut self) -> WAIT_W
[src]
Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,
pub fn aap(&mut self) -> AAP_W
[src]
Bit 26 - Asynchronous Address phase:
pub fn lockcs(&mut self) -> LOCKCS_W
[src]
Bit 27 - Lock Chip Select
pub fn agen(&mut self) -> AGEN_W
[src]
Bits 28:31 - Device Type for Region