xmc4700/eth0/
mmc_receive_interrupt_mask.rs1#[doc = "Register `MMC_RECEIVE_INTERRUPT_MASK` reader"]
2pub type R = crate::R<MMC_RECEIVE_INTERRUPT_MASK_SPEC>;
3#[doc = "Register `MMC_RECEIVE_INTERRUPT_MASK` writer"]
4pub type W = crate::W<MMC_RECEIVE_INTERRUPT_MASK_SPEC>;
5#[doc = "Field `RXGBFRMIM` reader - MMC Receive Good Bad Frame Counter Interrupt Mask"]
6pub type RXGBFRMIM_R = crate::BitReader;
7#[doc = "Field `RXGBFRMIM` writer - MMC Receive Good Bad Frame Counter Interrupt Mask"]
8pub type RXGBFRMIM_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RXGBOCTIM` reader - MMC Receive Good Bad Octet Counter Interrupt Mask"]
10pub type RXGBOCTIM_R = crate::BitReader;
11#[doc = "Field `RXGBOCTIM` writer - MMC Receive Good Bad Octet Counter Interrupt Mask"]
12pub type RXGBOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RXGOCTIM` reader - MMC Receive Good Octet Counter Interrupt Mask"]
14pub type RXGOCTIM_R = crate::BitReader;
15#[doc = "Field `RXGOCTIM` writer - MMC Receive Good Octet Counter Interrupt Mask"]
16pub type RXGOCTIM_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RXBCGFIM` reader - MMC Receive Broadcast Good Frame Counter Interrupt Mask"]
18pub type RXBCGFIM_R = crate::BitReader;
19#[doc = "Field `RXBCGFIM` writer - MMC Receive Broadcast Good Frame Counter Interrupt Mask"]
20pub type RXBCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `RXMCGFIM` reader - MMC Receive Multicast Good Frame Counter Interrupt Mask"]
22pub type RXMCGFIM_R = crate::BitReader;
23#[doc = "Field `RXMCGFIM` writer - MMC Receive Multicast Good Frame Counter Interrupt Mask"]
24pub type RXMCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RXCRCERFIM` reader - MMC Receive CRC Error Frame Counter Interrupt Mask"]
26pub type RXCRCERFIM_R = crate::BitReader;
27#[doc = "Field `RXCRCERFIM` writer - MMC Receive CRC Error Frame Counter Interrupt Mask"]
28pub type RXCRCERFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `RXALGNERFIM` reader - MMC Receive Alignment Error Frame Counter Interrupt Mask"]
30pub type RXALGNERFIM_R = crate::BitReader;
31#[doc = "Field `RXALGNERFIM` writer - MMC Receive Alignment Error Frame Counter Interrupt Mask"]
32pub type RXALGNERFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RXRUNTFIM` reader - MMC Receive Runt Frame Counter Interrupt Mask"]
34pub type RXRUNTFIM_R = crate::BitReader;
35#[doc = "Field `RXRUNTFIM` writer - MMC Receive Runt Frame Counter Interrupt Mask"]
36pub type RXRUNTFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `RXJABERFIM` reader - MMC Receive Jabber Error Frame Counter Interrupt Mask"]
38pub type RXJABERFIM_R = crate::BitReader;
39#[doc = "Field `RXJABERFIM` writer - MMC Receive Jabber Error Frame Counter Interrupt Mask"]
40pub type RXJABERFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `RXUSIZEGFIM` reader - MMC Receive Undersize Good Frame Counter Interrupt Mask"]
42pub type RXUSIZEGFIM_R = crate::BitReader;
43#[doc = "Field `RXUSIZEGFIM` writer - MMC Receive Undersize Good Frame Counter Interrupt Mask"]
44pub type RXUSIZEGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `RXOSIZEGFIM` reader - MMC Receive Oversize Good Frame Counter Interrupt Mask"]
46pub type RXOSIZEGFIM_R = crate::BitReader;
47#[doc = "Field `RXOSIZEGFIM` writer - MMC Receive Oversize Good Frame Counter Interrupt Mask"]
48pub type RXOSIZEGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `RX64OCTGBFIM` reader - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"]
50pub type RX64OCTGBFIM_R = crate::BitReader;
51#[doc = "Field `RX64OCTGBFIM` writer - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"]
52pub type RX64OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `RX65T127OCTGBFIM` reader - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
54pub type RX65T127OCTGBFIM_R = crate::BitReader;
55#[doc = "Field `RX65T127OCTGBFIM` writer - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
56pub type RX65T127OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `RX128T255OCTGBFIM` reader - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
58pub type RX128T255OCTGBFIM_R = crate::BitReader;
59#[doc = "Field `RX128T255OCTGBFIM` writer - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
60pub type RX128T255OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `RX256T511OCTGBFIM` reader - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
62pub type RX256T511OCTGBFIM_R = crate::BitReader;
63#[doc = "Field `RX256T511OCTGBFIM` writer - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
64pub type RX256T511OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `RX512T1023OCTGBFIM` reader - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
66pub type RX512T1023OCTGBFIM_R = crate::BitReader;
67#[doc = "Field `RX512T1023OCTGBFIM` writer - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
68pub type RX512T1023OCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `RX1024TMAXOCTGBFIM` reader - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"]
70pub type RX1024TMAXOCTGBFIM_R = crate::BitReader;
71#[doc = "Field `RX1024TMAXOCTGBFIM` writer - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"]
72pub type RX1024TMAXOCTGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `RXUCGFIM` reader - MMC Receive Unicast Good Frame Counter Interrupt Mask"]
74pub type RXUCGFIM_R = crate::BitReader;
75#[doc = "Field `RXUCGFIM` writer - MMC Receive Unicast Good Frame Counter Interrupt Mask"]
76pub type RXUCGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `RXLENERFIM` reader - MMC Receive Length Error Frame Counter Interrupt Mask"]
78pub type RXLENERFIM_R = crate::BitReader;
79#[doc = "Field `RXLENERFIM` writer - MMC Receive Length Error Frame Counter Interrupt Mask"]
80pub type RXLENERFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `RXORANGEFIM` reader - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"]
82pub type RXORANGEFIM_R = crate::BitReader;
83#[doc = "Field `RXORANGEFIM` writer - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"]
84pub type RXORANGEFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `RXPAUSFIM` reader - MMC Receive Pause Frame Counter Interrupt Mask"]
86pub type RXPAUSFIM_R = crate::BitReader;
87#[doc = "Field `RXPAUSFIM` writer - MMC Receive Pause Frame Counter Interrupt Mask"]
88pub type RXPAUSFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `RXFOVFIM` reader - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"]
90pub type RXFOVFIM_R = crate::BitReader;
91#[doc = "Field `RXFOVFIM` writer - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"]
92pub type RXFOVFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `RXVLANGBFIM` reader - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"]
94pub type RXVLANGBFIM_R = crate::BitReader;
95#[doc = "Field `RXVLANGBFIM` writer - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"]
96pub type RXVLANGBFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
97#[doc = "Field `RXWDOGFIM` reader - MMC Receive Watchdog Error Frame Counter Interrupt Mask"]
98pub type RXWDOGFIM_R = crate::BitReader;
99#[doc = "Field `RXWDOGFIM` writer - MMC Receive Watchdog Error Frame Counter Interrupt Mask"]
100pub type RXWDOGFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
101#[doc = "Field `RXRCVERRFIM` reader - MMC Receive Error Frame Counter Interrupt Mask"]
102pub type RXRCVERRFIM_R = crate::BitReader;
103#[doc = "Field `RXRCVERRFIM` writer - MMC Receive Error Frame Counter Interrupt Mask"]
104pub type RXRCVERRFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
105#[doc = "Field `RXCTRLFIM` reader - MMC Receive Control Frame Counter Interrupt Mask"]
106pub type RXCTRLFIM_R = crate::BitReader;
107#[doc = "Field `RXCTRLFIM` writer - MMC Receive Control Frame Counter Interrupt Mask"]
108pub type RXCTRLFIM_W<'a, REG> = crate::BitWriter<'a, REG>;
109impl R {
110 #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"]
111 #[inline(always)]
112 pub fn rxgbfrmim(&self) -> RXGBFRMIM_R {
113 RXGBFRMIM_R::new((self.bits & 1) != 0)
114 }
115 #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask"]
116 #[inline(always)]
117 pub fn rxgboctim(&self) -> RXGBOCTIM_R {
118 RXGBOCTIM_R::new(((self.bits >> 1) & 1) != 0)
119 }
120 #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"]
121 #[inline(always)]
122 pub fn rxgoctim(&self) -> RXGOCTIM_R {
123 RXGOCTIM_R::new(((self.bits >> 2) & 1) != 0)
124 }
125 #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"]
126 #[inline(always)]
127 pub fn rxbcgfim(&self) -> RXBCGFIM_R {
128 RXBCGFIM_R::new(((self.bits >> 3) & 1) != 0)
129 }
130 #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"]
131 #[inline(always)]
132 pub fn rxmcgfim(&self) -> RXMCGFIM_R {
133 RXMCGFIM_R::new(((self.bits >> 4) & 1) != 0)
134 }
135 #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"]
136 #[inline(always)]
137 pub fn rxcrcerfim(&self) -> RXCRCERFIM_R {
138 RXCRCERFIM_R::new(((self.bits >> 5) & 1) != 0)
139 }
140 #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"]
141 #[inline(always)]
142 pub fn rxalgnerfim(&self) -> RXALGNERFIM_R {
143 RXALGNERFIM_R::new(((self.bits >> 6) & 1) != 0)
144 }
145 #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"]
146 #[inline(always)]
147 pub fn rxruntfim(&self) -> RXRUNTFIM_R {
148 RXRUNTFIM_R::new(((self.bits >> 7) & 1) != 0)
149 }
150 #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"]
151 #[inline(always)]
152 pub fn rxjaberfim(&self) -> RXJABERFIM_R {
153 RXJABERFIM_R::new(((self.bits >> 8) & 1) != 0)
154 }
155 #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"]
156 #[inline(always)]
157 pub fn rxusizegfim(&self) -> RXUSIZEGFIM_R {
158 RXUSIZEGFIM_R::new(((self.bits >> 9) & 1) != 0)
159 }
160 #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"]
161 #[inline(always)]
162 pub fn rxosizegfim(&self) -> RXOSIZEGFIM_R {
163 RXOSIZEGFIM_R::new(((self.bits >> 10) & 1) != 0)
164 }
165 #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"]
166 #[inline(always)]
167 pub fn rx64octgbfim(&self) -> RX64OCTGBFIM_R {
168 RX64OCTGBFIM_R::new(((self.bits >> 11) & 1) != 0)
169 }
170 #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
171 #[inline(always)]
172 pub fn rx65t127octgbfim(&self) -> RX65T127OCTGBFIM_R {
173 RX65T127OCTGBFIM_R::new(((self.bits >> 12) & 1) != 0)
174 }
175 #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
176 #[inline(always)]
177 pub fn rx128t255octgbfim(&self) -> RX128T255OCTGBFIM_R {
178 RX128T255OCTGBFIM_R::new(((self.bits >> 13) & 1) != 0)
179 }
180 #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
181 #[inline(always)]
182 pub fn rx256t511octgbfim(&self) -> RX256T511OCTGBFIM_R {
183 RX256T511OCTGBFIM_R::new(((self.bits >> 14) & 1) != 0)
184 }
185 #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
186 #[inline(always)]
187 pub fn rx512t1023octgbfim(&self) -> RX512T1023OCTGBFIM_R {
188 RX512T1023OCTGBFIM_R::new(((self.bits >> 15) & 1) != 0)
189 }
190 #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"]
191 #[inline(always)]
192 pub fn rx1024tmaxoctgbfim(&self) -> RX1024TMAXOCTGBFIM_R {
193 RX1024TMAXOCTGBFIM_R::new(((self.bits >> 16) & 1) != 0)
194 }
195 #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"]
196 #[inline(always)]
197 pub fn rxucgfim(&self) -> RXUCGFIM_R {
198 RXUCGFIM_R::new(((self.bits >> 17) & 1) != 0)
199 }
200 #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"]
201 #[inline(always)]
202 pub fn rxlenerfim(&self) -> RXLENERFIM_R {
203 RXLENERFIM_R::new(((self.bits >> 18) & 1) != 0)
204 }
205 #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"]
206 #[inline(always)]
207 pub fn rxorangefim(&self) -> RXORANGEFIM_R {
208 RXORANGEFIM_R::new(((self.bits >> 19) & 1) != 0)
209 }
210 #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"]
211 #[inline(always)]
212 pub fn rxpausfim(&self) -> RXPAUSFIM_R {
213 RXPAUSFIM_R::new(((self.bits >> 20) & 1) != 0)
214 }
215 #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"]
216 #[inline(always)]
217 pub fn rxfovfim(&self) -> RXFOVFIM_R {
218 RXFOVFIM_R::new(((self.bits >> 21) & 1) != 0)
219 }
220 #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"]
221 #[inline(always)]
222 pub fn rxvlangbfim(&self) -> RXVLANGBFIM_R {
223 RXVLANGBFIM_R::new(((self.bits >> 22) & 1) != 0)
224 }
225 #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"]
226 #[inline(always)]
227 pub fn rxwdogfim(&self) -> RXWDOGFIM_R {
228 RXWDOGFIM_R::new(((self.bits >> 23) & 1) != 0)
229 }
230 #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"]
231 #[inline(always)]
232 pub fn rxrcverrfim(&self) -> RXRCVERRFIM_R {
233 RXRCVERRFIM_R::new(((self.bits >> 24) & 1) != 0)
234 }
235 #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"]
236 #[inline(always)]
237 pub fn rxctrlfim(&self) -> RXCTRLFIM_R {
238 RXCTRLFIM_R::new(((self.bits >> 25) & 1) != 0)
239 }
240}
241impl W {
242 #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"]
243 #[inline(always)]
244 pub fn rxgbfrmim(&mut self) -> RXGBFRMIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
245 RXGBFRMIM_W::new(self, 0)
246 }
247 #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask"]
248 #[inline(always)]
249 pub fn rxgboctim(&mut self) -> RXGBOCTIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
250 RXGBOCTIM_W::new(self, 1)
251 }
252 #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"]
253 #[inline(always)]
254 pub fn rxgoctim(&mut self) -> RXGOCTIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
255 RXGOCTIM_W::new(self, 2)
256 }
257 #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"]
258 #[inline(always)]
259 pub fn rxbcgfim(&mut self) -> RXBCGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
260 RXBCGFIM_W::new(self, 3)
261 }
262 #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"]
263 #[inline(always)]
264 pub fn rxmcgfim(&mut self) -> RXMCGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
265 RXMCGFIM_W::new(self, 4)
266 }
267 #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"]
268 #[inline(always)]
269 pub fn rxcrcerfim(&mut self) -> RXCRCERFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
270 RXCRCERFIM_W::new(self, 5)
271 }
272 #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"]
273 #[inline(always)]
274 pub fn rxalgnerfim(&mut self) -> RXALGNERFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
275 RXALGNERFIM_W::new(self, 6)
276 }
277 #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"]
278 #[inline(always)]
279 pub fn rxruntfim(&mut self) -> RXRUNTFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
280 RXRUNTFIM_W::new(self, 7)
281 }
282 #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"]
283 #[inline(always)]
284 pub fn rxjaberfim(&mut self) -> RXJABERFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
285 RXJABERFIM_W::new(self, 8)
286 }
287 #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"]
288 #[inline(always)]
289 pub fn rxusizegfim(&mut self) -> RXUSIZEGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
290 RXUSIZEGFIM_W::new(self, 9)
291 }
292 #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"]
293 #[inline(always)]
294 pub fn rxosizegfim(&mut self) -> RXOSIZEGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
295 RXOSIZEGFIM_W::new(self, 10)
296 }
297 #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"]
298 #[inline(always)]
299 pub fn rx64octgbfim(&mut self) -> RX64OCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
300 RX64OCTGBFIM_W::new(self, 11)
301 }
302 #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"]
303 #[inline(always)]
304 pub fn rx65t127octgbfim(&mut self) -> RX65T127OCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
305 RX65T127OCTGBFIM_W::new(self, 12)
306 }
307 #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"]
308 #[inline(always)]
309 pub fn rx128t255octgbfim(&mut self) -> RX128T255OCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
310 RX128T255OCTGBFIM_W::new(self, 13)
311 }
312 #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"]
313 #[inline(always)]
314 pub fn rx256t511octgbfim(&mut self) -> RX256T511OCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
315 RX256T511OCTGBFIM_W::new(self, 14)
316 }
317 #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"]
318 #[inline(always)]
319 pub fn rx512t1023octgbfim(&mut self) -> RX512T1023OCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
320 RX512T1023OCTGBFIM_W::new(self, 15)
321 }
322 #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"]
323 #[inline(always)]
324 pub fn rx1024tmaxoctgbfim(&mut self) -> RX1024TMAXOCTGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
325 RX1024TMAXOCTGBFIM_W::new(self, 16)
326 }
327 #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"]
328 #[inline(always)]
329 pub fn rxucgfim(&mut self) -> RXUCGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
330 RXUCGFIM_W::new(self, 17)
331 }
332 #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"]
333 #[inline(always)]
334 pub fn rxlenerfim(&mut self) -> RXLENERFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
335 RXLENERFIM_W::new(self, 18)
336 }
337 #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"]
338 #[inline(always)]
339 pub fn rxorangefim(&mut self) -> RXORANGEFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
340 RXORANGEFIM_W::new(self, 19)
341 }
342 #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"]
343 #[inline(always)]
344 pub fn rxpausfim(&mut self) -> RXPAUSFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
345 RXPAUSFIM_W::new(self, 20)
346 }
347 #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"]
348 #[inline(always)]
349 pub fn rxfovfim(&mut self) -> RXFOVFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
350 RXFOVFIM_W::new(self, 21)
351 }
352 #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"]
353 #[inline(always)]
354 pub fn rxvlangbfim(&mut self) -> RXVLANGBFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
355 RXVLANGBFIM_W::new(self, 22)
356 }
357 #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"]
358 #[inline(always)]
359 pub fn rxwdogfim(&mut self) -> RXWDOGFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
360 RXWDOGFIM_W::new(self, 23)
361 }
362 #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"]
363 #[inline(always)]
364 pub fn rxrcverrfim(&mut self) -> RXRCVERRFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
365 RXRCVERRFIM_W::new(self, 24)
366 }
367 #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"]
368 #[inline(always)]
369 pub fn rxctrlfim(&mut self) -> RXCTRLFIM_W<MMC_RECEIVE_INTERRUPT_MASK_SPEC> {
370 RXCTRLFIM_W::new(self, 25)
371 }
372}
373#[doc = "MMC Reveive Interrupt Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmc_receive_interrupt_mask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmc_receive_interrupt_mask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
374pub struct MMC_RECEIVE_INTERRUPT_MASK_SPEC;
375impl crate::RegisterSpec for MMC_RECEIVE_INTERRUPT_MASK_SPEC {
376 type Ux = u32;
377}
378#[doc = "`read()` method returns [`mmc_receive_interrupt_mask::R`](R) reader structure"]
379impl crate::Readable for MMC_RECEIVE_INTERRUPT_MASK_SPEC {}
380#[doc = "`write(|w| ..)` method takes [`mmc_receive_interrupt_mask::W`](W) writer structure"]
381impl crate::Writable for MMC_RECEIVE_INTERRUPT_MASK_SPEC {
382 type Safety = crate::Unsafe;
383 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
384 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
385}
386#[doc = "`reset()` method sets MMC_RECEIVE_INTERRUPT_MASK to value 0"]
387impl crate::Resettable for MMC_RECEIVE_INTERRUPT_MASK_SPEC {
388 const RESET_VALUE: u32 = 0;
389}