xmc4700/dsd/
evflagclr.rs

1#[doc = "Register `EVFLAGCLR` writer"]
2pub type W = crate::W<EVFLAGCLR_SPEC>;
3#[doc = "Result Event Clear\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum RESEC0_A {
6    #[doc = "0: No action"]
7    VALUE1 = 0,
8    #[doc = "1: Clear bit RESEVx"]
9    VALUE2 = 1,
10}
11impl From<RESEC0_A> for bool {
12    #[inline(always)]
13    fn from(variant: RESEC0_A) -> Self {
14        variant as u8 != 0
15    }
16}
17#[doc = "Field `RESEC0` writer - Result Event Clear"]
18pub type RESEC0_W<'a, REG> = crate::BitWriter<'a, REG, RESEC0_A>;
19impl<'a, REG> RESEC0_W<'a, REG>
20where
21    REG: crate::Writable + crate::RegisterSpec,
22{
23    #[doc = "No action"]
24    #[inline(always)]
25    pub fn value1(self) -> &'a mut crate::W<REG> {
26        self.variant(RESEC0_A::VALUE1)
27    }
28    #[doc = "Clear bit RESEVx"]
29    #[inline(always)]
30    pub fn value2(self) -> &'a mut crate::W<REG> {
31        self.variant(RESEC0_A::VALUE2)
32    }
33}
34#[doc = "Result Event Clear\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum RESEC1_A {
37    #[doc = "0: No action"]
38    VALUE1 = 0,
39    #[doc = "1: Clear bit RESEVx"]
40    VALUE2 = 1,
41}
42impl From<RESEC1_A> for bool {
43    #[inline(always)]
44    fn from(variant: RESEC1_A) -> Self {
45        variant as u8 != 0
46    }
47}
48#[doc = "Field `RESEC1` writer - Result Event Clear"]
49pub type RESEC1_W<'a, REG> = crate::BitWriter<'a, REG, RESEC1_A>;
50impl<'a, REG> RESEC1_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    #[doc = "No action"]
55    #[inline(always)]
56    pub fn value1(self) -> &'a mut crate::W<REG> {
57        self.variant(RESEC1_A::VALUE1)
58    }
59    #[doc = "Clear bit RESEVx"]
60    #[inline(always)]
61    pub fn value2(self) -> &'a mut crate::W<REG> {
62        self.variant(RESEC1_A::VALUE2)
63    }
64}
65#[doc = "Result Event Clear\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum RESEC2_A {
68    #[doc = "0: No action"]
69    VALUE1 = 0,
70    #[doc = "1: Clear bit RESEVx"]
71    VALUE2 = 1,
72}
73impl From<RESEC2_A> for bool {
74    #[inline(always)]
75    fn from(variant: RESEC2_A) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `RESEC2` writer - Result Event Clear"]
80pub type RESEC2_W<'a, REG> = crate::BitWriter<'a, REG, RESEC2_A>;
81impl<'a, REG> RESEC2_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84{
85    #[doc = "No action"]
86    #[inline(always)]
87    pub fn value1(self) -> &'a mut crate::W<REG> {
88        self.variant(RESEC2_A::VALUE1)
89    }
90    #[doc = "Clear bit RESEVx"]
91    #[inline(always)]
92    pub fn value2(self) -> &'a mut crate::W<REG> {
93        self.variant(RESEC2_A::VALUE2)
94    }
95}
96#[doc = "Result Event Clear\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq, Eq)]
98pub enum RESEC3_A {
99    #[doc = "0: No action"]
100    VALUE1 = 0,
101    #[doc = "1: Clear bit RESEVx"]
102    VALUE2 = 1,
103}
104impl From<RESEC3_A> for bool {
105    #[inline(always)]
106    fn from(variant: RESEC3_A) -> Self {
107        variant as u8 != 0
108    }
109}
110#[doc = "Field `RESEC3` writer - Result Event Clear"]
111pub type RESEC3_W<'a, REG> = crate::BitWriter<'a, REG, RESEC3_A>;
112impl<'a, REG> RESEC3_W<'a, REG>
113where
114    REG: crate::Writable + crate::RegisterSpec,
115{
116    #[doc = "No action"]
117    #[inline(always)]
118    pub fn value1(self) -> &'a mut crate::W<REG> {
119        self.variant(RESEC3_A::VALUE1)
120    }
121    #[doc = "Clear bit RESEVx"]
122    #[inline(always)]
123    pub fn value2(self) -> &'a mut crate::W<REG> {
124        self.variant(RESEC3_A::VALUE2)
125    }
126}
127#[doc = "Alarm Event Clear\n\nValue on reset: 0"]
128#[derive(Clone, Copy, Debug, PartialEq, Eq)]
129pub enum ALEC0_A {
130    #[doc = "0: No action"]
131    VALUE1 = 0,
132    #[doc = "1: Clear bit ALEVx"]
133    VALUE2 = 1,
134}
135impl From<ALEC0_A> for bool {
136    #[inline(always)]
137    fn from(variant: ALEC0_A) -> Self {
138        variant as u8 != 0
139    }
140}
141#[doc = "Field `ALEC0` writer - Alarm Event Clear"]
142pub type ALEC0_W<'a, REG> = crate::BitWriter<'a, REG, ALEC0_A>;
143impl<'a, REG> ALEC0_W<'a, REG>
144where
145    REG: crate::Writable + crate::RegisterSpec,
146{
147    #[doc = "No action"]
148    #[inline(always)]
149    pub fn value1(self) -> &'a mut crate::W<REG> {
150        self.variant(ALEC0_A::VALUE1)
151    }
152    #[doc = "Clear bit ALEVx"]
153    #[inline(always)]
154    pub fn value2(self) -> &'a mut crate::W<REG> {
155        self.variant(ALEC0_A::VALUE2)
156    }
157}
158#[doc = "Alarm Event Clear\n\nValue on reset: 0"]
159#[derive(Clone, Copy, Debug, PartialEq, Eq)]
160pub enum ALEC1_A {
161    #[doc = "0: No action"]
162    VALUE1 = 0,
163    #[doc = "1: Clear bit ALEVx"]
164    VALUE2 = 1,
165}
166impl From<ALEC1_A> for bool {
167    #[inline(always)]
168    fn from(variant: ALEC1_A) -> Self {
169        variant as u8 != 0
170    }
171}
172#[doc = "Field `ALEC1` writer - Alarm Event Clear"]
173pub type ALEC1_W<'a, REG> = crate::BitWriter<'a, REG, ALEC1_A>;
174impl<'a, REG> ALEC1_W<'a, REG>
175where
176    REG: crate::Writable + crate::RegisterSpec,
177{
178    #[doc = "No action"]
179    #[inline(always)]
180    pub fn value1(self) -> &'a mut crate::W<REG> {
181        self.variant(ALEC1_A::VALUE1)
182    }
183    #[doc = "Clear bit ALEVx"]
184    #[inline(always)]
185    pub fn value2(self) -> &'a mut crate::W<REG> {
186        self.variant(ALEC1_A::VALUE2)
187    }
188}
189#[doc = "Alarm Event Clear\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum ALEC2_A {
192    #[doc = "0: No action"]
193    VALUE1 = 0,
194    #[doc = "1: Clear bit ALEVx"]
195    VALUE2 = 1,
196}
197impl From<ALEC2_A> for bool {
198    #[inline(always)]
199    fn from(variant: ALEC2_A) -> Self {
200        variant as u8 != 0
201    }
202}
203#[doc = "Field `ALEC2` writer - Alarm Event Clear"]
204pub type ALEC2_W<'a, REG> = crate::BitWriter<'a, REG, ALEC2_A>;
205impl<'a, REG> ALEC2_W<'a, REG>
206where
207    REG: crate::Writable + crate::RegisterSpec,
208{
209    #[doc = "No action"]
210    #[inline(always)]
211    pub fn value1(self) -> &'a mut crate::W<REG> {
212        self.variant(ALEC2_A::VALUE1)
213    }
214    #[doc = "Clear bit ALEVx"]
215    #[inline(always)]
216    pub fn value2(self) -> &'a mut crate::W<REG> {
217        self.variant(ALEC2_A::VALUE2)
218    }
219}
220#[doc = "Alarm Event Clear\n\nValue on reset: 0"]
221#[derive(Clone, Copy, Debug, PartialEq, Eq)]
222pub enum ALEC3_A {
223    #[doc = "0: No action"]
224    VALUE1 = 0,
225    #[doc = "1: Clear bit ALEVx"]
226    VALUE2 = 1,
227}
228impl From<ALEC3_A> for bool {
229    #[inline(always)]
230    fn from(variant: ALEC3_A) -> Self {
231        variant as u8 != 0
232    }
233}
234#[doc = "Field `ALEC3` writer - Alarm Event Clear"]
235pub type ALEC3_W<'a, REG> = crate::BitWriter<'a, REG, ALEC3_A>;
236impl<'a, REG> ALEC3_W<'a, REG>
237where
238    REG: crate::Writable + crate::RegisterSpec,
239{
240    #[doc = "No action"]
241    #[inline(always)]
242    pub fn value1(self) -> &'a mut crate::W<REG> {
243        self.variant(ALEC3_A::VALUE1)
244    }
245    #[doc = "Clear bit ALEVx"]
246    #[inline(always)]
247    pub fn value2(self) -> &'a mut crate::W<REG> {
248        self.variant(ALEC3_A::VALUE2)
249    }
250}
251impl W {
252    #[doc = "Bit 0 - Result Event Clear"]
253    #[inline(always)]
254    pub fn resec0(&mut self) -> RESEC0_W<EVFLAGCLR_SPEC> {
255        RESEC0_W::new(self, 0)
256    }
257    #[doc = "Bit 1 - Result Event Clear"]
258    #[inline(always)]
259    pub fn resec1(&mut self) -> RESEC1_W<EVFLAGCLR_SPEC> {
260        RESEC1_W::new(self, 1)
261    }
262    #[doc = "Bit 2 - Result Event Clear"]
263    #[inline(always)]
264    pub fn resec2(&mut self) -> RESEC2_W<EVFLAGCLR_SPEC> {
265        RESEC2_W::new(self, 2)
266    }
267    #[doc = "Bit 3 - Result Event Clear"]
268    #[inline(always)]
269    pub fn resec3(&mut self) -> RESEC3_W<EVFLAGCLR_SPEC> {
270        RESEC3_W::new(self, 3)
271    }
272    #[doc = "Bit 16 - Alarm Event Clear"]
273    #[inline(always)]
274    pub fn alec0(&mut self) -> ALEC0_W<EVFLAGCLR_SPEC> {
275        ALEC0_W::new(self, 16)
276    }
277    #[doc = "Bit 17 - Alarm Event Clear"]
278    #[inline(always)]
279    pub fn alec1(&mut self) -> ALEC1_W<EVFLAGCLR_SPEC> {
280        ALEC1_W::new(self, 17)
281    }
282    #[doc = "Bit 18 - Alarm Event Clear"]
283    #[inline(always)]
284    pub fn alec2(&mut self) -> ALEC2_W<EVFLAGCLR_SPEC> {
285        ALEC2_W::new(self, 18)
286    }
287    #[doc = "Bit 19 - Alarm Event Clear"]
288    #[inline(always)]
289    pub fn alec3(&mut self) -> ALEC3_W<EVFLAGCLR_SPEC> {
290        ALEC3_W::new(self, 19)
291    }
292}
293#[doc = "Event Flag Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evflagclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
294pub struct EVFLAGCLR_SPEC;
295impl crate::RegisterSpec for EVFLAGCLR_SPEC {
296    type Ux = u32;
297}
298#[doc = "`write(|w| ..)` method takes [`evflagclr::W`](W) writer structure"]
299impl crate::Writable for EVFLAGCLR_SPEC {
300    type Safety = crate::Unsafe;
301    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
302    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
303}
304#[doc = "`reset()` method sets EVFLAGCLR to value 0"]
305impl crate::Resettable for EVFLAGCLR_SPEC {
306    const RESET_VALUE: u32 = 0;
307}
xmc4700/dsd/evflagclr.rs

xmc4700/dsd/
evflagclr.rs
