xmc4700/ppb/
nvic_iser0.rs

1#[doc = "Register `NVIC_ISER0` reader"]
2pub type R = crate::R<NVIC_ISER0_SPEC>;
3#[doc = "Register `NVIC_ISER0` writer"]
4pub type W = crate::W<NVIC_ISER0_SPEC>;
5#[doc = "Interrupt set-enable bits\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u32)]
8pub enum SETENA_A {
9    #[doc = "0: interrupt disabled"]
10    VALUE3 = 0,
11    #[doc = "1: interrupt enabled."]
12    VALUE4 = 1,
13}
14impl From<SETENA_A> for u32 {
15    #[inline(always)]
16    fn from(variant: SETENA_A) -> Self {
17        variant as _
18    }
19}
20impl crate::FieldSpec for SETENA_A {
21    type Ux = u32;
22}
23impl crate::IsEnum for SETENA_A {}
24#[doc = "Field `SETENA` reader - Interrupt set-enable bits"]
25pub type SETENA_R = crate::FieldReader<SETENA_A>;
26impl SETENA_R {
27    #[doc = "Get enumerated values variant"]
28    #[inline(always)]
29    pub const fn variant(&self) -> Option<SETENA_A> {
30        match self.bits {
31            0 => Some(SETENA_A::VALUE3),
32            1 => Some(SETENA_A::VALUE4),
33            _ => None,
34        }
35    }
36    #[doc = "interrupt disabled"]
37    #[inline(always)]
38    pub fn is_value3(&self) -> bool {
39        *self == SETENA_A::VALUE3
40    }
41    #[doc = "interrupt enabled."]
42    #[inline(always)]
43    pub fn is_value4(&self) -> bool {
44        *self == SETENA_A::VALUE4
45    }
46}
47#[doc = "Field `SETENA` writer - Interrupt set-enable bits"]
48pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>;
49impl<'a, REG> SETENA_W<'a, REG>
50where
51    REG: crate::Writable + crate::RegisterSpec,
52    REG::Ux: From<u32>,
53{
54    #[doc = "interrupt disabled"]
55    #[inline(always)]
56    pub fn value3(self) -> &'a mut crate::W<REG> {
57        self.variant(SETENA_A::VALUE3)
58    }
59    #[doc = "interrupt enabled."]
60    #[inline(always)]
61    pub fn value4(self) -> &'a mut crate::W<REG> {
62        self.variant(SETENA_A::VALUE4)
63    }
64}
65impl R {
66    #[doc = "Bits 0:31 - Interrupt set-enable bits"]
67    #[inline(always)]
68    pub fn setena(&self) -> SETENA_R {
69        SETENA_R::new(self.bits)
70    }
71}
72impl W {
73    #[doc = "Bits 0:31 - Interrupt set-enable bits"]
74    #[inline(always)]
75    pub fn setena(&mut self) -> SETENA_W<NVIC_ISER0_SPEC> {
76        SETENA_W::new(self, 0)
77    }
78}
79#[doc = "Interrupt Set-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct NVIC_ISER0_SPEC;
81impl crate::RegisterSpec for NVIC_ISER0_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`nvic_iser0::R`](R) reader structure"]
85impl crate::Readable for NVIC_ISER0_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`nvic_iser0::W`](W) writer structure"]
87impl crate::Writable for NVIC_ISER0_SPEC {
88    type Safety = crate::Unsafe;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets NVIC_ISER0 to value 0"]
93impl crate::Resettable for NVIC_ISER0_SPEC {
94    const RESET_VALUE: u32 = 0;
95}
xmc4700/ppb/nvic_iser0.rs

xmc4700/ppb/
nvic_iser0.rs
