xmc4700/scu_reset/
prset2.rs

1#[doc = "Register `PRSET2` writer"]
2pub type W = crate::W<PRSET2_SPEC>;
3#[doc = "WDT Reset Assert\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum WDTRS_A {
6    #[doc = "0: No effect"]
7    VALUE1 = 0,
8    #[doc = "1: Assert reset"]
9    VALUE2 = 1,
10}
11impl From<WDTRS_A> for bool {
12    #[inline(always)]
13    fn from(variant: WDTRS_A) -> Self {
14        variant as u8 != 0
15    }
16}
17#[doc = "Field `WDTRS` writer - WDT Reset Assert"]
18pub type WDTRS_W<'a, REG> = crate::BitWriter<'a, REG, WDTRS_A>;
19impl<'a, REG> WDTRS_W<'a, REG>
20where
21    REG: crate::Writable + crate::RegisterSpec,
22{
23    #[doc = "No effect"]
24    #[inline(always)]
25    pub fn value1(self) -> &'a mut crate::W<REG> {
26        self.variant(WDTRS_A::VALUE1)
27    }
28    #[doc = "Assert reset"]
29    #[inline(always)]
30    pub fn value2(self) -> &'a mut crate::W<REG> {
31        self.variant(WDTRS_A::VALUE2)
32    }
33}
34#[doc = "ETH0 Reset Assert\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum ETH0RS_A {
37    #[doc = "0: No effect"]
38    VALUE1 = 0,
39    #[doc = "1: Assert reset"]
40    VALUE2 = 1,
41}
42impl From<ETH0RS_A> for bool {
43    #[inline(always)]
44    fn from(variant: ETH0RS_A) -> Self {
45        variant as u8 != 0
46    }
47}
48#[doc = "Field `ETH0RS` writer - ETH0 Reset Assert"]
49pub type ETH0RS_W<'a, REG> = crate::BitWriter<'a, REG, ETH0RS_A>;
50impl<'a, REG> ETH0RS_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    #[doc = "No effect"]
55    #[inline(always)]
56    pub fn value1(self) -> &'a mut crate::W<REG> {
57        self.variant(ETH0RS_A::VALUE1)
58    }
59    #[doc = "Assert reset"]
60    #[inline(always)]
61    pub fn value2(self) -> &'a mut crate::W<REG> {
62        self.variant(ETH0RS_A::VALUE2)
63    }
64}
65#[doc = "DMA0 Reset Assert\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum DMA0RS_A {
68    #[doc = "0: No effect"]
69    VALUE1 = 0,
70    #[doc = "1: Assert reset"]
71    VALUE2 = 1,
72}
73impl From<DMA0RS_A> for bool {
74    #[inline(always)]
75    fn from(variant: DMA0RS_A) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `DMA0RS` writer - DMA0 Reset Assert"]
80pub type DMA0RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA0RS_A>;
81impl<'a, REG> DMA0RS_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84{
85    #[doc = "No effect"]
86    #[inline(always)]
87    pub fn value1(self) -> &'a mut crate::W<REG> {
88        self.variant(DMA0RS_A::VALUE1)
89    }
90    #[doc = "Assert reset"]
91    #[inline(always)]
92    pub fn value2(self) -> &'a mut crate::W<REG> {
93        self.variant(DMA0RS_A::VALUE2)
94    }
95}
96#[doc = "DMA1 Reset Assert\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq, Eq)]
98pub enum DMA1RS_A {
99    #[doc = "0: No effect"]
100    VALUE1 = 0,
101    #[doc = "1: Assert reset"]
102    VALUE2 = 1,
103}
104impl From<DMA1RS_A> for bool {
105    #[inline(always)]
106    fn from(variant: DMA1RS_A) -> Self {
107        variant as u8 != 0
108    }
109}
110#[doc = "Field `DMA1RS` writer - DMA1 Reset Assert"]
111pub type DMA1RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA1RS_A>;
112impl<'a, REG> DMA1RS_W<'a, REG>
113where
114    REG: crate::Writable + crate::RegisterSpec,
115{
116    #[doc = "No effect"]
117    #[inline(always)]
118    pub fn value1(self) -> &'a mut crate::W<REG> {
119        self.variant(DMA1RS_A::VALUE1)
120    }
121    #[doc = "Assert reset"]
122    #[inline(always)]
123    pub fn value2(self) -> &'a mut crate::W<REG> {
124        self.variant(DMA1RS_A::VALUE2)
125    }
126}
127#[doc = "FCE Reset Assert\n\nValue on reset: 0"]
128#[derive(Clone, Copy, Debug, PartialEq, Eq)]
129pub enum FCERS_A {
130    #[doc = "0: No effect"]
131    VALUE1 = 0,
132    #[doc = "1: Assert reset"]
133    VALUE2 = 1,
134}
135impl From<FCERS_A> for bool {
136    #[inline(always)]
137    fn from(variant: FCERS_A) -> Self {
138        variant as u8 != 0
139    }
140}
141#[doc = "Field `FCERS` writer - FCE Reset Assert"]
142pub type FCERS_W<'a, REG> = crate::BitWriter<'a, REG, FCERS_A>;
143impl<'a, REG> FCERS_W<'a, REG>
144where
145    REG: crate::Writable + crate::RegisterSpec,
146{
147    #[doc = "No effect"]
148    #[inline(always)]
149    pub fn value1(self) -> &'a mut crate::W<REG> {
150        self.variant(FCERS_A::VALUE1)
151    }
152    #[doc = "Assert reset"]
153    #[inline(always)]
154    pub fn value2(self) -> &'a mut crate::W<REG> {
155        self.variant(FCERS_A::VALUE2)
156    }
157}
158#[doc = "USB Reset Assert\n\nValue on reset: 0"]
159#[derive(Clone, Copy, Debug, PartialEq, Eq)]
160pub enum USBRS_A {
161    #[doc = "0: No effect"]
162    VALUE1 = 0,
163    #[doc = "1: Assert reset"]
164    VALUE2 = 1,
165}
166impl From<USBRS_A> for bool {
167    #[inline(always)]
168    fn from(variant: USBRS_A) -> Self {
169        variant as u8 != 0
170    }
171}
172#[doc = "Field `USBRS` writer - USB Reset Assert"]
173pub type USBRS_W<'a, REG> = crate::BitWriter<'a, REG, USBRS_A>;
174impl<'a, REG> USBRS_W<'a, REG>
175where
176    REG: crate::Writable + crate::RegisterSpec,
177{
178    #[doc = "No effect"]
179    #[inline(always)]
180    pub fn value1(self) -> &'a mut crate::W<REG> {
181        self.variant(USBRS_A::VALUE1)
182    }
183    #[doc = "Assert reset"]
184    #[inline(always)]
185    pub fn value2(self) -> &'a mut crate::W<REG> {
186        self.variant(USBRS_A::VALUE2)
187    }
188}
189impl W {
190    #[doc = "Bit 1 - WDT Reset Assert"]
191    #[inline(always)]
192    pub fn wdtrs(&mut self) -> WDTRS_W<PRSET2_SPEC> {
193        WDTRS_W::new(self, 1)
194    }
195    #[doc = "Bit 2 - ETH0 Reset Assert"]
196    #[inline(always)]
197    pub fn eth0rs(&mut self) -> ETH0RS_W<PRSET2_SPEC> {
198        ETH0RS_W::new(self, 2)
199    }
200    #[doc = "Bit 4 - DMA0 Reset Assert"]
201    #[inline(always)]
202    pub fn dma0rs(&mut self) -> DMA0RS_W<PRSET2_SPEC> {
203        DMA0RS_W::new(self, 4)
204    }
205    #[doc = "Bit 5 - DMA1 Reset Assert"]
206    #[inline(always)]
207    pub fn dma1rs(&mut self) -> DMA1RS_W<PRSET2_SPEC> {
208        DMA1RS_W::new(self, 5)
209    }
210    #[doc = "Bit 6 - FCE Reset Assert"]
211    #[inline(always)]
212    pub fn fcers(&mut self) -> FCERS_W<PRSET2_SPEC> {
213        FCERS_W::new(self, 6)
214    }
215    #[doc = "Bit 7 - USB Reset Assert"]
216    #[inline(always)]
217    pub fn usbrs(&mut self) -> USBRS_W<PRSET2_SPEC> {
218        USBRS_W::new(self, 7)
219    }
220}
221#[doc = "RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
222pub struct PRSET2_SPEC;
223impl crate::RegisterSpec for PRSET2_SPEC {
224    type Ux = u32;
225}
226#[doc = "`write(|w| ..)` method takes [`prset2::W`](W) writer structure"]
227impl crate::Writable for PRSET2_SPEC {
228    type Safety = crate::Unsafe;
229    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
230    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
231}
232#[doc = "`reset()` method sets PRSET2 to value 0"]
233impl crate::Resettable for PRSET2_SPEC {
234    const RESET_VALUE: u32 = 0;
235}
xmc4700/scu_reset/prset2.rs

xmc4700/scu_reset/
prset2.rs
