xmc4700/port9/
pdr0.rs

1#[doc = "Register `PDR0` reader"]
2pub type R = crate::R<PDR0_SPEC>;
3#[doc = "Register `PDR0` writer"]
4pub type W = crate::W<PDR0_SPEC>;
5#[doc = "Pad Driver Mode for Pn.0\n\nValue on reset: 2"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum PD0_A {
9    #[doc = "2: A1+ strong driver, soft edge"]
10    SD_SOE = 2,
11    #[doc = "3: A1+ strong driver, slow edge"]
12    SD_SLE = 3,
13    #[doc = "4: A1+ medium driver"]
14    MD = 4,
15    #[doc = "7: A1+ weak driver"]
16    WD = 7,
17    #[doc = "0: A1+ strong driver, soft edge (alternate value)"]
18    SD_SOE_ALT = 0,
19    #[doc = "1: A1+ strong driver, slow edge (alternate value)"]
20    SD_SLE_ALT = 1,
21    #[doc = "6: A1+ medium driver (alternate value)"]
22    MD_ALT = 6,
23    #[doc = "5: A1+ weak driver (alternate value)"]
24    WD_ALT = 5,
25}
26impl From<PD0_A> for u8 {
27    #[inline(always)]
28    fn from(variant: PD0_A) -> Self {
29        variant as _
30    }
31}
32impl crate::FieldSpec for PD0_A {
33    type Ux = u8;
34}
35impl crate::IsEnum for PD0_A {}
36#[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"]
37pub type PD0_R = crate::FieldReader<PD0_A>;
38impl PD0_R {
39    #[doc = "Get enumerated values variant"]
40    #[inline(always)]
41    pub const fn variant(&self) -> PD0_A {
42        match self.bits {
43            2 => PD0_A::SD_SOE,
44            3 => PD0_A::SD_SLE,
45            4 => PD0_A::MD,
46            7 => PD0_A::WD,
47            0 => PD0_A::SD_SOE_ALT,
48            1 => PD0_A::SD_SLE_ALT,
49            6 => PD0_A::MD_ALT,
50            5 => PD0_A::WD_ALT,
51            _ => unreachable!(),
52        }
53    }
54    #[doc = "A1+ strong driver, soft edge"]
55    #[inline(always)]
56    pub fn is_sd_soe(&self) -> bool {
57        *self == PD0_A::SD_SOE
58    }
59    #[doc = "A1+ strong driver, slow edge"]
60    #[inline(always)]
61    pub fn is_sd_sle(&self) -> bool {
62        *self == PD0_A::SD_SLE
63    }
64    #[doc = "A1+ medium driver"]
65    #[inline(always)]
66    pub fn is_md(&self) -> bool {
67        *self == PD0_A::MD
68    }
69    #[doc = "A1+ weak driver"]
70    #[inline(always)]
71    pub fn is_wd(&self) -> bool {
72        *self == PD0_A::WD
73    }
74    #[doc = "A1+ strong driver, soft edge (alternate value)"]
75    #[inline(always)]
76    pub fn is_sd_soe_alt(&self) -> bool {
77        *self == PD0_A::SD_SOE_ALT
78    }
79    #[doc = "A1+ strong driver, slow edge (alternate value)"]
80    #[inline(always)]
81    pub fn is_sd_sle_alt(&self) -> bool {
82        *self == PD0_A::SD_SLE_ALT
83    }
84    #[doc = "A1+ medium driver (alternate value)"]
85    #[inline(always)]
86    pub fn is_md_alt(&self) -> bool {
87        *self == PD0_A::MD_ALT
88    }
89    #[doc = "A1+ weak driver (alternate value)"]
90    #[inline(always)]
91    pub fn is_wd_alt(&self) -> bool {
92        *self == PD0_A::WD_ALT
93    }
94}
95#[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"]
96pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD0_A, crate::Safe>;
97impl<'a, REG> PD0_W<'a, REG>
98where
99    REG: crate::Writable + crate::RegisterSpec,
100    REG::Ux: From<u8>,
101{
102    #[doc = "A1+ strong driver, soft edge"]
103    #[inline(always)]
104    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
105        self.variant(PD0_A::SD_SOE)
106    }
107    #[doc = "A1+ strong driver, slow edge"]
108    #[inline(always)]
109    pub fn sd_sle(self) -> &'a mut crate::W<REG> {
110        self.variant(PD0_A::SD_SLE)
111    }
112    #[doc = "A1+ medium driver"]
113    #[inline(always)]
114    pub fn md(self) -> &'a mut crate::W<REG> {
115        self.variant(PD0_A::MD)
116    }
117    #[doc = "A1+ weak driver"]
118    #[inline(always)]
119    pub fn wd(self) -> &'a mut crate::W<REG> {
120        self.variant(PD0_A::WD)
121    }
122    #[doc = "A1+ strong driver, soft edge (alternate value)"]
123    #[inline(always)]
124    pub fn sd_soe_alt(self) -> &'a mut crate::W<REG> {
125        self.variant(PD0_A::SD_SOE_ALT)
126    }
127    #[doc = "A1+ strong driver, slow edge (alternate value)"]
128    #[inline(always)]
129    pub fn sd_sle_alt(self) -> &'a mut crate::W<REG> {
130        self.variant(PD0_A::SD_SLE_ALT)
131    }
132    #[doc = "A1+ medium driver (alternate value)"]
133    #[inline(always)]
134    pub fn md_alt(self) -> &'a mut crate::W<REG> {
135        self.variant(PD0_A::MD_ALT)
136    }
137    #[doc = "A1+ weak driver (alternate value)"]
138    #[inline(always)]
139    pub fn wd_alt(self) -> &'a mut crate::W<REG> {
140        self.variant(PD0_A::WD_ALT)
141    }
142}
143#[doc = "Pad Driver Mode for Pn.1\n\nValue on reset: 2"]
144#[derive(Clone, Copy, Debug, PartialEq, Eq)]
145#[repr(u8)]
146pub enum PD1_A {
147    #[doc = "2: A1+ strong driver, soft edge"]
148    SD_SOE = 2,
149    #[doc = "3: A1+ strong driver, slow edge"]
150    SD_SLE = 3,
151    #[doc = "4: A1+ medium driver"]
152    MD = 4,
153    #[doc = "7: A1+ weak driver"]
154    WD = 7,
155    #[doc = "0: A1+ strong driver, soft edge (alternate value)"]
156    SD_SOE_ALT = 0,
157    #[doc = "1: A1+ strong driver, slow edge (alternate value)"]
158    SD_SLE_ALT = 1,
159    #[doc = "6: A1+ medium driver (alternate value)"]
160    MD_ALT = 6,
161    #[doc = "5: A1+ weak driver (alternate value)"]
162    WD_ALT = 5,
163}
164impl From<PD1_A> for u8 {
165    #[inline(always)]
166    fn from(variant: PD1_A) -> Self {
167        variant as _
168    }
169}
170impl crate::FieldSpec for PD1_A {
171    type Ux = u8;
172}
173impl crate::IsEnum for PD1_A {}
174#[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"]
175pub type PD1_R = crate::FieldReader<PD1_A>;
176impl PD1_R {
177    #[doc = "Get enumerated values variant"]
178    #[inline(always)]
179    pub const fn variant(&self) -> PD1_A {
180        match self.bits {
181            2 => PD1_A::SD_SOE,
182            3 => PD1_A::SD_SLE,
183            4 => PD1_A::MD,
184            7 => PD1_A::WD,
185            0 => PD1_A::SD_SOE_ALT,
186            1 => PD1_A::SD_SLE_ALT,
187            6 => PD1_A::MD_ALT,
188            5 => PD1_A::WD_ALT,
189            _ => unreachable!(),
190        }
191    }
192    #[doc = "A1+ strong driver, soft edge"]
193    #[inline(always)]
194    pub fn is_sd_soe(&self) -> bool {
195        *self == PD1_A::SD_SOE
196    }
197    #[doc = "A1+ strong driver, slow edge"]
198    #[inline(always)]
199    pub fn is_sd_sle(&self) -> bool {
200        *self == PD1_A::SD_SLE
201    }
202    #[doc = "A1+ medium driver"]
203    #[inline(always)]
204    pub fn is_md(&self) -> bool {
205        *self == PD1_A::MD
206    }
207    #[doc = "A1+ weak driver"]
208    #[inline(always)]
209    pub fn is_wd(&self) -> bool {
210        *self == PD1_A::WD
211    }
212    #[doc = "A1+ strong driver, soft edge (alternate value)"]
213    #[inline(always)]
214    pub fn is_sd_soe_alt(&self) -> bool {
215        *self == PD1_A::SD_SOE_ALT
216    }
217    #[doc = "A1+ strong driver, slow edge (alternate value)"]
218    #[inline(always)]
219    pub fn is_sd_sle_alt(&self) -> bool {
220        *self == PD1_A::SD_SLE_ALT
221    }
222    #[doc = "A1+ medium driver (alternate value)"]
223    #[inline(always)]
224    pub fn is_md_alt(&self) -> bool {
225        *self == PD1_A::MD_ALT
226    }
227    #[doc = "A1+ weak driver (alternate value)"]
228    #[inline(always)]
229    pub fn is_wd_alt(&self) -> bool {
230        *self == PD1_A::WD_ALT
231    }
232}
233#[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"]
234pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD1_A, crate::Safe>;
235impl<'a, REG> PD1_W<'a, REG>
236where
237    REG: crate::Writable + crate::RegisterSpec,
238    REG::Ux: From<u8>,
239{
240    #[doc = "A1+ strong driver, soft edge"]
241    #[inline(always)]
242    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
243        self.variant(PD1_A::SD_SOE)
244    }
245    #[doc = "A1+ strong driver, slow edge"]
246    #[inline(always)]
247    pub fn sd_sle(self) -> &'a mut crate::W<REG> {
248        self.variant(PD1_A::SD_SLE)
249    }
250    #[doc = "A1+ medium driver"]
251    #[inline(always)]
252    pub fn md(self) -> &'a mut crate::W<REG> {
253        self.variant(PD1_A::MD)
254    }
255    #[doc = "A1+ weak driver"]
256    #[inline(always)]
257    pub fn wd(self) -> &'a mut crate::W<REG> {
258        self.variant(PD1_A::WD)
259    }
260    #[doc = "A1+ strong driver, soft edge (alternate value)"]
261    #[inline(always)]
262    pub fn sd_soe_alt(self) -> &'a mut crate::W<REG> {
263        self.variant(PD1_A::SD_SOE_ALT)
264    }
265    #[doc = "A1+ strong driver, slow edge (alternate value)"]
266    #[inline(always)]
267    pub fn sd_sle_alt(self) -> &'a mut crate::W<REG> {
268        self.variant(PD1_A::SD_SLE_ALT)
269    }
270    #[doc = "A1+ medium driver (alternate value)"]
271    #[inline(always)]
272    pub fn md_alt(self) -> &'a mut crate::W<REG> {
273        self.variant(PD1_A::MD_ALT)
274    }
275    #[doc = "A1+ weak driver (alternate value)"]
276    #[inline(always)]
277    pub fn wd_alt(self) -> &'a mut crate::W<REG> {
278        self.variant(PD1_A::WD_ALT)
279    }
280}
281#[doc = "Pad Driver Mode for Pn.2\n\nValue on reset: 2"]
282#[derive(Clone, Copy, Debug, PartialEq, Eq)]
283#[repr(u8)]
284pub enum PD2_A {
285    #[doc = "2: A1+ strong driver, soft edge"]
286    SD_SOE = 2,
287    #[doc = "3: A1+ strong driver, slow edge"]
288    SD_SLE = 3,
289    #[doc = "4: A1+ medium driver"]
290    MD = 4,
291    #[doc = "7: A1+ weak driver"]
292    WD = 7,
293    #[doc = "0: A1+ strong driver, soft edge (alternate value)"]
294    SD_SOE_ALT = 0,
295    #[doc = "1: A1+ strong driver, slow edge (alternate value)"]
296    SD_SLE_ALT = 1,
297    #[doc = "6: A1+ medium driver (alternate value)"]
298    MD_ALT = 6,
299    #[doc = "5: A1+ weak driver (alternate value)"]
300    WD_ALT = 5,
301}
302impl From<PD2_A> for u8 {
303    #[inline(always)]
304    fn from(variant: PD2_A) -> Self {
305        variant as _
306    }
307}
308impl crate::FieldSpec for PD2_A {
309    type Ux = u8;
310}
311impl crate::IsEnum for PD2_A {}
312#[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"]
313pub type PD2_R = crate::FieldReader<PD2_A>;
314impl PD2_R {
315    #[doc = "Get enumerated values variant"]
316    #[inline(always)]
317    pub const fn variant(&self) -> PD2_A {
318        match self.bits {
319            2 => PD2_A::SD_SOE,
320            3 => PD2_A::SD_SLE,
321            4 => PD2_A::MD,
322            7 => PD2_A::WD,
323            0 => PD2_A::SD_SOE_ALT,
324            1 => PD2_A::SD_SLE_ALT,
325            6 => PD2_A::MD_ALT,
326            5 => PD2_A::WD_ALT,
327            _ => unreachable!(),
328        }
329    }
330    #[doc = "A1+ strong driver, soft edge"]
331    #[inline(always)]
332    pub fn is_sd_soe(&self) -> bool {
333        *self == PD2_A::SD_SOE
334    }
335    #[doc = "A1+ strong driver, slow edge"]
336    #[inline(always)]
337    pub fn is_sd_sle(&self) -> bool {
338        *self == PD2_A::SD_SLE
339    }
340    #[doc = "A1+ medium driver"]
341    #[inline(always)]
342    pub fn is_md(&self) -> bool {
343        *self == PD2_A::MD
344    }
345    #[doc = "A1+ weak driver"]
346    #[inline(always)]
347    pub fn is_wd(&self) -> bool {
348        *self == PD2_A::WD
349    }
350    #[doc = "A1+ strong driver, soft edge (alternate value)"]
351    #[inline(always)]
352    pub fn is_sd_soe_alt(&self) -> bool {
353        *self == PD2_A::SD_SOE_ALT
354    }
355    #[doc = "A1+ strong driver, slow edge (alternate value)"]
356    #[inline(always)]
357    pub fn is_sd_sle_alt(&self) -> bool {
358        *self == PD2_A::SD_SLE_ALT
359    }
360    #[doc = "A1+ medium driver (alternate value)"]
361    #[inline(always)]
362    pub fn is_md_alt(&self) -> bool {
363        *self == PD2_A::MD_ALT
364    }
365    #[doc = "A1+ weak driver (alternate value)"]
366    #[inline(always)]
367    pub fn is_wd_alt(&self) -> bool {
368        *self == PD2_A::WD_ALT
369    }
370}
371#[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"]
372pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD2_A, crate::Safe>;
373impl<'a, REG> PD2_W<'a, REG>
374where
375    REG: crate::Writable + crate::RegisterSpec,
376    REG::Ux: From<u8>,
377{
378    #[doc = "A1+ strong driver, soft edge"]
379    #[inline(always)]
380    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
381        self.variant(PD2_A::SD_SOE)
382    }
383    #[doc = "A1+ strong driver, slow edge"]
384    #[inline(always)]
385    pub fn sd_sle(self) -> &'a mut crate::W<REG> {
386        self.variant(PD2_A::SD_SLE)
387    }
388    #[doc = "A1+ medium driver"]
389    #[inline(always)]
390    pub fn md(self) -> &'a mut crate::W<REG> {
391        self.variant(PD2_A::MD)
392    }
393    #[doc = "A1+ weak driver"]
394    #[inline(always)]
395    pub fn wd(self) -> &'a mut crate::W<REG> {
396        self.variant(PD2_A::WD)
397    }
398    #[doc = "A1+ strong driver, soft edge (alternate value)"]
399    #[inline(always)]
400    pub fn sd_soe_alt(self) -> &'a mut crate::W<REG> {
401        self.variant(PD2_A::SD_SOE_ALT)
402    }
403    #[doc = "A1+ strong driver, slow edge (alternate value)"]
404    #[inline(always)]
405    pub fn sd_sle_alt(self) -> &'a mut crate::W<REG> {
406        self.variant(PD2_A::SD_SLE_ALT)
407    }
408    #[doc = "A1+ medium driver (alternate value)"]
409    #[inline(always)]
410    pub fn md_alt(self) -> &'a mut crate::W<REG> {
411        self.variant(PD2_A::MD_ALT)
412    }
413    #[doc = "A1+ weak driver (alternate value)"]
414    #[inline(always)]
415    pub fn wd_alt(self) -> &'a mut crate::W<REG> {
416        self.variant(PD2_A::WD_ALT)
417    }
418}
419#[doc = "Pad Driver Mode for Pn.3\n\nValue on reset: 2"]
420#[derive(Clone, Copy, Debug, PartialEq, Eq)]
421#[repr(u8)]
422pub enum PD3_A {
423    #[doc = "0: A2 strong driver, sharp edge"]
424    SD_SHE = 0,
425    #[doc = "1: A2 strong driver, medium edge"]
426    SD_MEE = 1,
427    #[doc = "2: A2 strong driver, soft edge"]
428    SD_SOE = 2,
429    #[doc = "4: A2 medium driver"]
430    MD = 4,
431    #[doc = "7: A2 weak driver"]
432    WD = 7,
433}
434impl From<PD3_A> for u8 {
435    #[inline(always)]
436    fn from(variant: PD3_A) -> Self {
437        variant as _
438    }
439}
440impl crate::FieldSpec for PD3_A {
441    type Ux = u8;
442}
443impl crate::IsEnum for PD3_A {}
444#[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"]
445pub type PD3_R = crate::FieldReader<PD3_A>;
446impl PD3_R {
447    #[doc = "Get enumerated values variant"]
448    #[inline(always)]
449    pub const fn variant(&self) -> Option<PD3_A> {
450        match self.bits {
451            0 => Some(PD3_A::SD_SHE),
452            1 => Some(PD3_A::SD_MEE),
453            2 => Some(PD3_A::SD_SOE),
454            4 => Some(PD3_A::MD),
455            7 => Some(PD3_A::WD),
456            _ => None,
457        }
458    }
459    #[doc = "A2 strong driver, sharp edge"]
460    #[inline(always)]
461    pub fn is_sd_she(&self) -> bool {
462        *self == PD3_A::SD_SHE
463    }
464    #[doc = "A2 strong driver, medium edge"]
465    #[inline(always)]
466    pub fn is_sd_mee(&self) -> bool {
467        *self == PD3_A::SD_MEE
468    }
469    #[doc = "A2 strong driver, soft edge"]
470    #[inline(always)]
471    pub fn is_sd_soe(&self) -> bool {
472        *self == PD3_A::SD_SOE
473    }
474    #[doc = "A2 medium driver"]
475    #[inline(always)]
476    pub fn is_md(&self) -> bool {
477        *self == PD3_A::MD
478    }
479    #[doc = "A2 weak driver"]
480    #[inline(always)]
481    pub fn is_wd(&self) -> bool {
482        *self == PD3_A::WD
483    }
484}
485#[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"]
486pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD3_A>;
487impl<'a, REG> PD3_W<'a, REG>
488where
489    REG: crate::Writable + crate::RegisterSpec,
490    REG::Ux: From<u8>,
491{
492    #[doc = "A2 strong driver, sharp edge"]
493    #[inline(always)]
494    pub fn sd_she(self) -> &'a mut crate::W<REG> {
495        self.variant(PD3_A::SD_SHE)
496    }
497    #[doc = "A2 strong driver, medium edge"]
498    #[inline(always)]
499    pub fn sd_mee(self) -> &'a mut crate::W<REG> {
500        self.variant(PD3_A::SD_MEE)
501    }
502    #[doc = "A2 strong driver, soft edge"]
503    #[inline(always)]
504    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
505        self.variant(PD3_A::SD_SOE)
506    }
507    #[doc = "A2 medium driver"]
508    #[inline(always)]
509    pub fn md(self) -> &'a mut crate::W<REG> {
510        self.variant(PD3_A::MD)
511    }
512    #[doc = "A2 weak driver"]
513    #[inline(always)]
514    pub fn wd(self) -> &'a mut crate::W<REG> {
515        self.variant(PD3_A::WD)
516    }
517}
518#[doc = "Pad Driver Mode for Pn.4\n\nValue on reset: 2"]
519#[derive(Clone, Copy, Debug, PartialEq, Eq)]
520#[repr(u8)]
521pub enum PD4_A {
522    #[doc = "0: A2 strong driver, sharp edge"]
523    SD_SHE = 0,
524    #[doc = "1: A2 strong driver, medium edge"]
525    SD_MEE = 1,
526    #[doc = "2: A2 strong driver, soft edge"]
527    SD_SOE = 2,
528    #[doc = "4: A2 medium driver"]
529    MD = 4,
530    #[doc = "7: A2 weak driver"]
531    WD = 7,
532}
533impl From<PD4_A> for u8 {
534    #[inline(always)]
535    fn from(variant: PD4_A) -> Self {
536        variant as _
537    }
538}
539impl crate::FieldSpec for PD4_A {
540    type Ux = u8;
541}
542impl crate::IsEnum for PD4_A {}
543#[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"]
544pub type PD4_R = crate::FieldReader<PD4_A>;
545impl PD4_R {
546    #[doc = "Get enumerated values variant"]
547    #[inline(always)]
548    pub const fn variant(&self) -> Option<PD4_A> {
549        match self.bits {
550            0 => Some(PD4_A::SD_SHE),
551            1 => Some(PD4_A::SD_MEE),
552            2 => Some(PD4_A::SD_SOE),
553            4 => Some(PD4_A::MD),
554            7 => Some(PD4_A::WD),
555            _ => None,
556        }
557    }
558    #[doc = "A2 strong driver, sharp edge"]
559    #[inline(always)]
560    pub fn is_sd_she(&self) -> bool {
561        *self == PD4_A::SD_SHE
562    }
563    #[doc = "A2 strong driver, medium edge"]
564    #[inline(always)]
565    pub fn is_sd_mee(&self) -> bool {
566        *self == PD4_A::SD_MEE
567    }
568    #[doc = "A2 strong driver, soft edge"]
569    #[inline(always)]
570    pub fn is_sd_soe(&self) -> bool {
571        *self == PD4_A::SD_SOE
572    }
573    #[doc = "A2 medium driver"]
574    #[inline(always)]
575    pub fn is_md(&self) -> bool {
576        *self == PD4_A::MD
577    }
578    #[doc = "A2 weak driver"]
579    #[inline(always)]
580    pub fn is_wd(&self) -> bool {
581        *self == PD4_A::WD
582    }
583}
584#[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"]
585pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD4_A>;
586impl<'a, REG> PD4_W<'a, REG>
587where
588    REG: crate::Writable + crate::RegisterSpec,
589    REG::Ux: From<u8>,
590{
591    #[doc = "A2 strong driver, sharp edge"]
592    #[inline(always)]
593    pub fn sd_she(self) -> &'a mut crate::W<REG> {
594        self.variant(PD4_A::SD_SHE)
595    }
596    #[doc = "A2 strong driver, medium edge"]
597    #[inline(always)]
598    pub fn sd_mee(self) -> &'a mut crate::W<REG> {
599        self.variant(PD4_A::SD_MEE)
600    }
601    #[doc = "A2 strong driver, soft edge"]
602    #[inline(always)]
603    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
604        self.variant(PD4_A::SD_SOE)
605    }
606    #[doc = "A2 medium driver"]
607    #[inline(always)]
608    pub fn md(self) -> &'a mut crate::W<REG> {
609        self.variant(PD4_A::MD)
610    }
611    #[doc = "A2 weak driver"]
612    #[inline(always)]
613    pub fn wd(self) -> &'a mut crate::W<REG> {
614        self.variant(PD4_A::WD)
615    }
616}
617#[doc = "Pad Driver Mode for Pn.5\n\nValue on reset: 2"]
618#[derive(Clone, Copy, Debug, PartialEq, Eq)]
619#[repr(u8)]
620pub enum PD5_A {
621    #[doc = "0: A2 strong driver, sharp edge"]
622    SD_SHE = 0,
623    #[doc = "1: A2 strong driver, medium edge"]
624    SD_MEE = 1,
625    #[doc = "2: A2 strong driver, soft edge"]
626    SD_SOE = 2,
627    #[doc = "4: A2 medium driver"]
628    MD = 4,
629    #[doc = "7: A2 weak driver"]
630    WD = 7,
631}
632impl From<PD5_A> for u8 {
633    #[inline(always)]
634    fn from(variant: PD5_A) -> Self {
635        variant as _
636    }
637}
638impl crate::FieldSpec for PD5_A {
639    type Ux = u8;
640}
641impl crate::IsEnum for PD5_A {}
642#[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"]
643pub type PD5_R = crate::FieldReader<PD5_A>;
644impl PD5_R {
645    #[doc = "Get enumerated values variant"]
646    #[inline(always)]
647    pub const fn variant(&self) -> Option<PD5_A> {
648        match self.bits {
649            0 => Some(PD5_A::SD_SHE),
650            1 => Some(PD5_A::SD_MEE),
651            2 => Some(PD5_A::SD_SOE),
652            4 => Some(PD5_A::MD),
653            7 => Some(PD5_A::WD),
654            _ => None,
655        }
656    }
657    #[doc = "A2 strong driver, sharp edge"]
658    #[inline(always)]
659    pub fn is_sd_she(&self) -> bool {
660        *self == PD5_A::SD_SHE
661    }
662    #[doc = "A2 strong driver, medium edge"]
663    #[inline(always)]
664    pub fn is_sd_mee(&self) -> bool {
665        *self == PD5_A::SD_MEE
666    }
667    #[doc = "A2 strong driver, soft edge"]
668    #[inline(always)]
669    pub fn is_sd_soe(&self) -> bool {
670        *self == PD5_A::SD_SOE
671    }
672    #[doc = "A2 medium driver"]
673    #[inline(always)]
674    pub fn is_md(&self) -> bool {
675        *self == PD5_A::MD
676    }
677    #[doc = "A2 weak driver"]
678    #[inline(always)]
679    pub fn is_wd(&self) -> bool {
680        *self == PD5_A::WD
681    }
682}
683#[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"]
684pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD5_A>;
685impl<'a, REG> PD5_W<'a, REG>
686where
687    REG: crate::Writable + crate::RegisterSpec,
688    REG::Ux: From<u8>,
689{
690    #[doc = "A2 strong driver, sharp edge"]
691    #[inline(always)]
692    pub fn sd_she(self) -> &'a mut crate::W<REG> {
693        self.variant(PD5_A::SD_SHE)
694    }
695    #[doc = "A2 strong driver, medium edge"]
696    #[inline(always)]
697    pub fn sd_mee(self) -> &'a mut crate::W<REG> {
698        self.variant(PD5_A::SD_MEE)
699    }
700    #[doc = "A2 strong driver, soft edge"]
701    #[inline(always)]
702    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
703        self.variant(PD5_A::SD_SOE)
704    }
705    #[doc = "A2 medium driver"]
706    #[inline(always)]
707    pub fn md(self) -> &'a mut crate::W<REG> {
708        self.variant(PD5_A::MD)
709    }
710    #[doc = "A2 weak driver"]
711    #[inline(always)]
712    pub fn wd(self) -> &'a mut crate::W<REG> {
713        self.variant(PD5_A::WD)
714    }
715}
716#[doc = "Pad Driver Mode for Pn.6\n\nValue on reset: 2"]
717#[derive(Clone, Copy, Debug, PartialEq, Eq)]
718#[repr(u8)]
719pub enum PD6_A {
720    #[doc = "0: A2 strong driver, sharp edge"]
721    SD_SHE = 0,
722    #[doc = "1: A2 strong driver, medium edge"]
723    SD_MEE = 1,
724    #[doc = "2: A2 strong driver, soft edge"]
725    SD_SOE = 2,
726    #[doc = "4: A2 medium driver"]
727    MD = 4,
728    #[doc = "7: A2 weak driver"]
729    WD = 7,
730}
731impl From<PD6_A> for u8 {
732    #[inline(always)]
733    fn from(variant: PD6_A) -> Self {
734        variant as _
735    }
736}
737impl crate::FieldSpec for PD6_A {
738    type Ux = u8;
739}
740impl crate::IsEnum for PD6_A {}
741#[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"]
742pub type PD6_R = crate::FieldReader<PD6_A>;
743impl PD6_R {
744    #[doc = "Get enumerated values variant"]
745    #[inline(always)]
746    pub const fn variant(&self) -> Option<PD6_A> {
747        match self.bits {
748            0 => Some(PD6_A::SD_SHE),
749            1 => Some(PD6_A::SD_MEE),
750            2 => Some(PD6_A::SD_SOE),
751            4 => Some(PD6_A::MD),
752            7 => Some(PD6_A::WD),
753            _ => None,
754        }
755    }
756    #[doc = "A2 strong driver, sharp edge"]
757    #[inline(always)]
758    pub fn is_sd_she(&self) -> bool {
759        *self == PD6_A::SD_SHE
760    }
761    #[doc = "A2 strong driver, medium edge"]
762    #[inline(always)]
763    pub fn is_sd_mee(&self) -> bool {
764        *self == PD6_A::SD_MEE
765    }
766    #[doc = "A2 strong driver, soft edge"]
767    #[inline(always)]
768    pub fn is_sd_soe(&self) -> bool {
769        *self == PD6_A::SD_SOE
770    }
771    #[doc = "A2 medium driver"]
772    #[inline(always)]
773    pub fn is_md(&self) -> bool {
774        *self == PD6_A::MD
775    }
776    #[doc = "A2 weak driver"]
777    #[inline(always)]
778    pub fn is_wd(&self) -> bool {
779        *self == PD6_A::WD
780    }
781}
782#[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"]
783pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD6_A>;
784impl<'a, REG> PD6_W<'a, REG>
785where
786    REG: crate::Writable + crate::RegisterSpec,
787    REG::Ux: From<u8>,
788{
789    #[doc = "A2 strong driver, sharp edge"]
790    #[inline(always)]
791    pub fn sd_she(self) -> &'a mut crate::W<REG> {
792        self.variant(PD6_A::SD_SHE)
793    }
794    #[doc = "A2 strong driver, medium edge"]
795    #[inline(always)]
796    pub fn sd_mee(self) -> &'a mut crate::W<REG> {
797        self.variant(PD6_A::SD_MEE)
798    }
799    #[doc = "A2 strong driver, soft edge"]
800    #[inline(always)]
801    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
802        self.variant(PD6_A::SD_SOE)
803    }
804    #[doc = "A2 medium driver"]
805    #[inline(always)]
806    pub fn md(self) -> &'a mut crate::W<REG> {
807        self.variant(PD6_A::MD)
808    }
809    #[doc = "A2 weak driver"]
810    #[inline(always)]
811    pub fn wd(self) -> &'a mut crate::W<REG> {
812        self.variant(PD6_A::WD)
813    }
814}
815#[doc = "Pad Driver Mode for Pn.7\n\nValue on reset: 2"]
816#[derive(Clone, Copy, Debug, PartialEq, Eq)]
817#[repr(u8)]
818pub enum PD7_A {
819    #[doc = "2: A1+ strong driver, soft edge"]
820    SD_SOE = 2,
821    #[doc = "3: A1+ strong driver, slow edge"]
822    SD_SLE = 3,
823    #[doc = "4: A1+ medium driver"]
824    MD = 4,
825    #[doc = "7: A1+ weak driver"]
826    WD = 7,
827    #[doc = "0: A1+ strong driver, soft edge (alternate value)"]
828    SD_SOE_ALT = 0,
829    #[doc = "1: A1+ strong driver, slow edge (alternate value)"]
830    SD_SLE_ALT = 1,
831    #[doc = "6: A1+ medium driver (alternate value)"]
832    MD_ALT = 6,
833    #[doc = "5: A1+ weak driver (alternate value)"]
834    WD_ALT = 5,
835}
836impl From<PD7_A> for u8 {
837    #[inline(always)]
838    fn from(variant: PD7_A) -> Self {
839        variant as _
840    }
841}
842impl crate::FieldSpec for PD7_A {
843    type Ux = u8;
844}
845impl crate::IsEnum for PD7_A {}
846#[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"]
847pub type PD7_R = crate::FieldReader<PD7_A>;
848impl PD7_R {
849    #[doc = "Get enumerated values variant"]
850    #[inline(always)]
851    pub const fn variant(&self) -> PD7_A {
852        match self.bits {
853            2 => PD7_A::SD_SOE,
854            3 => PD7_A::SD_SLE,
855            4 => PD7_A::MD,
856            7 => PD7_A::WD,
857            0 => PD7_A::SD_SOE_ALT,
858            1 => PD7_A::SD_SLE_ALT,
859            6 => PD7_A::MD_ALT,
860            5 => PD7_A::WD_ALT,
861            _ => unreachable!(),
862        }
863    }
864    #[doc = "A1+ strong driver, soft edge"]
865    #[inline(always)]
866    pub fn is_sd_soe(&self) -> bool {
867        *self == PD7_A::SD_SOE
868    }
869    #[doc = "A1+ strong driver, slow edge"]
870    #[inline(always)]
871    pub fn is_sd_sle(&self) -> bool {
872        *self == PD7_A::SD_SLE
873    }
874    #[doc = "A1+ medium driver"]
875    #[inline(always)]
876    pub fn is_md(&self) -> bool {
877        *self == PD7_A::MD
878    }
879    #[doc = "A1+ weak driver"]
880    #[inline(always)]
881    pub fn is_wd(&self) -> bool {
882        *self == PD7_A::WD
883    }
884    #[doc = "A1+ strong driver, soft edge (alternate value)"]
885    #[inline(always)]
886    pub fn is_sd_soe_alt(&self) -> bool {
887        *self == PD7_A::SD_SOE_ALT
888    }
889    #[doc = "A1+ strong driver, slow edge (alternate value)"]
890    #[inline(always)]
891    pub fn is_sd_sle_alt(&self) -> bool {
892        *self == PD7_A::SD_SLE_ALT
893    }
894    #[doc = "A1+ medium driver (alternate value)"]
895    #[inline(always)]
896    pub fn is_md_alt(&self) -> bool {
897        *self == PD7_A::MD_ALT
898    }
899    #[doc = "A1+ weak driver (alternate value)"]
900    #[inline(always)]
901    pub fn is_wd_alt(&self) -> bool {
902        *self == PD7_A::WD_ALT
903    }
904}
905#[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"]
906pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PD7_A, crate::Safe>;
907impl<'a, REG> PD7_W<'a, REG>
908where
909    REG: crate::Writable + crate::RegisterSpec,
910    REG::Ux: From<u8>,
911{
912    #[doc = "A1+ strong driver, soft edge"]
913    #[inline(always)]
914    pub fn sd_soe(self) -> &'a mut crate::W<REG> {
915        self.variant(PD7_A::SD_SOE)
916    }
917    #[doc = "A1+ strong driver, slow edge"]
918    #[inline(always)]
919    pub fn sd_sle(self) -> &'a mut crate::W<REG> {
920        self.variant(PD7_A::SD_SLE)
921    }
922    #[doc = "A1+ medium driver"]
923    #[inline(always)]
924    pub fn md(self) -> &'a mut crate::W<REG> {
925        self.variant(PD7_A::MD)
926    }
927    #[doc = "A1+ weak driver"]
928    #[inline(always)]
929    pub fn wd(self) -> &'a mut crate::W<REG> {
930        self.variant(PD7_A::WD)
931    }
932    #[doc = "A1+ strong driver, soft edge (alternate value)"]
933    #[inline(always)]
934    pub fn sd_soe_alt(self) -> &'a mut crate::W<REG> {
935        self.variant(PD7_A::SD_SOE_ALT)
936    }
937    #[doc = "A1+ strong driver, slow edge (alternate value)"]
938    #[inline(always)]
939    pub fn sd_sle_alt(self) -> &'a mut crate::W<REG> {
940        self.variant(PD7_A::SD_SLE_ALT)
941    }
942    #[doc = "A1+ medium driver (alternate value)"]
943    #[inline(always)]
944    pub fn md_alt(self) -> &'a mut crate::W<REG> {
945        self.variant(PD7_A::MD_ALT)
946    }
947    #[doc = "A1+ weak driver (alternate value)"]
948    #[inline(always)]
949    pub fn wd_alt(self) -> &'a mut crate::W<REG> {
950        self.variant(PD7_A::WD_ALT)
951    }
952}
953impl R {
954    #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
955    #[inline(always)]
956    pub fn pd0(&self) -> PD0_R {
957        PD0_R::new((self.bits & 7) as u8)
958    }
959    #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
960    #[inline(always)]
961    pub fn pd1(&self) -> PD1_R {
962        PD1_R::new(((self.bits >> 4) & 7) as u8)
963    }
964    #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
965    #[inline(always)]
966    pub fn pd2(&self) -> PD2_R {
967        PD2_R::new(((self.bits >> 8) & 7) as u8)
968    }
969    #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
970    #[inline(always)]
971    pub fn pd3(&self) -> PD3_R {
972        PD3_R::new(((self.bits >> 12) & 7) as u8)
973    }
974    #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
975    #[inline(always)]
976    pub fn pd4(&self) -> PD4_R {
977        PD4_R::new(((self.bits >> 16) & 7) as u8)
978    }
979    #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
980    #[inline(always)]
981    pub fn pd5(&self) -> PD5_R {
982        PD5_R::new(((self.bits >> 20) & 7) as u8)
983    }
984    #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
985    #[inline(always)]
986    pub fn pd6(&self) -> PD6_R {
987        PD6_R::new(((self.bits >> 24) & 7) as u8)
988    }
989    #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
990    #[inline(always)]
991    pub fn pd7(&self) -> PD7_R {
992        PD7_R::new(((self.bits >> 28) & 7) as u8)
993    }
994}
995impl W {
996    #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"]
997    #[inline(always)]
998    pub fn pd0(&mut self) -> PD0_W<PDR0_SPEC> {
999        PD0_W::new(self, 0)
1000    }
1001    #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"]
1002    #[inline(always)]
1003    pub fn pd1(&mut self) -> PD1_W<PDR0_SPEC> {
1004        PD1_W::new(self, 4)
1005    }
1006    #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"]
1007    #[inline(always)]
1008    pub fn pd2(&mut self) -> PD2_W<PDR0_SPEC> {
1009        PD2_W::new(self, 8)
1010    }
1011    #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"]
1012    #[inline(always)]
1013    pub fn pd3(&mut self) -> PD3_W<PDR0_SPEC> {
1014        PD3_W::new(self, 12)
1015    }
1016    #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"]
1017    #[inline(always)]
1018    pub fn pd4(&mut self) -> PD4_W<PDR0_SPEC> {
1019        PD4_W::new(self, 16)
1020    }
1021    #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"]
1022    #[inline(always)]
1023    pub fn pd5(&mut self) -> PD5_W<PDR0_SPEC> {
1024        PD5_W::new(self, 20)
1025    }
1026    #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"]
1027    #[inline(always)]
1028    pub fn pd6(&mut self) -> PD6_W<PDR0_SPEC> {
1029        PD6_W::new(self, 24)
1030    }
1031    #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"]
1032    #[inline(always)]
1033    pub fn pd7(&mut self) -> PD7_W<PDR0_SPEC> {
1034        PD7_W::new(self, 28)
1035    }
1036}
1037#[doc = "Port 9 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1038pub struct PDR0_SPEC;
1039impl crate::RegisterSpec for PDR0_SPEC {
1040    type Ux = u32;
1041}
1042#[doc = "`read()` method returns [`pdr0::R`](R) reader structure"]
1043impl crate::Readable for PDR0_SPEC {}
1044#[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"]
1045impl crate::Writable for PDR0_SPEC {
1046    type Safety = crate::Unsafe;
1047    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1048    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1049}
1050#[doc = "`reset()` method sets PDR0 to value 0x2222_2222"]
1051impl crate::Resettable for PDR0_SPEC {
1052    const RESET_VALUE: u32 = 0x2222_2222;
1053}
xmc4700/port9/pdr0.rs

xmc4700/port9/
pdr0.rs
