xmc4700/gpdma1/
reqdstreg.rs

1#[doc = "Register `REQDSTREG` reader"]
2pub type R = crate::R<REQDSTREG_SPEC>;
3#[doc = "Register `REQDSTREG` writer"]
4pub type W = crate::W<REQDSTREG_SPEC>;
5#[doc = "Field `CH0` reader - Source request for channel 0"]
6pub type CH0_R = crate::BitReader;
7#[doc = "Field `CH0` writer - Source request for channel 0"]
8pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CH1` reader - Source request for channel 1"]
10pub type CH1_R = crate::BitReader;
11#[doc = "Field `CH1` writer - Source request for channel 1"]
12pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH2` reader - Source request for channel 2"]
14pub type CH2_R = crate::BitReader;
15#[doc = "Field `CH2` writer - Source request for channel 2"]
16pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH3` reader - Source request for channel 3"]
18pub type CH3_R = crate::BitReader;
19#[doc = "Field `CH3` writer - Source request for channel 3"]
20pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Source request write enable for channel 0\n\nValue on reset: 0"]
22#[derive(Clone, Copy, Debug, PartialEq, Eq)]
23pub enum WE_CH0_A {
24    #[doc = "0: write disabled"]
25    VALUE1 = 0,
26    #[doc = "1: write enabled"]
27    VALUE2 = 1,
28}
29impl From<WE_CH0_A> for bool {
30    #[inline(always)]
31    fn from(variant: WE_CH0_A) -> Self {
32        variant as u8 != 0
33    }
34}
35#[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"]
36pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>;
37impl<'a, REG> WE_CH0_W<'a, REG>
38where
39    REG: crate::Writable + crate::RegisterSpec,
40{
41    #[doc = "write disabled"]
42    #[inline(always)]
43    pub fn value1(self) -> &'a mut crate::W<REG> {
44        self.variant(WE_CH0_A::VALUE1)
45    }
46    #[doc = "write enabled"]
47    #[inline(always)]
48    pub fn value2(self) -> &'a mut crate::W<REG> {
49        self.variant(WE_CH0_A::VALUE2)
50    }
51}
52#[doc = "Source request write enable for channel 1\n\nValue on reset: 0"]
53#[derive(Clone, Copy, Debug, PartialEq, Eq)]
54pub enum WE_CH1_A {
55    #[doc = "0: write disabled"]
56    VALUE1 = 0,
57    #[doc = "1: write enabled"]
58    VALUE2 = 1,
59}
60impl From<WE_CH1_A> for bool {
61    #[inline(always)]
62    fn from(variant: WE_CH1_A) -> Self {
63        variant as u8 != 0
64    }
65}
66#[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"]
67pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>;
68impl<'a, REG> WE_CH1_W<'a, REG>
69where
70    REG: crate::Writable + crate::RegisterSpec,
71{
72    #[doc = "write disabled"]
73    #[inline(always)]
74    pub fn value1(self) -> &'a mut crate::W<REG> {
75        self.variant(WE_CH1_A::VALUE1)
76    }
77    #[doc = "write enabled"]
78    #[inline(always)]
79    pub fn value2(self) -> &'a mut crate::W<REG> {
80        self.variant(WE_CH1_A::VALUE2)
81    }
82}
83#[doc = "Source request write enable for channel 2\n\nValue on reset: 0"]
84#[derive(Clone, Copy, Debug, PartialEq, Eq)]
85pub enum WE_CH2_A {
86    #[doc = "0: write disabled"]
87    VALUE1 = 0,
88    #[doc = "1: write enabled"]
89    VALUE2 = 1,
90}
91impl From<WE_CH2_A> for bool {
92    #[inline(always)]
93    fn from(variant: WE_CH2_A) -> Self {
94        variant as u8 != 0
95    }
96}
97#[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"]
98pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>;
99impl<'a, REG> WE_CH2_W<'a, REG>
100where
101    REG: crate::Writable + crate::RegisterSpec,
102{
103    #[doc = "write disabled"]
104    #[inline(always)]
105    pub fn value1(self) -> &'a mut crate::W<REG> {
106        self.variant(WE_CH2_A::VALUE1)
107    }
108    #[doc = "write enabled"]
109    #[inline(always)]
110    pub fn value2(self) -> &'a mut crate::W<REG> {
111        self.variant(WE_CH2_A::VALUE2)
112    }
113}
114#[doc = "Source request write enable for channel 3\n\nValue on reset: 0"]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum WE_CH3_A {
117    #[doc = "0: write disabled"]
118    VALUE1 = 0,
119    #[doc = "1: write enabled"]
120    VALUE2 = 1,
121}
122impl From<WE_CH3_A> for bool {
123    #[inline(always)]
124    fn from(variant: WE_CH3_A) -> Self {
125        variant as u8 != 0
126    }
127}
128#[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"]
129pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>;
130impl<'a, REG> WE_CH3_W<'a, REG>
131where
132    REG: crate::Writable + crate::RegisterSpec,
133{
134    #[doc = "write disabled"]
135    #[inline(always)]
136    pub fn value1(self) -> &'a mut crate::W<REG> {
137        self.variant(WE_CH3_A::VALUE1)
138    }
139    #[doc = "write enabled"]
140    #[inline(always)]
141    pub fn value2(self) -> &'a mut crate::W<REG> {
142        self.variant(WE_CH3_A::VALUE2)
143    }
144}
145impl R {
146    #[doc = "Bit 0 - Source request for channel 0"]
147    #[inline(always)]
148    pub fn ch0(&self) -> CH0_R {
149        CH0_R::new((self.bits & 1) != 0)
150    }
151    #[doc = "Bit 1 - Source request for channel 1"]
152    #[inline(always)]
153    pub fn ch1(&self) -> CH1_R {
154        CH1_R::new(((self.bits >> 1) & 1) != 0)
155    }
156    #[doc = "Bit 2 - Source request for channel 2"]
157    #[inline(always)]
158    pub fn ch2(&self) -> CH2_R {
159        CH2_R::new(((self.bits >> 2) & 1) != 0)
160    }
161    #[doc = "Bit 3 - Source request for channel 3"]
162    #[inline(always)]
163    pub fn ch3(&self) -> CH3_R {
164        CH3_R::new(((self.bits >> 3) & 1) != 0)
165    }
166}
167impl W {
168    #[doc = "Bit 0 - Source request for channel 0"]
169    #[inline(always)]
170    pub fn ch0(&mut self) -> CH0_W<REQDSTREG_SPEC> {
171        CH0_W::new(self, 0)
172    }
173    #[doc = "Bit 1 - Source request for channel 1"]
174    #[inline(always)]
175    pub fn ch1(&mut self) -> CH1_W<REQDSTREG_SPEC> {
176        CH1_W::new(self, 1)
177    }
178    #[doc = "Bit 2 - Source request for channel 2"]
179    #[inline(always)]
180    pub fn ch2(&mut self) -> CH2_W<REQDSTREG_SPEC> {
181        CH2_W::new(self, 2)
182    }
183    #[doc = "Bit 3 - Source request for channel 3"]
184    #[inline(always)]
185    pub fn ch3(&mut self) -> CH3_W<REQDSTREG_SPEC> {
186        CH3_W::new(self, 3)
187    }
188    #[doc = "Bit 8 - Source request write enable for channel 0"]
189    #[inline(always)]
190    pub fn we_ch0(&mut self) -> WE_CH0_W<REQDSTREG_SPEC> {
191        WE_CH0_W::new(self, 8)
192    }
193    #[doc = "Bit 9 - Source request write enable for channel 1"]
194    #[inline(always)]
195    pub fn we_ch1(&mut self) -> WE_CH1_W<REQDSTREG_SPEC> {
196        WE_CH1_W::new(self, 9)
197    }
198    #[doc = "Bit 10 - Source request write enable for channel 2"]
199    #[inline(always)]
200    pub fn we_ch2(&mut self) -> WE_CH2_W<REQDSTREG_SPEC> {
201        WE_CH2_W::new(self, 10)
202    }
203    #[doc = "Bit 11 - Source request write enable for channel 3"]
204    #[inline(always)]
205    pub fn we_ch3(&mut self) -> WE_CH3_W<REQDSTREG_SPEC> {
206        WE_CH3_W::new(self, 11)
207    }
208}
209#[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
210pub struct REQDSTREG_SPEC;
211impl crate::RegisterSpec for REQDSTREG_SPEC {
212    type Ux = u32;
213}
214#[doc = "`read()` method returns [`reqdstreg::R`](R) reader structure"]
215impl crate::Readable for REQDSTREG_SPEC {}
216#[doc = "`write(|w| ..)` method takes [`reqdstreg::W`](W) writer structure"]
217impl crate::Writable for REQDSTREG_SPEC {
218    type Safety = crate::Unsafe;
219    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
220    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
221}
222#[doc = "`reset()` method sets REQDSTREG to value 0"]
223impl crate::Resettable for REQDSTREG_SPEC {
224    const RESET_VALUE: u32 = 0;
225}
xmc4700/gpdma1/reqdstreg.rs

xmc4700/gpdma1/
reqdstreg.rs
