xmc4700/gpdma0/
reqsrcreg.rs

1#[doc = "Register `REQSRCREG` reader"]
2pub type R = crate::R<REQSRCREG_SPEC>;
3#[doc = "Register `REQSRCREG` writer"]
4pub type W = crate::W<REQSRCREG_SPEC>;
5#[doc = "Field `CH0` reader - Source request for channel 0"]
6pub type CH0_R = crate::BitReader;
7#[doc = "Field `CH0` writer - Source request for channel 0"]
8pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CH1` reader - Source request for channel 1"]
10pub type CH1_R = crate::BitReader;
11#[doc = "Field `CH1` writer - Source request for channel 1"]
12pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH2` reader - Source request for channel 2"]
14pub type CH2_R = crate::BitReader;
15#[doc = "Field `CH2` writer - Source request for channel 2"]
16pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH3` reader - Source request for channel 3"]
18pub type CH3_R = crate::BitReader;
19#[doc = "Field `CH3` writer - Source request for channel 3"]
20pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CH4` reader - Source request for channel 4"]
22pub type CH4_R = crate::BitReader;
23#[doc = "Field `CH4` writer - Source request for channel 4"]
24pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CH5` reader - Source request for channel 5"]
26pub type CH5_R = crate::BitReader;
27#[doc = "Field `CH5` writer - Source request for channel 5"]
28pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CH6` reader - Source request for channel 6"]
30pub type CH6_R = crate::BitReader;
31#[doc = "Field `CH6` writer - Source request for channel 6"]
32pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `CH7` reader - Source request for channel 7"]
34pub type CH7_R = crate::BitReader;
35#[doc = "Field `CH7` writer - Source request for channel 7"]
36pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Source request write enable for channel 0\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq, Eq)]
39pub enum WE_CH0_A {
40    #[doc = "0: write disabled"]
41    VALUE1 = 0,
42    #[doc = "1: write enabled"]
43    VALUE2 = 1,
44}
45impl From<WE_CH0_A> for bool {
46    #[inline(always)]
47    fn from(variant: WE_CH0_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"]
52pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>;
53impl<'a, REG> WE_CH0_W<'a, REG>
54where
55    REG: crate::Writable + crate::RegisterSpec,
56{
57    #[doc = "write disabled"]
58    #[inline(always)]
59    pub fn value1(self) -> &'a mut crate::W<REG> {
60        self.variant(WE_CH0_A::VALUE1)
61    }
62    #[doc = "write enabled"]
63    #[inline(always)]
64    pub fn value2(self) -> &'a mut crate::W<REG> {
65        self.variant(WE_CH0_A::VALUE2)
66    }
67}
68#[doc = "Source request write enable for channel 1\n\nValue on reset: 0"]
69#[derive(Clone, Copy, Debug, PartialEq, Eq)]
70pub enum WE_CH1_A {
71    #[doc = "0: write disabled"]
72    VALUE1 = 0,
73    #[doc = "1: write enabled"]
74    VALUE2 = 1,
75}
76impl From<WE_CH1_A> for bool {
77    #[inline(always)]
78    fn from(variant: WE_CH1_A) -> Self {
79        variant as u8 != 0
80    }
81}
82#[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"]
83pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>;
84impl<'a, REG> WE_CH1_W<'a, REG>
85where
86    REG: crate::Writable + crate::RegisterSpec,
87{
88    #[doc = "write disabled"]
89    #[inline(always)]
90    pub fn value1(self) -> &'a mut crate::W<REG> {
91        self.variant(WE_CH1_A::VALUE1)
92    }
93    #[doc = "write enabled"]
94    #[inline(always)]
95    pub fn value2(self) -> &'a mut crate::W<REG> {
96        self.variant(WE_CH1_A::VALUE2)
97    }
98}
99#[doc = "Source request write enable for channel 2\n\nValue on reset: 0"]
100#[derive(Clone, Copy, Debug, PartialEq, Eq)]
101pub enum WE_CH2_A {
102    #[doc = "0: write disabled"]
103    VALUE1 = 0,
104    #[doc = "1: write enabled"]
105    VALUE2 = 1,
106}
107impl From<WE_CH2_A> for bool {
108    #[inline(always)]
109    fn from(variant: WE_CH2_A) -> Self {
110        variant as u8 != 0
111    }
112}
113#[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"]
114pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>;
115impl<'a, REG> WE_CH2_W<'a, REG>
116where
117    REG: crate::Writable + crate::RegisterSpec,
118{
119    #[doc = "write disabled"]
120    #[inline(always)]
121    pub fn value1(self) -> &'a mut crate::W<REG> {
122        self.variant(WE_CH2_A::VALUE1)
123    }
124    #[doc = "write enabled"]
125    #[inline(always)]
126    pub fn value2(self) -> &'a mut crate::W<REG> {
127        self.variant(WE_CH2_A::VALUE2)
128    }
129}
130#[doc = "Source request write enable for channel 3\n\nValue on reset: 0"]
131#[derive(Clone, Copy, Debug, PartialEq, Eq)]
132pub enum WE_CH3_A {
133    #[doc = "0: write disabled"]
134    VALUE1 = 0,
135    #[doc = "1: write enabled"]
136    VALUE2 = 1,
137}
138impl From<WE_CH3_A> for bool {
139    #[inline(always)]
140    fn from(variant: WE_CH3_A) -> Self {
141        variant as u8 != 0
142    }
143}
144#[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"]
145pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>;
146impl<'a, REG> WE_CH3_W<'a, REG>
147where
148    REG: crate::Writable + crate::RegisterSpec,
149{
150    #[doc = "write disabled"]
151    #[inline(always)]
152    pub fn value1(self) -> &'a mut crate::W<REG> {
153        self.variant(WE_CH3_A::VALUE1)
154    }
155    #[doc = "write enabled"]
156    #[inline(always)]
157    pub fn value2(self) -> &'a mut crate::W<REG> {
158        self.variant(WE_CH3_A::VALUE2)
159    }
160}
161#[doc = "Source request write enable for channel 4\n\nValue on reset: 0"]
162#[derive(Clone, Copy, Debug, PartialEq, Eq)]
163pub enum WE_CH4_A {
164    #[doc = "0: write disabled"]
165    VALUE1 = 0,
166    #[doc = "1: write enabled"]
167    VALUE2 = 1,
168}
169impl From<WE_CH4_A> for bool {
170    #[inline(always)]
171    fn from(variant: WE_CH4_A) -> Self {
172        variant as u8 != 0
173    }
174}
175#[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"]
176pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>;
177impl<'a, REG> WE_CH4_W<'a, REG>
178where
179    REG: crate::Writable + crate::RegisterSpec,
180{
181    #[doc = "write disabled"]
182    #[inline(always)]
183    pub fn value1(self) -> &'a mut crate::W<REG> {
184        self.variant(WE_CH4_A::VALUE1)
185    }
186    #[doc = "write enabled"]
187    #[inline(always)]
188    pub fn value2(self) -> &'a mut crate::W<REG> {
189        self.variant(WE_CH4_A::VALUE2)
190    }
191}
192#[doc = "Source request write enable for channel 5\n\nValue on reset: 0"]
193#[derive(Clone, Copy, Debug, PartialEq, Eq)]
194pub enum WE_CH5_A {
195    #[doc = "0: write disabled"]
196    VALUE1 = 0,
197    #[doc = "1: write enabled"]
198    VALUE2 = 1,
199}
200impl From<WE_CH5_A> for bool {
201    #[inline(always)]
202    fn from(variant: WE_CH5_A) -> Self {
203        variant as u8 != 0
204    }
205}
206#[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"]
207pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>;
208impl<'a, REG> WE_CH5_W<'a, REG>
209where
210    REG: crate::Writable + crate::RegisterSpec,
211{
212    #[doc = "write disabled"]
213    #[inline(always)]
214    pub fn value1(self) -> &'a mut crate::W<REG> {
215        self.variant(WE_CH5_A::VALUE1)
216    }
217    #[doc = "write enabled"]
218    #[inline(always)]
219    pub fn value2(self) -> &'a mut crate::W<REG> {
220        self.variant(WE_CH5_A::VALUE2)
221    }
222}
223#[doc = "Source request write enable for channel 6\n\nValue on reset: 0"]
224#[derive(Clone, Copy, Debug, PartialEq, Eq)]
225pub enum WE_CH6_A {
226    #[doc = "0: write disabled"]
227    VALUE1 = 0,
228    #[doc = "1: write enabled"]
229    VALUE2 = 1,
230}
231impl From<WE_CH6_A> for bool {
232    #[inline(always)]
233    fn from(variant: WE_CH6_A) -> Self {
234        variant as u8 != 0
235    }
236}
237#[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"]
238pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>;
239impl<'a, REG> WE_CH6_W<'a, REG>
240where
241    REG: crate::Writable + crate::RegisterSpec,
242{
243    #[doc = "write disabled"]
244    #[inline(always)]
245    pub fn value1(self) -> &'a mut crate::W<REG> {
246        self.variant(WE_CH6_A::VALUE1)
247    }
248    #[doc = "write enabled"]
249    #[inline(always)]
250    pub fn value2(self) -> &'a mut crate::W<REG> {
251        self.variant(WE_CH6_A::VALUE2)
252    }
253}
254#[doc = "Source request write enable for channel 7\n\nValue on reset: 0"]
255#[derive(Clone, Copy, Debug, PartialEq, Eq)]
256pub enum WE_CH7_A {
257    #[doc = "0: write disabled"]
258    VALUE1 = 0,
259    #[doc = "1: write enabled"]
260    VALUE2 = 1,
261}
262impl From<WE_CH7_A> for bool {
263    #[inline(always)]
264    fn from(variant: WE_CH7_A) -> Self {
265        variant as u8 != 0
266    }
267}
268#[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"]
269pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>;
270impl<'a, REG> WE_CH7_W<'a, REG>
271where
272    REG: crate::Writable + crate::RegisterSpec,
273{
274    #[doc = "write disabled"]
275    #[inline(always)]
276    pub fn value1(self) -> &'a mut crate::W<REG> {
277        self.variant(WE_CH7_A::VALUE1)
278    }
279    #[doc = "write enabled"]
280    #[inline(always)]
281    pub fn value2(self) -> &'a mut crate::W<REG> {
282        self.variant(WE_CH7_A::VALUE2)
283    }
284}
285impl R {
286    #[doc = "Bit 0 - Source request for channel 0"]
287    #[inline(always)]
288    pub fn ch0(&self) -> CH0_R {
289        CH0_R::new((self.bits & 1) != 0)
290    }
291    #[doc = "Bit 1 - Source request for channel 1"]
292    #[inline(always)]
293    pub fn ch1(&self) -> CH1_R {
294        CH1_R::new(((self.bits >> 1) & 1) != 0)
295    }
296    #[doc = "Bit 2 - Source request for channel 2"]
297    #[inline(always)]
298    pub fn ch2(&self) -> CH2_R {
299        CH2_R::new(((self.bits >> 2) & 1) != 0)
300    }
301    #[doc = "Bit 3 - Source request for channel 3"]
302    #[inline(always)]
303    pub fn ch3(&self) -> CH3_R {
304        CH3_R::new(((self.bits >> 3) & 1) != 0)
305    }
306    #[doc = "Bit 4 - Source request for channel 4"]
307    #[inline(always)]
308    pub fn ch4(&self) -> CH4_R {
309        CH4_R::new(((self.bits >> 4) & 1) != 0)
310    }
311    #[doc = "Bit 5 - Source request for channel 5"]
312    #[inline(always)]
313    pub fn ch5(&self) -> CH5_R {
314        CH5_R::new(((self.bits >> 5) & 1) != 0)
315    }
316    #[doc = "Bit 6 - Source request for channel 6"]
317    #[inline(always)]
318    pub fn ch6(&self) -> CH6_R {
319        CH6_R::new(((self.bits >> 6) & 1) != 0)
320    }
321    #[doc = "Bit 7 - Source request for channel 7"]
322    #[inline(always)]
323    pub fn ch7(&self) -> CH7_R {
324        CH7_R::new(((self.bits >> 7) & 1) != 0)
325    }
326}
327impl W {
328    #[doc = "Bit 0 - Source request for channel 0"]
329    #[inline(always)]
330    pub fn ch0(&mut self) -> CH0_W<REQSRCREG_SPEC> {
331        CH0_W::new(self, 0)
332    }
333    #[doc = "Bit 1 - Source request for channel 1"]
334    #[inline(always)]
335    pub fn ch1(&mut self) -> CH1_W<REQSRCREG_SPEC> {
336        CH1_W::new(self, 1)
337    }
338    #[doc = "Bit 2 - Source request for channel 2"]
339    #[inline(always)]
340    pub fn ch2(&mut self) -> CH2_W<REQSRCREG_SPEC> {
341        CH2_W::new(self, 2)
342    }
343    #[doc = "Bit 3 - Source request for channel 3"]
344    #[inline(always)]
345    pub fn ch3(&mut self) -> CH3_W<REQSRCREG_SPEC> {
346        CH3_W::new(self, 3)
347    }
348    #[doc = "Bit 4 - Source request for channel 4"]
349    #[inline(always)]
350    pub fn ch4(&mut self) -> CH4_W<REQSRCREG_SPEC> {
351        CH4_W::new(self, 4)
352    }
353    #[doc = "Bit 5 - Source request for channel 5"]
354    #[inline(always)]
355    pub fn ch5(&mut self) -> CH5_W<REQSRCREG_SPEC> {
356        CH5_W::new(self, 5)
357    }
358    #[doc = "Bit 6 - Source request for channel 6"]
359    #[inline(always)]
360    pub fn ch6(&mut self) -> CH6_W<REQSRCREG_SPEC> {
361        CH6_W::new(self, 6)
362    }
363    #[doc = "Bit 7 - Source request for channel 7"]
364    #[inline(always)]
365    pub fn ch7(&mut self) -> CH7_W<REQSRCREG_SPEC> {
366        CH7_W::new(self, 7)
367    }
368    #[doc = "Bit 8 - Source request write enable for channel 0"]
369    #[inline(always)]
370    pub fn we_ch0(&mut self) -> WE_CH0_W<REQSRCREG_SPEC> {
371        WE_CH0_W::new(self, 8)
372    }
373    #[doc = "Bit 9 - Source request write enable for channel 1"]
374    #[inline(always)]
375    pub fn we_ch1(&mut self) -> WE_CH1_W<REQSRCREG_SPEC> {
376        WE_CH1_W::new(self, 9)
377    }
378    #[doc = "Bit 10 - Source request write enable for channel 2"]
379    #[inline(always)]
380    pub fn we_ch2(&mut self) -> WE_CH2_W<REQSRCREG_SPEC> {
381        WE_CH2_W::new(self, 10)
382    }
383    #[doc = "Bit 11 - Source request write enable for channel 3"]
384    #[inline(always)]
385    pub fn we_ch3(&mut self) -> WE_CH3_W<REQSRCREG_SPEC> {
386        WE_CH3_W::new(self, 11)
387    }
388    #[doc = "Bit 12 - Source request write enable for channel 4"]
389    #[inline(always)]
390    pub fn we_ch4(&mut self) -> WE_CH4_W<REQSRCREG_SPEC> {
391        WE_CH4_W::new(self, 12)
392    }
393    #[doc = "Bit 13 - Source request write enable for channel 5"]
394    #[inline(always)]
395    pub fn we_ch5(&mut self) -> WE_CH5_W<REQSRCREG_SPEC> {
396        WE_CH5_W::new(self, 13)
397    }
398    #[doc = "Bit 14 - Source request write enable for channel 6"]
399    #[inline(always)]
400    pub fn we_ch6(&mut self) -> WE_CH6_W<REQSRCREG_SPEC> {
401        WE_CH6_W::new(self, 14)
402    }
403    #[doc = "Bit 15 - Source request write enable for channel 7"]
404    #[inline(always)]
405    pub fn we_ch7(&mut self) -> WE_CH7_W<REQSRCREG_SPEC> {
406        WE_CH7_W::new(self, 15)
407    }
408}
409#[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
410pub struct REQSRCREG_SPEC;
411impl crate::RegisterSpec for REQSRCREG_SPEC {
412    type Ux = u32;
413}
414#[doc = "`read()` method returns [`reqsrcreg::R`](R) reader structure"]
415impl crate::Readable for REQSRCREG_SPEC {}
416#[doc = "`write(|w| ..)` method takes [`reqsrcreg::W`](W) writer structure"]
417impl crate::Writable for REQSRCREG_SPEC {
418    type Safety = crate::Unsafe;
419    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
420    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
421}
422#[doc = "`reset()` method sets REQSRCREG to value 0"]
423impl crate::Resettable for REQSRCREG_SPEC {
424    const RESET_VALUE: u32 = 0;
425}
xmc4700/gpdma0/reqsrcreg.rs

xmc4700/gpdma0/
reqsrcreg.rs
