xmc4500/usb0/
hprt.rs

1#[doc = "Register `HPRT` reader"]
2pub type R = crate::R<HPRT_SPEC>;
3#[doc = "Register `HPRT` writer"]
4pub type W = crate::W<HPRT_SPEC>;
5#[doc = "Port Connect Status\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum PRT_CONN_STS_A {
8    #[doc = "0: No device is attached to the port."]
9    VALUE1 = 0,
10    #[doc = "1: A device is attached to the port."]
11    VALUE2 = 1,
12}
13impl From<PRT_CONN_STS_A> for bool {
14    #[inline(always)]
15    fn from(variant: PRT_CONN_STS_A) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `PrtConnSts` reader - Port Connect Status"]
20pub type PRT_CONN_STS_R = crate::BitReader<PRT_CONN_STS_A>;
21impl PRT_CONN_STS_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> PRT_CONN_STS_A {
25        match self.bits {
26            false => PRT_CONN_STS_A::VALUE1,
27            true => PRT_CONN_STS_A::VALUE2,
28        }
29    }
30    #[doc = "No device is attached to the port."]
31    #[inline(always)]
32    pub fn is_value1(&self) -> bool {
33        *self == PRT_CONN_STS_A::VALUE1
34    }
35    #[doc = "A device is attached to the port."]
36    #[inline(always)]
37    pub fn is_value2(&self) -> bool {
38        *self == PRT_CONN_STS_A::VALUE2
39    }
40}
41#[doc = "Field `PrtConnDet` reader - Port Connect Detected"]
42pub type PRT_CONN_DET_R = crate::BitReader;
43#[doc = "Field `PrtConnDet` writer - Port Connect Detected"]
44pub type PRT_CONN_DET_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Port Enable\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47pub enum PRT_ENA_A {
48    #[doc = "0: Port disabled"]
49    VALUE1 = 0,
50    #[doc = "1: Port enabled"]
51    VALUE2 = 1,
52}
53impl From<PRT_ENA_A> for bool {
54    #[inline(always)]
55    fn from(variant: PRT_ENA_A) -> Self {
56        variant as u8 != 0
57    }
58}
59#[doc = "Field `PrtEna` reader - Port Enable"]
60pub type PRT_ENA_R = crate::BitReader<PRT_ENA_A>;
61impl PRT_ENA_R {
62    #[doc = "Get enumerated values variant"]
63    #[inline(always)]
64    pub const fn variant(&self) -> PRT_ENA_A {
65        match self.bits {
66            false => PRT_ENA_A::VALUE1,
67            true => PRT_ENA_A::VALUE2,
68        }
69    }
70    #[doc = "Port disabled"]
71    #[inline(always)]
72    pub fn is_value1(&self) -> bool {
73        *self == PRT_ENA_A::VALUE1
74    }
75    #[doc = "Port enabled"]
76    #[inline(always)]
77    pub fn is_value2(&self) -> bool {
78        *self == PRT_ENA_A::VALUE2
79    }
80}
81#[doc = "Field `PrtEna` writer - Port Enable"]
82pub type PRT_ENA_W<'a, REG> = crate::BitWriter<'a, REG, PRT_ENA_A>;
83impl<'a, REG> PRT_ENA_W<'a, REG>
84where
85    REG: crate::Writable + crate::RegisterSpec,
86{
87    #[doc = "Port disabled"]
88    #[inline(always)]
89    pub fn value1(self) -> &'a mut crate::W<REG> {
90        self.variant(PRT_ENA_A::VALUE1)
91    }
92    #[doc = "Port enabled"]
93    #[inline(always)]
94    pub fn value2(self) -> &'a mut crate::W<REG> {
95        self.variant(PRT_ENA_A::VALUE2)
96    }
97}
98#[doc = "Field `PrtEnChng` reader - Port Enable/Disable Change"]
99pub type PRT_EN_CHNG_R = crate::BitReader;
100#[doc = "Field `PrtEnChng` writer - Port Enable/Disable Change"]
101pub type PRT_EN_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>;
102#[doc = "Port Overcurrent Active\n\nValue on reset: 0"]
103#[derive(Clone, Copy, Debug, PartialEq, Eq)]
104pub enum PRT_OVR_CURR_ACT_A {
105    #[doc = "0: No overcurrent condition"]
106    VALUE1 = 0,
107    #[doc = "1: Overcurrent condition"]
108    VALUE2 = 1,
109}
110impl From<PRT_OVR_CURR_ACT_A> for bool {
111    #[inline(always)]
112    fn from(variant: PRT_OVR_CURR_ACT_A) -> Self {
113        variant as u8 != 0
114    }
115}
116#[doc = "Field `PrtOvrCurrAct` reader - Port Overcurrent Active"]
117pub type PRT_OVR_CURR_ACT_R = crate::BitReader<PRT_OVR_CURR_ACT_A>;
118impl PRT_OVR_CURR_ACT_R {
119    #[doc = "Get enumerated values variant"]
120    #[inline(always)]
121    pub const fn variant(&self) -> PRT_OVR_CURR_ACT_A {
122        match self.bits {
123            false => PRT_OVR_CURR_ACT_A::VALUE1,
124            true => PRT_OVR_CURR_ACT_A::VALUE2,
125        }
126    }
127    #[doc = "No overcurrent condition"]
128    #[inline(always)]
129    pub fn is_value1(&self) -> bool {
130        *self == PRT_OVR_CURR_ACT_A::VALUE1
131    }
132    #[doc = "Overcurrent condition"]
133    #[inline(always)]
134    pub fn is_value2(&self) -> bool {
135        *self == PRT_OVR_CURR_ACT_A::VALUE2
136    }
137}
138#[doc = "Field `PrtOvrCurrChng` reader - Port Overcurrent Change"]
139pub type PRT_OVR_CURR_CHNG_R = crate::BitReader;
140#[doc = "Field `PrtOvrCurrChng` writer - Port Overcurrent Change"]
141pub type PRT_OVR_CURR_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>;
142#[doc = "Port Resume\n\nValue on reset: 0"]
143#[derive(Clone, Copy, Debug, PartialEq, Eq)]
144pub enum PRT_RES_A {
145    #[doc = "0: No resume driven"]
146    VALUE1 = 0,
147    #[doc = "1: Resume driven"]
148    VALUE2 = 1,
149}
150impl From<PRT_RES_A> for bool {
151    #[inline(always)]
152    fn from(variant: PRT_RES_A) -> Self {
153        variant as u8 != 0
154    }
155}
156#[doc = "Field `PrtRes` reader - Port Resume"]
157pub type PRT_RES_R = crate::BitReader<PRT_RES_A>;
158impl PRT_RES_R {
159    #[doc = "Get enumerated values variant"]
160    #[inline(always)]
161    pub const fn variant(&self) -> PRT_RES_A {
162        match self.bits {
163            false => PRT_RES_A::VALUE1,
164            true => PRT_RES_A::VALUE2,
165        }
166    }
167    #[doc = "No resume driven"]
168    #[inline(always)]
169    pub fn is_value1(&self) -> bool {
170        *self == PRT_RES_A::VALUE1
171    }
172    #[doc = "Resume driven"]
173    #[inline(always)]
174    pub fn is_value2(&self) -> bool {
175        *self == PRT_RES_A::VALUE2
176    }
177}
178#[doc = "Field `PrtRes` writer - Port Resume"]
179pub type PRT_RES_W<'a, REG> = crate::BitWriter<'a, REG, PRT_RES_A>;
180impl<'a, REG> PRT_RES_W<'a, REG>
181where
182    REG: crate::Writable + crate::RegisterSpec,
183{
184    #[doc = "No resume driven"]
185    #[inline(always)]
186    pub fn value1(self) -> &'a mut crate::W<REG> {
187        self.variant(PRT_RES_A::VALUE1)
188    }
189    #[doc = "Resume driven"]
190    #[inline(always)]
191    pub fn value2(self) -> &'a mut crate::W<REG> {
192        self.variant(PRT_RES_A::VALUE2)
193    }
194}
195#[doc = "Port Suspend\n\nValue on reset: 0"]
196#[derive(Clone, Copy, Debug, PartialEq, Eq)]
197pub enum PRT_SUSP_A {
198    #[doc = "0: Port not in Suspend mode"]
199    VALUE1 = 0,
200    #[doc = "1: Port in Suspend mode"]
201    VALUE2 = 1,
202}
203impl From<PRT_SUSP_A> for bool {
204    #[inline(always)]
205    fn from(variant: PRT_SUSP_A) -> Self {
206        variant as u8 != 0
207    }
208}
209#[doc = "Field `PrtSusp` reader - Port Suspend"]
210pub type PRT_SUSP_R = crate::BitReader<PRT_SUSP_A>;
211impl PRT_SUSP_R {
212    #[doc = "Get enumerated values variant"]
213    #[inline(always)]
214    pub const fn variant(&self) -> PRT_SUSP_A {
215        match self.bits {
216            false => PRT_SUSP_A::VALUE1,
217            true => PRT_SUSP_A::VALUE2,
218        }
219    }
220    #[doc = "Port not in Suspend mode"]
221    #[inline(always)]
222    pub fn is_value1(&self) -> bool {
223        *self == PRT_SUSP_A::VALUE1
224    }
225    #[doc = "Port in Suspend mode"]
226    #[inline(always)]
227    pub fn is_value2(&self) -> bool {
228        *self == PRT_SUSP_A::VALUE2
229    }
230}
231#[doc = "Field `PrtSusp` writer - Port Suspend"]
232pub type PRT_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, PRT_SUSP_A>;
233impl<'a, REG> PRT_SUSP_W<'a, REG>
234where
235    REG: crate::Writable + crate::RegisterSpec,
236{
237    #[doc = "Port not in Suspend mode"]
238    #[inline(always)]
239    pub fn value1(self) -> &'a mut crate::W<REG> {
240        self.variant(PRT_SUSP_A::VALUE1)
241    }
242    #[doc = "Port in Suspend mode"]
243    #[inline(always)]
244    pub fn value2(self) -> &'a mut crate::W<REG> {
245        self.variant(PRT_SUSP_A::VALUE2)
246    }
247}
248#[doc = "Port Reset\n\nValue on reset: 0"]
249#[derive(Clone, Copy, Debug, PartialEq, Eq)]
250pub enum PRT_RST_A {
251    #[doc = "0: Port not in reset"]
252    VALUE1 = 0,
253    #[doc = "1: Port in reset"]
254    VALUE2 = 1,
255}
256impl From<PRT_RST_A> for bool {
257    #[inline(always)]
258    fn from(variant: PRT_RST_A) -> Self {
259        variant as u8 != 0
260    }
261}
262#[doc = "Field `PrtRst` reader - Port Reset"]
263pub type PRT_RST_R = crate::BitReader<PRT_RST_A>;
264impl PRT_RST_R {
265    #[doc = "Get enumerated values variant"]
266    #[inline(always)]
267    pub const fn variant(&self) -> PRT_RST_A {
268        match self.bits {
269            false => PRT_RST_A::VALUE1,
270            true => PRT_RST_A::VALUE2,
271        }
272    }
273    #[doc = "Port not in reset"]
274    #[inline(always)]
275    pub fn is_value1(&self) -> bool {
276        *self == PRT_RST_A::VALUE1
277    }
278    #[doc = "Port in reset"]
279    #[inline(always)]
280    pub fn is_value2(&self) -> bool {
281        *self == PRT_RST_A::VALUE2
282    }
283}
284#[doc = "Field `PrtRst` writer - Port Reset"]
285pub type PRT_RST_W<'a, REG> = crate::BitWriter<'a, REG, PRT_RST_A>;
286impl<'a, REG> PRT_RST_W<'a, REG>
287where
288    REG: crate::Writable + crate::RegisterSpec,
289{
290    #[doc = "Port not in reset"]
291    #[inline(always)]
292    pub fn value1(self) -> &'a mut crate::W<REG> {
293        self.variant(PRT_RST_A::VALUE1)
294    }
295    #[doc = "Port in reset"]
296    #[inline(always)]
297    pub fn value2(self) -> &'a mut crate::W<REG> {
298        self.variant(PRT_RST_A::VALUE2)
299    }
300}
301#[doc = "Field `PrtLnSts` reader - Port Line Status"]
302pub type PRT_LN_STS_R = crate::FieldReader;
303#[doc = "Port Power\n\nValue on reset: 0"]
304#[derive(Clone, Copy, Debug, PartialEq, Eq)]
305pub enum PRT_PWR_A {
306    #[doc = "0: Power off"]
307    VALUE1 = 0,
308    #[doc = "1: Power on"]
309    VALUE2 = 1,
310}
311impl From<PRT_PWR_A> for bool {
312    #[inline(always)]
313    fn from(variant: PRT_PWR_A) -> Self {
314        variant as u8 != 0
315    }
316}
317#[doc = "Field `PrtPwr` reader - Port Power"]
318pub type PRT_PWR_R = crate::BitReader<PRT_PWR_A>;
319impl PRT_PWR_R {
320    #[doc = "Get enumerated values variant"]
321    #[inline(always)]
322    pub const fn variant(&self) -> PRT_PWR_A {
323        match self.bits {
324            false => PRT_PWR_A::VALUE1,
325            true => PRT_PWR_A::VALUE2,
326        }
327    }
328    #[doc = "Power off"]
329    #[inline(always)]
330    pub fn is_value1(&self) -> bool {
331        *self == PRT_PWR_A::VALUE1
332    }
333    #[doc = "Power on"]
334    #[inline(always)]
335    pub fn is_value2(&self) -> bool {
336        *self == PRT_PWR_A::VALUE2
337    }
338}
339#[doc = "Field `PrtPwr` writer - Port Power"]
340pub type PRT_PWR_W<'a, REG> = crate::BitWriter<'a, REG, PRT_PWR_A>;
341impl<'a, REG> PRT_PWR_W<'a, REG>
342where
343    REG: crate::Writable + crate::RegisterSpec,
344{
345    #[doc = "Power off"]
346    #[inline(always)]
347    pub fn value1(self) -> &'a mut crate::W<REG> {
348        self.variant(PRT_PWR_A::VALUE1)
349    }
350    #[doc = "Power on"]
351    #[inline(always)]
352    pub fn value2(self) -> &'a mut crate::W<REG> {
353        self.variant(PRT_PWR_A::VALUE2)
354    }
355}
356#[doc = "Port Speed\n\nValue on reset: 0"]
357#[derive(Clone, Copy, Debug, PartialEq, Eq)]
358#[repr(u8)]
359pub enum PRT_SPD_A {
360    #[doc = "1: Full speed"]
361    VALUE1 = 1,
362}
363impl From<PRT_SPD_A> for u8 {
364    #[inline(always)]
365    fn from(variant: PRT_SPD_A) -> Self {
366        variant as _
367    }
368}
369impl crate::FieldSpec for PRT_SPD_A {
370    type Ux = u8;
371}
372impl crate::IsEnum for PRT_SPD_A {}
373#[doc = "Field `PrtSpd` reader - Port Speed"]
374pub type PRT_SPD_R = crate::FieldReader<PRT_SPD_A>;
375impl PRT_SPD_R {
376    #[doc = "Get enumerated values variant"]
377    #[inline(always)]
378    pub const fn variant(&self) -> Option<PRT_SPD_A> {
379        match self.bits {
380            1 => Some(PRT_SPD_A::VALUE1),
381            _ => None,
382        }
383    }
384    #[doc = "Full speed"]
385    #[inline(always)]
386    pub fn is_value1(&self) -> bool {
387        *self == PRT_SPD_A::VALUE1
388    }
389}
390impl R {
391    #[doc = "Bit 0 - Port Connect Status"]
392    #[inline(always)]
393    pub fn prt_conn_sts(&self) -> PRT_CONN_STS_R {
394        PRT_CONN_STS_R::new((self.bits & 1) != 0)
395    }
396    #[doc = "Bit 1 - Port Connect Detected"]
397    #[inline(always)]
398    pub fn prt_conn_det(&self) -> PRT_CONN_DET_R {
399        PRT_CONN_DET_R::new(((self.bits >> 1) & 1) != 0)
400    }
401    #[doc = "Bit 2 - Port Enable"]
402    #[inline(always)]
403    pub fn prt_ena(&self) -> PRT_ENA_R {
404        PRT_ENA_R::new(((self.bits >> 2) & 1) != 0)
405    }
406    #[doc = "Bit 3 - Port Enable/Disable Change"]
407    #[inline(always)]
408    pub fn prt_en_chng(&self) -> PRT_EN_CHNG_R {
409        PRT_EN_CHNG_R::new(((self.bits >> 3) & 1) != 0)
410    }
411    #[doc = "Bit 4 - Port Overcurrent Active"]
412    #[inline(always)]
413    pub fn prt_ovr_curr_act(&self) -> PRT_OVR_CURR_ACT_R {
414        PRT_OVR_CURR_ACT_R::new(((self.bits >> 4) & 1) != 0)
415    }
416    #[doc = "Bit 5 - Port Overcurrent Change"]
417    #[inline(always)]
418    pub fn prt_ovr_curr_chng(&self) -> PRT_OVR_CURR_CHNG_R {
419        PRT_OVR_CURR_CHNG_R::new(((self.bits >> 5) & 1) != 0)
420    }
421    #[doc = "Bit 6 - Port Resume"]
422    #[inline(always)]
423    pub fn prt_res(&self) -> PRT_RES_R {
424        PRT_RES_R::new(((self.bits >> 6) & 1) != 0)
425    }
426    #[doc = "Bit 7 - Port Suspend"]
427    #[inline(always)]
428    pub fn prt_susp(&self) -> PRT_SUSP_R {
429        PRT_SUSP_R::new(((self.bits >> 7) & 1) != 0)
430    }
431    #[doc = "Bit 8 - Port Reset"]
432    #[inline(always)]
433    pub fn prt_rst(&self) -> PRT_RST_R {
434        PRT_RST_R::new(((self.bits >> 8) & 1) != 0)
435    }
436    #[doc = "Bits 10:11 - Port Line Status"]
437    #[inline(always)]
438    pub fn prt_ln_sts(&self) -> PRT_LN_STS_R {
439        PRT_LN_STS_R::new(((self.bits >> 10) & 3) as u8)
440    }
441    #[doc = "Bit 12 - Port Power"]
442    #[inline(always)]
443    pub fn prt_pwr(&self) -> PRT_PWR_R {
444        PRT_PWR_R::new(((self.bits >> 12) & 1) != 0)
445    }
446    #[doc = "Bits 17:18 - Port Speed"]
447    #[inline(always)]
448    pub fn prt_spd(&self) -> PRT_SPD_R {
449        PRT_SPD_R::new(((self.bits >> 17) & 3) as u8)
450    }
451}
452impl W {
453    #[doc = "Bit 1 - Port Connect Detected"]
454    #[inline(always)]
455    pub fn prt_conn_det(&mut self) -> PRT_CONN_DET_W<HPRT_SPEC> {
456        PRT_CONN_DET_W::new(self, 1)
457    }
458    #[doc = "Bit 2 - Port Enable"]
459    #[inline(always)]
460    pub fn prt_ena(&mut self) -> PRT_ENA_W<HPRT_SPEC> {
461        PRT_ENA_W::new(self, 2)
462    }
463    #[doc = "Bit 3 - Port Enable/Disable Change"]
464    #[inline(always)]
465    pub fn prt_en_chng(&mut self) -> PRT_EN_CHNG_W<HPRT_SPEC> {
466        PRT_EN_CHNG_W::new(self, 3)
467    }
468    #[doc = "Bit 5 - Port Overcurrent Change"]
469    #[inline(always)]
470    pub fn prt_ovr_curr_chng(&mut self) -> PRT_OVR_CURR_CHNG_W<HPRT_SPEC> {
471        PRT_OVR_CURR_CHNG_W::new(self, 5)
472    }
473    #[doc = "Bit 6 - Port Resume"]
474    #[inline(always)]
475    pub fn prt_res(&mut self) -> PRT_RES_W<HPRT_SPEC> {
476        PRT_RES_W::new(self, 6)
477    }
478    #[doc = "Bit 7 - Port Suspend"]
479    #[inline(always)]
480    pub fn prt_susp(&mut self) -> PRT_SUSP_W<HPRT_SPEC> {
481        PRT_SUSP_W::new(self, 7)
482    }
483    #[doc = "Bit 8 - Port Reset"]
484    #[inline(always)]
485    pub fn prt_rst(&mut self) -> PRT_RST_W<HPRT_SPEC> {
486        PRT_RST_W::new(self, 8)
487    }
488    #[doc = "Bit 12 - Port Power"]
489    #[inline(always)]
490    pub fn prt_pwr(&mut self) -> PRT_PWR_W<HPRT_SPEC> {
491        PRT_PWR_W::new(self, 12)
492    }
493}
494#[doc = "Host Port Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hprt::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hprt::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
495pub struct HPRT_SPEC;
496impl crate::RegisterSpec for HPRT_SPEC {
497    type Ux = u32;
498}
499#[doc = "`read()` method returns [`hprt::R`](R) reader structure"]
500impl crate::Readable for HPRT_SPEC {}
501#[doc = "`write(|w| ..)` method takes [`hprt::W`](W) writer structure"]
502impl crate::Writable for HPRT_SPEC {
503    type Safety = crate::Unsafe;
504    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
505    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
506}
507#[doc = "`reset()` method sets HPRT to value 0"]
508impl crate::Resettable for HPRT_SPEC {
509    const RESET_VALUE: u32 = 0;
510}
xmc4500/usb0/hprt.rs

xmc4500/usb0/
hprt.rs
