xmc4500/usb0/
gintsts_hostmode.rs1#[doc = "Register `GINTSTS_HOSTMODE` reader"]
2pub type R = crate::R<GINTSTS_HOSTMODE_SPEC>;
3#[doc = "Register `GINTSTS_HOSTMODE` writer"]
4pub type W = crate::W<GINTSTS_HOSTMODE_SPEC>;
5#[doc = "Current Mode of Operation\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum CUR_MOD_A {
8 #[doc = "0: Device mode"]
9 VALUE1 = 0,
10 #[doc = "1: Host mode"]
11 VALUE2 = 1,
12}
13impl From<CUR_MOD_A> for bool {
14 #[inline(always)]
15 fn from(variant: CUR_MOD_A) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Field `CurMod` reader - Current Mode of Operation"]
20pub type CUR_MOD_R = crate::BitReader<CUR_MOD_A>;
21impl CUR_MOD_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> CUR_MOD_A {
25 match self.bits {
26 false => CUR_MOD_A::VALUE1,
27 true => CUR_MOD_A::VALUE2,
28 }
29 }
30 #[doc = "Device mode"]
31 #[inline(always)]
32 pub fn is_value1(&self) -> bool {
33 *self == CUR_MOD_A::VALUE1
34 }
35 #[doc = "Host mode"]
36 #[inline(always)]
37 pub fn is_value2(&self) -> bool {
38 *self == CUR_MOD_A::VALUE2
39 }
40}
41#[doc = "Field `ModeMis` reader - Mode Mismatch Interrupt"]
42pub type MODE_MIS_R = crate::BitReader;
43#[doc = "Field `ModeMis` writer - Mode Mismatch Interrupt"]
44pub type MODE_MIS_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `OTGInt` reader - OTG Interrupt"]
46pub type OTGINT_R = crate::BitReader;
47#[doc = "Field `Sof` reader - Start of Frame"]
48pub type SOF_R = crate::BitReader;
49#[doc = "Field `Sof` writer - Start of Frame"]
50pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
51#[doc = "Field `RxFLvl` reader - RxFIFO Non-Empty"]
52pub type RX_FLVL_R = crate::BitReader;
53#[doc = "Field `incomplP` reader - Incomplete Periodic Transfer"]
54pub type INCOMPL_P_R = crate::BitReader;
55#[doc = "Field `incomplP` writer - Incomplete Periodic Transfer"]
56pub type INCOMPL_P_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `PrtInt` reader - Host Port Interrupt"]
58pub type PRT_INT_R = crate::BitReader;
59#[doc = "Field `HChInt` reader - Host Channels Interrupt"]
60pub type HCH_INT_R = crate::BitReader;
61#[doc = "Field `PTxFEmp` reader - Periodic TxFIFO Empty"]
62pub type PTX_FEMP_R = crate::BitReader;
63#[doc = "Field `ConIDStsChng` reader - Connector ID Status Change"]
64pub type CON_IDSTS_CHNG_R = crate::BitReader;
65#[doc = "Field `ConIDStsChng` writer - Connector ID Status Change"]
66pub type CON_IDSTS_CHNG_W<'a, REG> = crate::BitWriter<'a, REG>;
67#[doc = "Field `DisconnInt` reader - Disconnect Detected Interrupt"]
68pub type DISCONN_INT_R = crate::BitReader;
69#[doc = "Field `DisconnInt` writer - Disconnect Detected Interrupt"]
70pub type DISCONN_INT_W<'a, REG> = crate::BitWriter<'a, REG>;
71#[doc = "Field `SessReqInt` reader - Session Request/New Session Detected Interrupt"]
72pub type SESS_REQ_INT_R = crate::BitReader;
73#[doc = "Field `SessReqInt` writer - Session Request/New Session Detected Interrupt"]
74pub type SESS_REQ_INT_W<'a, REG> = crate::BitWriter<'a, REG>;
75#[doc = "Field `WkUpInt` reader - Resume/Remote Wakeup Detected Interrupt"]
76pub type WK_UP_INT_R = crate::BitReader;
77#[doc = "Field `WkUpInt` writer - Resume/Remote Wakeup Detected Interrupt"]
78pub type WK_UP_INT_W<'a, REG> = crate::BitWriter<'a, REG>;
79impl R {
80 #[doc = "Bit 0 - Current Mode of Operation"]
81 #[inline(always)]
82 pub fn cur_mod(&self) -> CUR_MOD_R {
83 CUR_MOD_R::new((self.bits & 1) != 0)
84 }
85 #[doc = "Bit 1 - Mode Mismatch Interrupt"]
86 #[inline(always)]
87 pub fn mode_mis(&self) -> MODE_MIS_R {
88 MODE_MIS_R::new(((self.bits >> 1) & 1) != 0)
89 }
90 #[doc = "Bit 2 - OTG Interrupt"]
91 #[inline(always)]
92 pub fn otgint(&self) -> OTGINT_R {
93 OTGINT_R::new(((self.bits >> 2) & 1) != 0)
94 }
95 #[doc = "Bit 3 - Start of Frame"]
96 #[inline(always)]
97 pub fn sof(&self) -> SOF_R {
98 SOF_R::new(((self.bits >> 3) & 1) != 0)
99 }
100 #[doc = "Bit 4 - RxFIFO Non-Empty"]
101 #[inline(always)]
102 pub fn rx_flvl(&self) -> RX_FLVL_R {
103 RX_FLVL_R::new(((self.bits >> 4) & 1) != 0)
104 }
105 #[doc = "Bit 21 - Incomplete Periodic Transfer"]
106 #[inline(always)]
107 pub fn incompl_p(&self) -> INCOMPL_P_R {
108 INCOMPL_P_R::new(((self.bits >> 21) & 1) != 0)
109 }
110 #[doc = "Bit 24 - Host Port Interrupt"]
111 #[inline(always)]
112 pub fn prt_int(&self) -> PRT_INT_R {
113 PRT_INT_R::new(((self.bits >> 24) & 1) != 0)
114 }
115 #[doc = "Bit 25 - Host Channels Interrupt"]
116 #[inline(always)]
117 pub fn hch_int(&self) -> HCH_INT_R {
118 HCH_INT_R::new(((self.bits >> 25) & 1) != 0)
119 }
120 #[doc = "Bit 26 - Periodic TxFIFO Empty"]
121 #[inline(always)]
122 pub fn ptx_femp(&self) -> PTX_FEMP_R {
123 PTX_FEMP_R::new(((self.bits >> 26) & 1) != 0)
124 }
125 #[doc = "Bit 28 - Connector ID Status Change"]
126 #[inline(always)]
127 pub fn con_idsts_chng(&self) -> CON_IDSTS_CHNG_R {
128 CON_IDSTS_CHNG_R::new(((self.bits >> 28) & 1) != 0)
129 }
130 #[doc = "Bit 29 - Disconnect Detected Interrupt"]
131 #[inline(always)]
132 pub fn disconn_int(&self) -> DISCONN_INT_R {
133 DISCONN_INT_R::new(((self.bits >> 29) & 1) != 0)
134 }
135 #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"]
136 #[inline(always)]
137 pub fn sess_req_int(&self) -> SESS_REQ_INT_R {
138 SESS_REQ_INT_R::new(((self.bits >> 30) & 1) != 0)
139 }
140 #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"]
141 #[inline(always)]
142 pub fn wk_up_int(&self) -> WK_UP_INT_R {
143 WK_UP_INT_R::new(((self.bits >> 31) & 1) != 0)
144 }
145}
146impl W {
147 #[doc = "Bit 1 - Mode Mismatch Interrupt"]
148 #[inline(always)]
149 pub fn mode_mis(&mut self) -> MODE_MIS_W<GINTSTS_HOSTMODE_SPEC> {
150 MODE_MIS_W::new(self, 1)
151 }
152 #[doc = "Bit 3 - Start of Frame"]
153 #[inline(always)]
154 pub fn sof(&mut self) -> SOF_W<GINTSTS_HOSTMODE_SPEC> {
155 SOF_W::new(self, 3)
156 }
157 #[doc = "Bit 21 - Incomplete Periodic Transfer"]
158 #[inline(always)]
159 pub fn incompl_p(&mut self) -> INCOMPL_P_W<GINTSTS_HOSTMODE_SPEC> {
160 INCOMPL_P_W::new(self, 21)
161 }
162 #[doc = "Bit 28 - Connector ID Status Change"]
163 #[inline(always)]
164 pub fn con_idsts_chng(&mut self) -> CON_IDSTS_CHNG_W<GINTSTS_HOSTMODE_SPEC> {
165 CON_IDSTS_CHNG_W::new(self, 28)
166 }
167 #[doc = "Bit 29 - Disconnect Detected Interrupt"]
168 #[inline(always)]
169 pub fn disconn_int(&mut self) -> DISCONN_INT_W<GINTSTS_HOSTMODE_SPEC> {
170 DISCONN_INT_W::new(self, 29)
171 }
172 #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"]
173 #[inline(always)]
174 pub fn sess_req_int(&mut self) -> SESS_REQ_INT_W<GINTSTS_HOSTMODE_SPEC> {
175 SESS_REQ_INT_W::new(self, 30)
176 }
177 #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"]
178 #[inline(always)]
179 pub fn wk_up_int(&mut self) -> WK_UP_INT_W<GINTSTS_HOSTMODE_SPEC> {
180 WK_UP_INT_W::new(self, 31)
181 }
182}
183#[doc = "Interrupt Register \\[HOSTMODE\\]\n\nYou can [`read`](crate::Reg::read) this register and get [`gintsts_hostmode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gintsts_hostmode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
184pub struct GINTSTS_HOSTMODE_SPEC;
185impl crate::RegisterSpec for GINTSTS_HOSTMODE_SPEC {
186 type Ux = u32;
187}
188#[doc = "`read()` method returns [`gintsts_hostmode::R`](R) reader structure"]
189impl crate::Readable for GINTSTS_HOSTMODE_SPEC {}
190#[doc = "`write(|w| ..)` method takes [`gintsts_hostmode::W`](W) writer structure"]
191impl crate::Writable for GINTSTS_HOSTMODE_SPEC {
192 type Safety = crate::Unsafe;
193 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
194 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
195}
196#[doc = "`reset()` method sets GINTSTS_HOSTMODE to value 0x1400_0020"]
197impl crate::Resettable for GINTSTS_HOSTMODE_SPEC {
198 const RESET_VALUE: u32 = 0x1400_0020;
199}