xmc4500/vadc_g0/
synctr.rs

1#[doc = "Register `SYNCTR` reader"]
2pub type R = crate::R<SYNCTR_SPEC>;
3#[doc = "Register `SYNCTR` writer"]
4pub type W = crate::W<SYNCTR_SPEC>;
5#[doc = "Start Selection\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum STSEL_A {
9    #[doc = "0: Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"]
10    VALUE1 = 0,
11    #[doc = "1: Kernel is synchronization slave: Control information from input CI1"]
12    VALUE2 = 1,
13    #[doc = "2: Kernel is synchronization slave: Control information from input CI2"]
14    VALUE3 = 2,
15    #[doc = "3: Kernel is synchronization slave: Control information from input CI3"]
16    VALUE4 = 3,
17}
18impl From<STSEL_A> for u8 {
19    #[inline(always)]
20    fn from(variant: STSEL_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for STSEL_A {
25    type Ux = u8;
26}
27impl crate::IsEnum for STSEL_A {}
28#[doc = "Field `STSEL` reader - Start Selection"]
29pub type STSEL_R = crate::FieldReader<STSEL_A>;
30impl STSEL_R {
31    #[doc = "Get enumerated values variant"]
32    #[inline(always)]
33    pub const fn variant(&self) -> STSEL_A {
34        match self.bits {
35            0 => STSEL_A::VALUE1,
36            1 => STSEL_A::VALUE2,
37            2 => STSEL_A::VALUE3,
38            3 => STSEL_A::VALUE4,
39            _ => unreachable!(),
40        }
41    }
42    #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"]
43    #[inline(always)]
44    pub fn is_value1(&self) -> bool {
45        *self == STSEL_A::VALUE1
46    }
47    #[doc = "Kernel is synchronization slave: Control information from input CI1"]
48    #[inline(always)]
49    pub fn is_value2(&self) -> bool {
50        *self == STSEL_A::VALUE2
51    }
52    #[doc = "Kernel is synchronization slave: Control information from input CI2"]
53    #[inline(always)]
54    pub fn is_value3(&self) -> bool {
55        *self == STSEL_A::VALUE3
56    }
57    #[doc = "Kernel is synchronization slave: Control information from input CI3"]
58    #[inline(always)]
59    pub fn is_value4(&self) -> bool {
60        *self == STSEL_A::VALUE4
61    }
62}
63#[doc = "Field `STSEL` writer - Start Selection"]
64pub type STSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STSEL_A, crate::Safe>;
65impl<'a, REG> STSEL_W<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"]
71    #[inline(always)]
72    pub fn value1(self) -> &'a mut crate::W<REG> {
73        self.variant(STSEL_A::VALUE1)
74    }
75    #[doc = "Kernel is synchronization slave: Control information from input CI1"]
76    #[inline(always)]
77    pub fn value2(self) -> &'a mut crate::W<REG> {
78        self.variant(STSEL_A::VALUE2)
79    }
80    #[doc = "Kernel is synchronization slave: Control information from input CI2"]
81    #[inline(always)]
82    pub fn value3(self) -> &'a mut crate::W<REG> {
83        self.variant(STSEL_A::VALUE3)
84    }
85    #[doc = "Kernel is synchronization slave: Control information from input CI3"]
86    #[inline(always)]
87    pub fn value4(self) -> &'a mut crate::W<REG> {
88        self.variant(STSEL_A::VALUE4)
89    }
90}
91#[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq, Eq)]
93pub enum EVALR1_A {
94    #[doc = "0: No ready input control"]
95    VALUE1 = 0,
96    #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
97    VALUE2 = 1,
98}
99impl From<EVALR1_A> for bool {
100    #[inline(always)]
101    fn from(variant: EVALR1_A) -> Self {
102        variant as u8 != 0
103    }
104}
105#[doc = "Field `EVALR1` reader - Evaluate Ready Input Rx"]
106pub type EVALR1_R = crate::BitReader<EVALR1_A>;
107impl EVALR1_R {
108    #[doc = "Get enumerated values variant"]
109    #[inline(always)]
110    pub const fn variant(&self) -> EVALR1_A {
111        match self.bits {
112            false => EVALR1_A::VALUE1,
113            true => EVALR1_A::VALUE2,
114        }
115    }
116    #[doc = "No ready input control"]
117    #[inline(always)]
118    pub fn is_value1(&self) -> bool {
119        *self == EVALR1_A::VALUE1
120    }
121    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
122    #[inline(always)]
123    pub fn is_value2(&self) -> bool {
124        *self == EVALR1_A::VALUE2
125    }
126}
127#[doc = "Field `EVALR1` writer - Evaluate Ready Input Rx"]
128pub type EVALR1_W<'a, REG> = crate::BitWriter<'a, REG, EVALR1_A>;
129impl<'a, REG> EVALR1_W<'a, REG>
130where
131    REG: crate::Writable + crate::RegisterSpec,
132{
133    #[doc = "No ready input control"]
134    #[inline(always)]
135    pub fn value1(self) -> &'a mut crate::W<REG> {
136        self.variant(EVALR1_A::VALUE1)
137    }
138    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
139    #[inline(always)]
140    pub fn value2(self) -> &'a mut crate::W<REG> {
141        self.variant(EVALR1_A::VALUE2)
142    }
143}
144#[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"]
145#[derive(Clone, Copy, Debug, PartialEq, Eq)]
146pub enum EVALR2_A {
147    #[doc = "0: No ready input control"]
148    VALUE1 = 0,
149    #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
150    VALUE2 = 1,
151}
152impl From<EVALR2_A> for bool {
153    #[inline(always)]
154    fn from(variant: EVALR2_A) -> Self {
155        variant as u8 != 0
156    }
157}
158#[doc = "Field `EVALR2` reader - Evaluate Ready Input Rx"]
159pub type EVALR2_R = crate::BitReader<EVALR2_A>;
160impl EVALR2_R {
161    #[doc = "Get enumerated values variant"]
162    #[inline(always)]
163    pub const fn variant(&self) -> EVALR2_A {
164        match self.bits {
165            false => EVALR2_A::VALUE1,
166            true => EVALR2_A::VALUE2,
167        }
168    }
169    #[doc = "No ready input control"]
170    #[inline(always)]
171    pub fn is_value1(&self) -> bool {
172        *self == EVALR2_A::VALUE1
173    }
174    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
175    #[inline(always)]
176    pub fn is_value2(&self) -> bool {
177        *self == EVALR2_A::VALUE2
178    }
179}
180#[doc = "Field `EVALR2` writer - Evaluate Ready Input Rx"]
181pub type EVALR2_W<'a, REG> = crate::BitWriter<'a, REG, EVALR2_A>;
182impl<'a, REG> EVALR2_W<'a, REG>
183where
184    REG: crate::Writable + crate::RegisterSpec,
185{
186    #[doc = "No ready input control"]
187    #[inline(always)]
188    pub fn value1(self) -> &'a mut crate::W<REG> {
189        self.variant(EVALR2_A::VALUE1)
190    }
191    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
192    #[inline(always)]
193    pub fn value2(self) -> &'a mut crate::W<REG> {
194        self.variant(EVALR2_A::VALUE2)
195    }
196}
197#[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"]
198#[derive(Clone, Copy, Debug, PartialEq, Eq)]
199pub enum EVALR3_A {
200    #[doc = "0: No ready input control"]
201    VALUE1 = 0,
202    #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
203    VALUE2 = 1,
204}
205impl From<EVALR3_A> for bool {
206    #[inline(always)]
207    fn from(variant: EVALR3_A) -> Self {
208        variant as u8 != 0
209    }
210}
211#[doc = "Field `EVALR3` reader - Evaluate Ready Input Rx"]
212pub type EVALR3_R = crate::BitReader<EVALR3_A>;
213impl EVALR3_R {
214    #[doc = "Get enumerated values variant"]
215    #[inline(always)]
216    pub const fn variant(&self) -> EVALR3_A {
217        match self.bits {
218            false => EVALR3_A::VALUE1,
219            true => EVALR3_A::VALUE2,
220        }
221    }
222    #[doc = "No ready input control"]
223    #[inline(always)]
224    pub fn is_value1(&self) -> bool {
225        *self == EVALR3_A::VALUE1
226    }
227    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
228    #[inline(always)]
229    pub fn is_value2(&self) -> bool {
230        *self == EVALR3_A::VALUE2
231    }
232}
233#[doc = "Field `EVALR3` writer - Evaluate Ready Input Rx"]
234pub type EVALR3_W<'a, REG> = crate::BitWriter<'a, REG, EVALR3_A>;
235impl<'a, REG> EVALR3_W<'a, REG>
236where
237    REG: crate::Writable + crate::RegisterSpec,
238{
239    #[doc = "No ready input control"]
240    #[inline(always)]
241    pub fn value1(self) -> &'a mut crate::W<REG> {
242        self.variant(EVALR3_A::VALUE1)
243    }
244    #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"]
245    #[inline(always)]
246    pub fn value2(self) -> &'a mut crate::W<REG> {
247        self.variant(EVALR3_A::VALUE2)
248    }
249}
250impl R {
251    #[doc = "Bits 0:1 - Start Selection"]
252    #[inline(always)]
253    pub fn stsel(&self) -> STSEL_R {
254        STSEL_R::new((self.bits & 3) as u8)
255    }
256    #[doc = "Bit 4 - Evaluate Ready Input Rx"]
257    #[inline(always)]
258    pub fn evalr1(&self) -> EVALR1_R {
259        EVALR1_R::new(((self.bits >> 4) & 1) != 0)
260    }
261    #[doc = "Bit 5 - Evaluate Ready Input Rx"]
262    #[inline(always)]
263    pub fn evalr2(&self) -> EVALR2_R {
264        EVALR2_R::new(((self.bits >> 5) & 1) != 0)
265    }
266    #[doc = "Bit 6 - Evaluate Ready Input Rx"]
267    #[inline(always)]
268    pub fn evalr3(&self) -> EVALR3_R {
269        EVALR3_R::new(((self.bits >> 6) & 1) != 0)
270    }
271}
272impl W {
273    #[doc = "Bits 0:1 - Start Selection"]
274    #[inline(always)]
275    pub fn stsel(&mut self) -> STSEL_W<SYNCTR_SPEC> {
276        STSEL_W::new(self, 0)
277    }
278    #[doc = "Bit 4 - Evaluate Ready Input Rx"]
279    #[inline(always)]
280    pub fn evalr1(&mut self) -> EVALR1_W<SYNCTR_SPEC> {
281        EVALR1_W::new(self, 4)
282    }
283    #[doc = "Bit 5 - Evaluate Ready Input Rx"]
284    #[inline(always)]
285    pub fn evalr2(&mut self) -> EVALR2_W<SYNCTR_SPEC> {
286        EVALR2_W::new(self, 5)
287    }
288    #[doc = "Bit 6 - Evaluate Ready Input Rx"]
289    #[inline(always)]
290    pub fn evalr3(&mut self) -> EVALR3_W<SYNCTR_SPEC> {
291        EVALR3_W::new(self, 6)
292    }
293}
294#[doc = "Synchronization Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`synctr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`synctr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
295pub struct SYNCTR_SPEC;
296impl crate::RegisterSpec for SYNCTR_SPEC {
297    type Ux = u32;
298}
299#[doc = "`read()` method returns [`synctr::R`](R) reader structure"]
300impl crate::Readable for SYNCTR_SPEC {}
301#[doc = "`write(|w| ..)` method takes [`synctr::W`](W) writer structure"]
302impl crate::Writable for SYNCTR_SPEC {
303    type Safety = crate::Unsafe;
304    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
305    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
306}
307#[doc = "`reset()` method sets SYNCTR to value 0"]
308impl crate::Resettable for SYNCTR_SPEC {
309    const RESET_VALUE: u32 = 0;
310}
xmc4500/vadc_g0/synctr.rs

xmc4500/vadc_g0/
synctr.rs
