1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 rststat: RSTSTAT,
5 rstset: RSTSET,
6 rstclr: RSTCLR,
7 prstat0: PRSTAT0,
8 prset0: PRSET0,
9 prclr0: PRCLR0,
10 prstat1: PRSTAT1,
11 prset1: PRSET1,
12 prclr1: PRCLR1,
13 prstat2: PRSTAT2,
14 prset2: PRSET2,
15 prclr2: PRCLR2,
16 prstat3: PRSTAT3,
17 prset3: PRSET3,
18 prclr3: PRCLR3,
19}
20impl RegisterBlock {
21 #[doc = "0x00 - RCU Reset Status"]
22 #[inline(always)]
23 pub const fn rststat(&self) -> &RSTSTAT {
24 &self.rststat
25 }
26 #[doc = "0x04 - RCU Reset Set Register"]
27 #[inline(always)]
28 pub const fn rstset(&self) -> &RSTSET {
29 &self.rstset
30 }
31 #[doc = "0x08 - RCU Reset Clear Register"]
32 #[inline(always)]
33 pub const fn rstclr(&self) -> &RSTCLR {
34 &self.rstclr
35 }
36 #[doc = "0x0c - RCU Peripheral 0 Reset Status"]
37 #[inline(always)]
38 pub const fn prstat0(&self) -> &PRSTAT0 {
39 &self.prstat0
40 }
41 #[doc = "0x10 - RCU Peripheral 0 Reset Set"]
42 #[inline(always)]
43 pub const fn prset0(&self) -> &PRSET0 {
44 &self.prset0
45 }
46 #[doc = "0x14 - RCU Peripheral 0 Reset Clear"]
47 #[inline(always)]
48 pub const fn prclr0(&self) -> &PRCLR0 {
49 &self.prclr0
50 }
51 #[doc = "0x18 - RCU Peripheral 1 Reset Status"]
52 #[inline(always)]
53 pub const fn prstat1(&self) -> &PRSTAT1 {
54 &self.prstat1
55 }
56 #[doc = "0x1c - RCU Peripheral 1 Reset Set"]
57 #[inline(always)]
58 pub const fn prset1(&self) -> &PRSET1 {
59 &self.prset1
60 }
61 #[doc = "0x20 - RCU Peripheral 1 Reset Clear"]
62 #[inline(always)]
63 pub const fn prclr1(&self) -> &PRCLR1 {
64 &self.prclr1
65 }
66 #[doc = "0x24 - RCU Peripheral 2 Reset Status"]
67 #[inline(always)]
68 pub const fn prstat2(&self) -> &PRSTAT2 {
69 &self.prstat2
70 }
71 #[doc = "0x28 - RCU Peripheral 2 Reset Set"]
72 #[inline(always)]
73 pub const fn prset2(&self) -> &PRSET2 {
74 &self.prset2
75 }
76 #[doc = "0x2c - RCU Peripheral 2 Reset Clear"]
77 #[inline(always)]
78 pub const fn prclr2(&self) -> &PRCLR2 {
79 &self.prclr2
80 }
81 #[doc = "0x30 - RCU Peripheral 3 Reset Status"]
82 #[inline(always)]
83 pub const fn prstat3(&self) -> &PRSTAT3 {
84 &self.prstat3
85 }
86 #[doc = "0x34 - RCU Peripheral 3 Reset Set"]
87 #[inline(always)]
88 pub const fn prset3(&self) -> &PRSET3 {
89 &self.prset3
90 }
91 #[doc = "0x38 - RCU Peripheral 3 Reset Clear"]
92 #[inline(always)]
93 pub const fn prclr3(&self) -> &PRCLR3 {
94 &self.prclr3
95 }
96}
97#[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`]
98module"]
99pub type RSTSTAT = crate::Reg<rststat::RSTSTAT_SPEC>;
100#[doc = "RCU Reset Status"]
101pub mod rststat;
102#[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`]
103module"]
104pub type RSTSET = crate::Reg<rstset::RSTSET_SPEC>;
105#[doc = "RCU Reset Set Register"]
106pub mod rstset;
107#[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`]
108module"]
109pub type RSTCLR = crate::Reg<rstclr::RSTCLR_SPEC>;
110#[doc = "RCU Reset Clear Register"]
111pub mod rstclr;
112#[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`]
113module"]
114pub type PRSTAT0 = crate::Reg<prstat0::PRSTAT0_SPEC>;
115#[doc = "RCU Peripheral 0 Reset Status"]
116pub mod prstat0;
117#[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`]
118module"]
119pub type PRSET0 = crate::Reg<prset0::PRSET0_SPEC>;
120#[doc = "RCU Peripheral 0 Reset Set"]
121pub mod prset0;
122#[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`]
123module"]
124pub type PRCLR0 = crate::Reg<prclr0::PRCLR0_SPEC>;
125#[doc = "RCU Peripheral 0 Reset Clear"]
126pub mod prclr0;
127#[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`]
128module"]
129pub type PRSTAT1 = crate::Reg<prstat1::PRSTAT1_SPEC>;
130#[doc = "RCU Peripheral 1 Reset Status"]
131pub mod prstat1;
132#[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`]
133module"]
134pub type PRSET1 = crate::Reg<prset1::PRSET1_SPEC>;
135#[doc = "RCU Peripheral 1 Reset Set"]
136pub mod prset1;
137#[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`]
138module"]
139pub type PRCLR1 = crate::Reg<prclr1::PRCLR1_SPEC>;
140#[doc = "RCU Peripheral 1 Reset Clear"]
141pub mod prclr1;
142#[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`]
143module"]
144pub type PRSTAT2 = crate::Reg<prstat2::PRSTAT2_SPEC>;
145#[doc = "RCU Peripheral 2 Reset Status"]
146pub mod prstat2;
147#[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`]
148module"]
149pub type PRSET2 = crate::Reg<prset2::PRSET2_SPEC>;
150#[doc = "RCU Peripheral 2 Reset Set"]
151pub mod prset2;
152#[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`]
153module"]
154pub type PRCLR2 = crate::Reg<prclr2::PRCLR2_SPEC>;
155#[doc = "RCU Peripheral 2 Reset Clear"]
156pub mod prclr2;
157#[doc = "PRSTAT3 (r) register accessor: RCU Peripheral 3 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat3`]
158module"]
159pub type PRSTAT3 = crate::Reg<prstat3::PRSTAT3_SPEC>;
160#[doc = "RCU Peripheral 3 Reset Status"]
161pub mod prstat3;
162#[doc = "PRSET3 (w) register accessor: RCU Peripheral 3 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset3`]
163module"]
164pub type PRSET3 = crate::Reg<prset3::PRSET3_SPEC>;
165#[doc = "RCU Peripheral 3 Reset Set"]
166pub mod prset3;
167#[doc = "PRCLR3 (w) register accessor: RCU Peripheral 3 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr3`]
168module"]
169pub type PRCLR3 = crate::Reg<prclr3::PRCLR3_SPEC>;
170#[doc = "RCU Peripheral 3 Reset Clear"]
171pub mod prclr3;