1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 clc: CLC,
5 _reserved1: [u8; 0x04],
6 id: ID,
7 fdr: FDR,
8 _reserved3: [u8; 0xf0],
9 list: [LIST; 8],
10 _reserved4: [u8; 0x20],
11 mspnd: [MSPND; 8],
12 _reserved5: [u8; 0x20],
13 msid: [MSID; 8],
14 _reserved6: [u8; 0x20],
15 msimask: MSIMASK,
16 panctr: PANCTR,
17 mcr: MCR,
18 mitr: MITR,
19}
20impl RegisterBlock {
21 #[doc = "0x00 - CAN Clock Control Register"]
22 #[inline(always)]
23 pub const fn clc(&self) -> &CLC {
24 &self.clc
25 }
26 #[doc = "0x08 - Module Identification Register"]
27 #[inline(always)]
28 pub const fn id(&self) -> &ID {
29 &self.id
30 }
31 #[doc = "0x0c - CAN Fractional Divider Register"]
32 #[inline(always)]
33 pub const fn fdr(&self) -> &FDR {
34 &self.fdr
35 }
36 #[doc = "0x100..0x120 - List Register"]
37 #[inline(always)]
38 pub const fn list(&self, n: usize) -> &LIST {
39 &self.list[n]
40 }
41 #[doc = "Iterator for array of:"]
42 #[doc = "0x100..0x120 - List Register"]
43 #[inline(always)]
44 pub fn list_iter(&self) -> impl Iterator<Item = &LIST> {
45 self.list.iter()
46 }
47 #[doc = "0x140..0x160 - Message Pending Register"]
48 #[inline(always)]
49 pub const fn mspnd(&self, n: usize) -> &MSPND {
50 &self.mspnd[n]
51 }
52 #[doc = "Iterator for array of:"]
53 #[doc = "0x140..0x160 - Message Pending Register"]
54 #[inline(always)]
55 pub fn mspnd_iter(&self) -> impl Iterator<Item = &MSPND> {
56 self.mspnd.iter()
57 }
58 #[doc = "0x180..0x1a0 - Message Index Register"]
59 #[inline(always)]
60 pub const fn msid(&self, n: usize) -> &MSID {
61 &self.msid[n]
62 }
63 #[doc = "Iterator for array of:"]
64 #[doc = "0x180..0x1a0 - Message Index Register"]
65 #[inline(always)]
66 pub fn msid_iter(&self) -> impl Iterator<Item = &MSID> {
67 self.msid.iter()
68 }
69 #[doc = "0x1c0 - Message Index Mask Register"]
70 #[inline(always)]
71 pub const fn msimask(&self) -> &MSIMASK {
72 &self.msimask
73 }
74 #[doc = "0x1c4 - Panel Control Register"]
75 #[inline(always)]
76 pub const fn panctr(&self) -> &PANCTR {
77 &self.panctr
78 }
79 #[doc = "0x1c8 - Module Control Register"]
80 #[inline(always)]
81 pub const fn mcr(&self) -> &MCR {
82 &self.mcr
83 }
84 #[doc = "0x1cc - Module Interrupt Trigger Register"]
85 #[inline(always)]
86 pub const fn mitr(&self) -> &MITR {
87 &self.mitr
88 }
89}
90#[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`]
91module"]
92pub type CLC = crate::Reg<clc::CLC_SPEC>;
93#[doc = "CAN Clock Control Register"]
94pub mod clc;
95#[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`]
96module"]
97pub type ID = crate::Reg<id::ID_SPEC>;
98#[doc = "Module Identification Register"]
99pub mod id;
100#[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`]
101module"]
102pub type FDR = crate::Reg<fdr::FDR_SPEC>;
103#[doc = "CAN Fractional Divider Register"]
104pub mod fdr;
105#[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@list`]
106module"]
107pub type LIST = crate::Reg<list::LIST_SPEC>;
108#[doc = "List Register"]
109pub mod list;
110#[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspnd`]
111module"]
112pub type MSPND = crate::Reg<mspnd::MSPND_SPEC>;
113#[doc = "Message Pending Register"]
114pub mod mspnd;
115#[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msid`]
116module"]
117pub type MSID = crate::Reg<msid::MSID_SPEC>;
118#[doc = "Message Index Register"]
119pub mod msid;
120#[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msimask`]
121module"]
122pub type MSIMASK = crate::Reg<msimask::MSIMASK_SPEC>;
123#[doc = "Message Index Mask Register"]
124pub mod msimask;
125#[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@panctr`]
126module"]
127pub type PANCTR = crate::Reg<panctr::PANCTR_SPEC>;
128#[doc = "Panel Control Register"]
129pub mod panctr;
130#[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcr`]
131module"]
132pub type MCR = crate::Reg<mcr::MCR_SPEC>;
133#[doc = "Module Control Register"]
134pub mod mcr;
135#[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mitr`]
136module"]
137pub type MITR = crate::Reg<mitr::MITR_SPEC>;
138#[doc = "Module Interrupt Trigger Register"]
139pub mod mitr;