xmc4400/ledts0/
globctl.rs

1#[doc = "Register `GLOBCTL` reader"]
2pub type R = crate::R<GLOBCTL_SPEC>;
3#[doc = "Register `GLOBCTL` writer"]
4pub type W = crate::W<GLOBCTL_SPEC>;
5#[doc = "Field `TS_EN` reader - Touch-Sense Function Enable"]
6pub type TS_EN_R = crate::BitReader;
7#[doc = "Field `TS_EN` writer - Touch-Sense Function Enable"]
8pub type TS_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `LD_EN` reader - LED Function Enable"]
10pub type LD_EN_R = crate::BitReader;
11#[doc = "Field `LD_EN` writer - LED Function Enable"]
12pub type LD_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Clock Master Disable\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15pub enum CMTR_A {
16    #[doc = "0: Kernel generates its own clock for LEDTS-counter based on SFR setting"]
17    VALUE1 = 0,
18    #[doc = "1: LEDTS-counter takes its clock from another master kernel"]
19    VALUE2 = 1,
20}
21impl From<CMTR_A> for bool {
22    #[inline(always)]
23    fn from(variant: CMTR_A) -> Self {
24        variant as u8 != 0
25    }
26}
27#[doc = "Field `CMTR` reader - Clock Master Disable"]
28pub type CMTR_R = crate::BitReader<CMTR_A>;
29impl CMTR_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> CMTR_A {
33        match self.bits {
34            false => CMTR_A::VALUE1,
35            true => CMTR_A::VALUE2,
36        }
37    }
38    #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"]
39    #[inline(always)]
40    pub fn is_value1(&self) -> bool {
41        *self == CMTR_A::VALUE1
42    }
43    #[doc = "LEDTS-counter takes its clock from another master kernel"]
44    #[inline(always)]
45    pub fn is_value2(&self) -> bool {
46        *self == CMTR_A::VALUE2
47    }
48}
49#[doc = "Field `CMTR` writer - Clock Master Disable"]
50pub type CMTR_W<'a, REG> = crate::BitWriter<'a, REG, CMTR_A>;
51impl<'a, REG> CMTR_W<'a, REG>
52where
53    REG: crate::Writable + crate::RegisterSpec,
54{
55    #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"]
56    #[inline(always)]
57    pub fn value1(self) -> &'a mut crate::W<REG> {
58        self.variant(CMTR_A::VALUE1)
59    }
60    #[doc = "LEDTS-counter takes its clock from another master kernel"]
61    #[inline(always)]
62    pub fn value2(self) -> &'a mut crate::W<REG> {
63        self.variant(CMTR_A::VALUE2)
64    }
65}
66#[doc = "Enable Autoscan Time Period Synchronization\n\nValue on reset: 0"]
67#[derive(Clone, Copy, Debug, PartialEq, Eq)]
68pub enum ENSYNC_A {
69    #[doc = "0: No synchronization"]
70    VALUE1 = 0,
71    #[doc = "1: Synchronization enabled on Kernel0 autoscan time period"]
72    VALUE2 = 1,
73}
74impl From<ENSYNC_A> for bool {
75    #[inline(always)]
76    fn from(variant: ENSYNC_A) -> Self {
77        variant as u8 != 0
78    }
79}
80#[doc = "Field `ENSYNC` reader - Enable Autoscan Time Period Synchronization"]
81pub type ENSYNC_R = crate::BitReader<ENSYNC_A>;
82impl ENSYNC_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub const fn variant(&self) -> ENSYNC_A {
86        match self.bits {
87            false => ENSYNC_A::VALUE1,
88            true => ENSYNC_A::VALUE2,
89        }
90    }
91    #[doc = "No synchronization"]
92    #[inline(always)]
93    pub fn is_value1(&self) -> bool {
94        *self == ENSYNC_A::VALUE1
95    }
96    #[doc = "Synchronization enabled on Kernel0 autoscan time period"]
97    #[inline(always)]
98    pub fn is_value2(&self) -> bool {
99        *self == ENSYNC_A::VALUE2
100    }
101}
102#[doc = "Field `ENSYNC` writer - Enable Autoscan Time Period Synchronization"]
103pub type ENSYNC_W<'a, REG> = crate::BitWriter<'a, REG, ENSYNC_A>;
104impl<'a, REG> ENSYNC_W<'a, REG>
105where
106    REG: crate::Writable + crate::RegisterSpec,
107{
108    #[doc = "No synchronization"]
109    #[inline(always)]
110    pub fn value1(self) -> &'a mut crate::W<REG> {
111        self.variant(ENSYNC_A::VALUE1)
112    }
113    #[doc = "Synchronization enabled on Kernel0 autoscan time period"]
114    #[inline(always)]
115    pub fn value2(self) -> &'a mut crate::W<REG> {
116        self.variant(ENSYNC_A::VALUE2)
117    }
118}
119#[doc = "Suspend Request Configuration\n\nValue on reset: 0"]
120#[derive(Clone, Copy, Debug, PartialEq, Eq)]
121pub enum SUSCFG_A {
122    #[doc = "0: Ignore suspend request"]
123    VALUE1 = 0,
124    #[doc = "1: Enable suspend according to request"]
125    VALUE2 = 1,
126}
127impl From<SUSCFG_A> for bool {
128    #[inline(always)]
129    fn from(variant: SUSCFG_A) -> Self {
130        variant as u8 != 0
131    }
132}
133#[doc = "Field `SUSCFG` reader - Suspend Request Configuration"]
134pub type SUSCFG_R = crate::BitReader<SUSCFG_A>;
135impl SUSCFG_R {
136    #[doc = "Get enumerated values variant"]
137    #[inline(always)]
138    pub const fn variant(&self) -> SUSCFG_A {
139        match self.bits {
140            false => SUSCFG_A::VALUE1,
141            true => SUSCFG_A::VALUE2,
142        }
143    }
144    #[doc = "Ignore suspend request"]
145    #[inline(always)]
146    pub fn is_value1(&self) -> bool {
147        *self == SUSCFG_A::VALUE1
148    }
149    #[doc = "Enable suspend according to request"]
150    #[inline(always)]
151    pub fn is_value2(&self) -> bool {
152        *self == SUSCFG_A::VALUE2
153    }
154}
155#[doc = "Field `SUSCFG` writer - Suspend Request Configuration"]
156pub type SUSCFG_W<'a, REG> = crate::BitWriter<'a, REG, SUSCFG_A>;
157impl<'a, REG> SUSCFG_W<'a, REG>
158where
159    REG: crate::Writable + crate::RegisterSpec,
160{
161    #[doc = "Ignore suspend request"]
162    #[inline(always)]
163    pub fn value1(self) -> &'a mut crate::W<REG> {
164        self.variant(SUSCFG_A::VALUE1)
165    }
166    #[doc = "Enable suspend according to request"]
167    #[inline(always)]
168    pub fn value2(self) -> &'a mut crate::W<REG> {
169        self.variant(SUSCFG_A::VALUE2)
170    }
171}
172#[doc = "Mask Number of LSB Bits for Event Validation\n\nValue on reset: 0"]
173#[derive(Clone, Copy, Debug, PartialEq, Eq)]
174#[repr(u8)]
175pub enum MASKVAL_A {
176    #[doc = "0: Mask LSB bit"]
177    VALUE1 = 0,
178    #[doc = "1: Mask 2 LSB bits"]
179    VALUE2 = 1,
180    #[doc = "7: Mask 8 LSB bits"]
181    VALUE3 = 7,
182}
183impl From<MASKVAL_A> for u8 {
184    #[inline(always)]
185    fn from(variant: MASKVAL_A) -> Self {
186        variant as _
187    }
188}
189impl crate::FieldSpec for MASKVAL_A {
190    type Ux = u8;
191}
192impl crate::IsEnum for MASKVAL_A {}
193#[doc = "Field `MASKVAL` reader - Mask Number of LSB Bits for Event Validation"]
194pub type MASKVAL_R = crate::FieldReader<MASKVAL_A>;
195impl MASKVAL_R {
196    #[doc = "Get enumerated values variant"]
197    #[inline(always)]
198    pub const fn variant(&self) -> Option<MASKVAL_A> {
199        match self.bits {
200            0 => Some(MASKVAL_A::VALUE1),
201            1 => Some(MASKVAL_A::VALUE2),
202            7 => Some(MASKVAL_A::VALUE3),
203            _ => None,
204        }
205    }
206    #[doc = "Mask LSB bit"]
207    #[inline(always)]
208    pub fn is_value1(&self) -> bool {
209        *self == MASKVAL_A::VALUE1
210    }
211    #[doc = "Mask 2 LSB bits"]
212    #[inline(always)]
213    pub fn is_value2(&self) -> bool {
214        *self == MASKVAL_A::VALUE2
215    }
216    #[doc = "Mask 8 LSB bits"]
217    #[inline(always)]
218    pub fn is_value3(&self) -> bool {
219        *self == MASKVAL_A::VALUE3
220    }
221}
222#[doc = "Field `MASKVAL` writer - Mask Number of LSB Bits for Event Validation"]
223pub type MASKVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MASKVAL_A>;
224impl<'a, REG> MASKVAL_W<'a, REG>
225where
226    REG: crate::Writable + crate::RegisterSpec,
227    REG::Ux: From<u8>,
228{
229    #[doc = "Mask LSB bit"]
230    #[inline(always)]
231    pub fn value1(self) -> &'a mut crate::W<REG> {
232        self.variant(MASKVAL_A::VALUE1)
233    }
234    #[doc = "Mask 2 LSB bits"]
235    #[inline(always)]
236    pub fn value2(self) -> &'a mut crate::W<REG> {
237        self.variant(MASKVAL_A::VALUE2)
238    }
239    #[doc = "Mask 8 LSB bits"]
240    #[inline(always)]
241    pub fn value3(self) -> &'a mut crate::W<REG> {
242        self.variant(MASKVAL_A::VALUE3)
243    }
244}
245#[doc = "Enable (Extended) Time Frame Validation\n\nValue on reset: 0"]
246#[derive(Clone, Copy, Debug, PartialEq, Eq)]
247pub enum FENVAL_A {
248    #[doc = "0: Disable"]
249    VALUE1 = 0,
250    #[doc = "1: Enable"]
251    VALUE2 = 1,
252}
253impl From<FENVAL_A> for bool {
254    #[inline(always)]
255    fn from(variant: FENVAL_A) -> Self {
256        variant as u8 != 0
257    }
258}
259#[doc = "Field `FENVAL` reader - Enable (Extended) Time Frame Validation"]
260pub type FENVAL_R = crate::BitReader<FENVAL_A>;
261impl FENVAL_R {
262    #[doc = "Get enumerated values variant"]
263    #[inline(always)]
264    pub const fn variant(&self) -> FENVAL_A {
265        match self.bits {
266            false => FENVAL_A::VALUE1,
267            true => FENVAL_A::VALUE2,
268        }
269    }
270    #[doc = "Disable"]
271    #[inline(always)]
272    pub fn is_value1(&self) -> bool {
273        *self == FENVAL_A::VALUE1
274    }
275    #[doc = "Enable"]
276    #[inline(always)]
277    pub fn is_value2(&self) -> bool {
278        *self == FENVAL_A::VALUE2
279    }
280}
281#[doc = "Field `FENVAL` writer - Enable (Extended) Time Frame Validation"]
282pub type FENVAL_W<'a, REG> = crate::BitWriter<'a, REG, FENVAL_A>;
283impl<'a, REG> FENVAL_W<'a, REG>
284where
285    REG: crate::Writable + crate::RegisterSpec,
286{
287    #[doc = "Disable"]
288    #[inline(always)]
289    pub fn value1(self) -> &'a mut crate::W<REG> {
290        self.variant(FENVAL_A::VALUE1)
291    }
292    #[doc = "Enable"]
293    #[inline(always)]
294    pub fn value2(self) -> &'a mut crate::W<REG> {
295        self.variant(FENVAL_A::VALUE2)
296    }
297}
298#[doc = "Enable Time Slice Interrupt\n\nValue on reset: 0"]
299#[derive(Clone, Copy, Debug, PartialEq, Eq)]
300pub enum ITS_EN_A {
301    #[doc = "0: Disable"]
302    VALUE1 = 0,
303    #[doc = "1: Enable"]
304    VALUE2 = 1,
305}
306impl From<ITS_EN_A> for bool {
307    #[inline(always)]
308    fn from(variant: ITS_EN_A) -> Self {
309        variant as u8 != 0
310    }
311}
312#[doc = "Field `ITS_EN` reader - Enable Time Slice Interrupt"]
313pub type ITS_EN_R = crate::BitReader<ITS_EN_A>;
314impl ITS_EN_R {
315    #[doc = "Get enumerated values variant"]
316    #[inline(always)]
317    pub const fn variant(&self) -> ITS_EN_A {
318        match self.bits {
319            false => ITS_EN_A::VALUE1,
320            true => ITS_EN_A::VALUE2,
321        }
322    }
323    #[doc = "Disable"]
324    #[inline(always)]
325    pub fn is_value1(&self) -> bool {
326        *self == ITS_EN_A::VALUE1
327    }
328    #[doc = "Enable"]
329    #[inline(always)]
330    pub fn is_value2(&self) -> bool {
331        *self == ITS_EN_A::VALUE2
332    }
333}
334#[doc = "Field `ITS_EN` writer - Enable Time Slice Interrupt"]
335pub type ITS_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITS_EN_A>;
336impl<'a, REG> ITS_EN_W<'a, REG>
337where
338    REG: crate::Writable + crate::RegisterSpec,
339{
340    #[doc = "Disable"]
341    #[inline(always)]
342    pub fn value1(self) -> &'a mut crate::W<REG> {
343        self.variant(ITS_EN_A::VALUE1)
344    }
345    #[doc = "Enable"]
346    #[inline(always)]
347    pub fn value2(self) -> &'a mut crate::W<REG> {
348        self.variant(ITS_EN_A::VALUE2)
349    }
350}
351#[doc = "Enable (Extended) Time Frame Interrupt\n\nValue on reset: 0"]
352#[derive(Clone, Copy, Debug, PartialEq, Eq)]
353pub enum ITF_EN_A {
354    #[doc = "0: Disable"]
355    VALUE1 = 0,
356    #[doc = "1: Enable"]
357    VALUE2 = 1,
358}
359impl From<ITF_EN_A> for bool {
360    #[inline(always)]
361    fn from(variant: ITF_EN_A) -> Self {
362        variant as u8 != 0
363    }
364}
365#[doc = "Field `ITF_EN` reader - Enable (Extended) Time Frame Interrupt"]
366pub type ITF_EN_R = crate::BitReader<ITF_EN_A>;
367impl ITF_EN_R {
368    #[doc = "Get enumerated values variant"]
369    #[inline(always)]
370    pub const fn variant(&self) -> ITF_EN_A {
371        match self.bits {
372            false => ITF_EN_A::VALUE1,
373            true => ITF_EN_A::VALUE2,
374        }
375    }
376    #[doc = "Disable"]
377    #[inline(always)]
378    pub fn is_value1(&self) -> bool {
379        *self == ITF_EN_A::VALUE1
380    }
381    #[doc = "Enable"]
382    #[inline(always)]
383    pub fn is_value2(&self) -> bool {
384        *self == ITF_EN_A::VALUE2
385    }
386}
387#[doc = "Field `ITF_EN` writer - Enable (Extended) Time Frame Interrupt"]
388pub type ITF_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITF_EN_A>;
389impl<'a, REG> ITF_EN_W<'a, REG>
390where
391    REG: crate::Writable + crate::RegisterSpec,
392{
393    #[doc = "Disable"]
394    #[inline(always)]
395    pub fn value1(self) -> &'a mut crate::W<REG> {
396        self.variant(ITF_EN_A::VALUE1)
397    }
398    #[doc = "Enable"]
399    #[inline(always)]
400    pub fn value2(self) -> &'a mut crate::W<REG> {
401        self.variant(ITF_EN_A::VALUE2)
402    }
403}
404#[doc = "Enable Autoscan Time Period Interrupt\n\nValue on reset: 0"]
405#[derive(Clone, Copy, Debug, PartialEq, Eq)]
406pub enum ITP_EN_A {
407    #[doc = "0: Disable"]
408    VALUE1 = 0,
409    #[doc = "1: Enable (valid only for case of hardware-enabled pad turn control)"]
410    VALUE2 = 1,
411}
412impl From<ITP_EN_A> for bool {
413    #[inline(always)]
414    fn from(variant: ITP_EN_A) -> Self {
415        variant as u8 != 0
416    }
417}
418#[doc = "Field `ITP_EN` reader - Enable Autoscan Time Period Interrupt"]
419pub type ITP_EN_R = crate::BitReader<ITP_EN_A>;
420impl ITP_EN_R {
421    #[doc = "Get enumerated values variant"]
422    #[inline(always)]
423    pub const fn variant(&self) -> ITP_EN_A {
424        match self.bits {
425            false => ITP_EN_A::VALUE1,
426            true => ITP_EN_A::VALUE2,
427        }
428    }
429    #[doc = "Disable"]
430    #[inline(always)]
431    pub fn is_value1(&self) -> bool {
432        *self == ITP_EN_A::VALUE1
433    }
434    #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"]
435    #[inline(always)]
436    pub fn is_value2(&self) -> bool {
437        *self == ITP_EN_A::VALUE2
438    }
439}
440#[doc = "Field `ITP_EN` writer - Enable Autoscan Time Period Interrupt"]
441pub type ITP_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITP_EN_A>;
442impl<'a, REG> ITP_EN_W<'a, REG>
443where
444    REG: crate::Writable + crate::RegisterSpec,
445{
446    #[doc = "Disable"]
447    #[inline(always)]
448    pub fn value1(self) -> &'a mut crate::W<REG> {
449        self.variant(ITP_EN_A::VALUE1)
450    }
451    #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"]
452    #[inline(always)]
453    pub fn value2(self) -> &'a mut crate::W<REG> {
454        self.variant(ITP_EN_A::VALUE2)
455    }
456}
457#[doc = "Field `CLK_PS` reader - LEDTS-Counter Clock Pre-Scale Factor"]
458pub type CLK_PS_R = crate::FieldReader<u16>;
459#[doc = "Field `CLK_PS` writer - LEDTS-Counter Clock Pre-Scale Factor"]
460pub type CLK_PS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
461impl R {
462    #[doc = "Bit 0 - Touch-Sense Function Enable"]
463    #[inline(always)]
464    pub fn ts_en(&self) -> TS_EN_R {
465        TS_EN_R::new((self.bits & 1) != 0)
466    }
467    #[doc = "Bit 1 - LED Function Enable"]
468    #[inline(always)]
469    pub fn ld_en(&self) -> LD_EN_R {
470        LD_EN_R::new(((self.bits >> 1) & 1) != 0)
471    }
472    #[doc = "Bit 2 - Clock Master Disable"]
473    #[inline(always)]
474    pub fn cmtr(&self) -> CMTR_R {
475        CMTR_R::new(((self.bits >> 2) & 1) != 0)
476    }
477    #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"]
478    #[inline(always)]
479    pub fn ensync(&self) -> ENSYNC_R {
480        ENSYNC_R::new(((self.bits >> 3) & 1) != 0)
481    }
482    #[doc = "Bit 8 - Suspend Request Configuration"]
483    #[inline(always)]
484    pub fn suscfg(&self) -> SUSCFG_R {
485        SUSCFG_R::new(((self.bits >> 8) & 1) != 0)
486    }
487    #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"]
488    #[inline(always)]
489    pub fn maskval(&self) -> MASKVAL_R {
490        MASKVAL_R::new(((self.bits >> 9) & 7) as u8)
491    }
492    #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"]
493    #[inline(always)]
494    pub fn fenval(&self) -> FENVAL_R {
495        FENVAL_R::new(((self.bits >> 12) & 1) != 0)
496    }
497    #[doc = "Bit 13 - Enable Time Slice Interrupt"]
498    #[inline(always)]
499    pub fn its_en(&self) -> ITS_EN_R {
500        ITS_EN_R::new(((self.bits >> 13) & 1) != 0)
501    }
502    #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"]
503    #[inline(always)]
504    pub fn itf_en(&self) -> ITF_EN_R {
505        ITF_EN_R::new(((self.bits >> 14) & 1) != 0)
506    }
507    #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"]
508    #[inline(always)]
509    pub fn itp_en(&self) -> ITP_EN_R {
510        ITP_EN_R::new(((self.bits >> 15) & 1) != 0)
511    }
512    #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"]
513    #[inline(always)]
514    pub fn clk_ps(&self) -> CLK_PS_R {
515        CLK_PS_R::new(((self.bits >> 16) & 0xffff) as u16)
516    }
517}
518impl W {
519    #[doc = "Bit 0 - Touch-Sense Function Enable"]
520    #[inline(always)]
521    pub fn ts_en(&mut self) -> TS_EN_W<GLOBCTL_SPEC> {
522        TS_EN_W::new(self, 0)
523    }
524    #[doc = "Bit 1 - LED Function Enable"]
525    #[inline(always)]
526    pub fn ld_en(&mut self) -> LD_EN_W<GLOBCTL_SPEC> {
527        LD_EN_W::new(self, 1)
528    }
529    #[doc = "Bit 2 - Clock Master Disable"]
530    #[inline(always)]
531    pub fn cmtr(&mut self) -> CMTR_W<GLOBCTL_SPEC> {
532        CMTR_W::new(self, 2)
533    }
534    #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"]
535    #[inline(always)]
536    pub fn ensync(&mut self) -> ENSYNC_W<GLOBCTL_SPEC> {
537        ENSYNC_W::new(self, 3)
538    }
539    #[doc = "Bit 8 - Suspend Request Configuration"]
540    #[inline(always)]
541    pub fn suscfg(&mut self) -> SUSCFG_W<GLOBCTL_SPEC> {
542        SUSCFG_W::new(self, 8)
543    }
544    #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"]
545    #[inline(always)]
546    pub fn maskval(&mut self) -> MASKVAL_W<GLOBCTL_SPEC> {
547        MASKVAL_W::new(self, 9)
548    }
549    #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"]
550    #[inline(always)]
551    pub fn fenval(&mut self) -> FENVAL_W<GLOBCTL_SPEC> {
552        FENVAL_W::new(self, 12)
553    }
554    #[doc = "Bit 13 - Enable Time Slice Interrupt"]
555    #[inline(always)]
556    pub fn its_en(&mut self) -> ITS_EN_W<GLOBCTL_SPEC> {
557        ITS_EN_W::new(self, 13)
558    }
559    #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"]
560    #[inline(always)]
561    pub fn itf_en(&mut self) -> ITF_EN_W<GLOBCTL_SPEC> {
562        ITF_EN_W::new(self, 14)
563    }
564    #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"]
565    #[inline(always)]
566    pub fn itp_en(&mut self) -> ITP_EN_W<GLOBCTL_SPEC> {
567        ITP_EN_W::new(self, 15)
568    }
569    #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"]
570    #[inline(always)]
571    pub fn clk_ps(&mut self) -> CLK_PS_W<GLOBCTL_SPEC> {
572        CLK_PS_W::new(self, 16)
573    }
574}
575#[doc = "Global Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`globctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`globctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
576pub struct GLOBCTL_SPEC;
577impl crate::RegisterSpec for GLOBCTL_SPEC {
578    type Ux = u32;
579}
580#[doc = "`read()` method returns [`globctl::R`](R) reader structure"]
581impl crate::Readable for GLOBCTL_SPEC {}
582#[doc = "`write(|w| ..)` method takes [`globctl::W`](W) writer structure"]
583impl crate::Writable for GLOBCTL_SPEC {
584    type Safety = crate::Unsafe;
585    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
586    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
587}
588#[doc = "`reset()` method sets GLOBCTL to value 0"]
589impl crate::Resettable for GLOBCTL_SPEC {
590    const RESET_VALUE: u32 = 0;
591}
xmc4400/ledts0/globctl.rs

xmc4400/ledts0/
globctl.rs
