xmc4400/ccu80/
gcss.rs

1#[doc = "Register `GCSS` writer"]
2pub type W = crate::W<GCSS_SPEC>;
3#[doc = "Field `S0SE` writer - Slice 0 shadow transfer set enable"]
4pub type S0SE_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `S0DSE` writer - Slice 0 Dither shadow transfer set enable"]
6pub type S0DSE_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `S0PSE` writer - Slice 0 Prescaler shadow transfer set enable"]
8pub type S0PSE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `S1SE` writer - Slice 1 shadow transfer set enable"]
10pub type S1SE_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `S1DSE` writer - Slice 1 Dither shadow transfer set enable"]
12pub type S1DSE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `S1PSE` writer - Slice 1 Prescaler shadow transfer set enable"]
14pub type S1PSE_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `S2SE` writer - Slice 2 shadow transfer set enable"]
16pub type S2SE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `S2DSE` writer - Slice 2 Dither shadow transfer set enable"]
18pub type S2DSE_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `S2PSE` writer - Slice 2 Prescaler shadow transfer set enable"]
20pub type S2PSE_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `S3SE` writer - Slice 3 shadow transfer set enable"]
22pub type S3SE_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `S3DSE` writer - Slice 3 Dither shadow transfer set enable"]
24pub type S3DSE_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `S3PSE` writer - Slice 3 Prescaler shadow transfer set enable"]
26pub type S3PSE_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `S0ST1S` writer - Slice 0 status bit 1 set"]
28pub type S0ST1S_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `S1ST1S` writer - Slice 1 status bit 1 set"]
30pub type S1ST1S_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `S2ST1S` writer - Slice 2 status bit 1 set"]
32pub type S2ST1S_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `S3ST1S` writer - Slice 3 status bit 1 set"]
34pub type S3ST1S_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `S0ST2S` writer - Slice 0 status bit 2 set"]
36pub type S0ST2S_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `S1ST2S` writer - Slice 1 status bit 2 set"]
38pub type S1ST2S_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `S2ST2S` writer - Slice 2 status bit 2 set"]
40pub type S2ST2S_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `S3ST2S` writer - Slice 3 status bit 2 set"]
42pub type S3ST2S_W<'a, REG> = crate::BitWriter<'a, REG>;
43impl W {
44    #[doc = "Bit 0 - Slice 0 shadow transfer set enable"]
45    #[inline(always)]
46    pub fn s0se(&mut self) -> S0SE_W<GCSS_SPEC> {
47        S0SE_W::new(self, 0)
48    }
49    #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"]
50    #[inline(always)]
51    pub fn s0dse(&mut self) -> S0DSE_W<GCSS_SPEC> {
52        S0DSE_W::new(self, 1)
53    }
54    #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"]
55    #[inline(always)]
56    pub fn s0pse(&mut self) -> S0PSE_W<GCSS_SPEC> {
57        S0PSE_W::new(self, 2)
58    }
59    #[doc = "Bit 4 - Slice 1 shadow transfer set enable"]
60    #[inline(always)]
61    pub fn s1se(&mut self) -> S1SE_W<GCSS_SPEC> {
62        S1SE_W::new(self, 4)
63    }
64    #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"]
65    #[inline(always)]
66    pub fn s1dse(&mut self) -> S1DSE_W<GCSS_SPEC> {
67        S1DSE_W::new(self, 5)
68    }
69    #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"]
70    #[inline(always)]
71    pub fn s1pse(&mut self) -> S1PSE_W<GCSS_SPEC> {
72        S1PSE_W::new(self, 6)
73    }
74    #[doc = "Bit 8 - Slice 2 shadow transfer set enable"]
75    #[inline(always)]
76    pub fn s2se(&mut self) -> S2SE_W<GCSS_SPEC> {
77        S2SE_W::new(self, 8)
78    }
79    #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"]
80    #[inline(always)]
81    pub fn s2dse(&mut self) -> S2DSE_W<GCSS_SPEC> {
82        S2DSE_W::new(self, 9)
83    }
84    #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"]
85    #[inline(always)]
86    pub fn s2pse(&mut self) -> S2PSE_W<GCSS_SPEC> {
87        S2PSE_W::new(self, 10)
88    }
89    #[doc = "Bit 12 - Slice 3 shadow transfer set enable"]
90    #[inline(always)]
91    pub fn s3se(&mut self) -> S3SE_W<GCSS_SPEC> {
92        S3SE_W::new(self, 12)
93    }
94    #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"]
95    #[inline(always)]
96    pub fn s3dse(&mut self) -> S3DSE_W<GCSS_SPEC> {
97        S3DSE_W::new(self, 13)
98    }
99    #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"]
100    #[inline(always)]
101    pub fn s3pse(&mut self) -> S3PSE_W<GCSS_SPEC> {
102        S3PSE_W::new(self, 14)
103    }
104    #[doc = "Bit 16 - Slice 0 status bit 1 set"]
105    #[inline(always)]
106    pub fn s0st1s(&mut self) -> S0ST1S_W<GCSS_SPEC> {
107        S0ST1S_W::new(self, 16)
108    }
109    #[doc = "Bit 17 - Slice 1 status bit 1 set"]
110    #[inline(always)]
111    pub fn s1st1s(&mut self) -> S1ST1S_W<GCSS_SPEC> {
112        S1ST1S_W::new(self, 17)
113    }
114    #[doc = "Bit 18 - Slice 2 status bit 1 set"]
115    #[inline(always)]
116    pub fn s2st1s(&mut self) -> S2ST1S_W<GCSS_SPEC> {
117        S2ST1S_W::new(self, 18)
118    }
119    #[doc = "Bit 19 - Slice 3 status bit 1 set"]
120    #[inline(always)]
121    pub fn s3st1s(&mut self) -> S3ST1S_W<GCSS_SPEC> {
122        S3ST1S_W::new(self, 19)
123    }
124    #[doc = "Bit 20 - Slice 0 status bit 2 set"]
125    #[inline(always)]
126    pub fn s0st2s(&mut self) -> S0ST2S_W<GCSS_SPEC> {
127        S0ST2S_W::new(self, 20)
128    }
129    #[doc = "Bit 21 - Slice 1 status bit 2 set"]
130    #[inline(always)]
131    pub fn s1st2s(&mut self) -> S1ST2S_W<GCSS_SPEC> {
132        S1ST2S_W::new(self, 21)
133    }
134    #[doc = "Bit 22 - Slice 2 status bit 2 set"]
135    #[inline(always)]
136    pub fn s2st2s(&mut self) -> S2ST2S_W<GCSS_SPEC> {
137        S2ST2S_W::new(self, 22)
138    }
139    #[doc = "Bit 23 - Slice 3 status bit 2 set"]
140    #[inline(always)]
141    pub fn s3st2s(&mut self) -> S3ST2S_W<GCSS_SPEC> {
142        S3ST2S_W::new(self, 23)
143    }
144}
145#[doc = "Global Channel Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
146pub struct GCSS_SPEC;
147impl crate::RegisterSpec for GCSS_SPEC {
148    type Ux = u32;
149}
150#[doc = "`write(|w| ..)` method takes [`gcss::W`](W) writer structure"]
151impl crate::Writable for GCSS_SPEC {
152    type Safety = crate::Unsafe;
153    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
154    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
155}
156#[doc = "`reset()` method sets GCSS to value 0"]
157impl crate::Resettable for GCSS_SPEC {
158    const RESET_VALUE: u32 = 0;
159}
xmc4400/ccu80/gcss.rs

xmc4400/ccu80/
gcss.rs
