1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 _reserved0: [u8; 0x08],
5 actlr: ACTLR,
6 _reserved1: [u8; 0x04],
7 syst_csr: SYST_CSR,
8 syst_rvr: SYST_RVR,
9 syst_cvr: SYST_CVR,
10 syst_calib: SYST_CALIB,
11 _reserved5: [u8; 0xe0],
12 nvic_iser0: NVIC_ISER0,
13 nvic_iser1: NVIC_ISER1,
14 nvic_iser2: NVIC_ISER2,
15 nvic_iser3: NVIC_ISER3,
16 _reserved9: [u8; 0x70],
17 nvic_icer0: NVIC_ICER0,
18 nvic_icer1: NVIC_ICER1,
19 nvic_icer2: NVIC_ICER2,
20 nvic_icer3: NVIC_ICER3,
21 _reserved13: [u8; 0x70],
22 nvic_ispr0: NVIC_ISPR0,
23 nvic_ispr1: NVIC_ISPR1,
24 nvic_ispr2: NVIC_ISPR2,
25 nvic_ispr3: NVIC_ISPR3,
26 _reserved17: [u8; 0x70],
27 nvic_icpr0: NVIC_ICPR0,
28 nvic_icpr1: NVIC_ICPR1,
29 nvic_icpr2: NVIC_ICPR2,
30 nvic_icpr3: NVIC_ICPR3,
31 _reserved21: [u8; 0x70],
32 nvic_iabr0: NVIC_IABR0,
33 nvic_iabr1: NVIC_IABR1,
34 nvic_iabr2: NVIC_IABR2,
35 nvic_iabr3: NVIC_IABR3,
36 _reserved25: [u8; 0xf0],
37 nvic_ipr0: NVIC_IPR0,
38 nvic_ipr1: NVIC_IPR1,
39 nvic_ipr2: NVIC_IPR2,
40 nvic_ipr3: NVIC_IPR3,
41 nvic_ipr4: NVIC_IPR4,
42 nvic_ipr5: NVIC_IPR5,
43 nvic_ipr6: NVIC_IPR6,
44 nvic_ipr7: NVIC_IPR7,
45 nvic_ipr8: NVIC_IPR8,
46 nvic_ipr9: NVIC_IPR9,
47 nvic_ipr10: NVIC_IPR10,
48 nvic_ipr11: NVIC_IPR11,
49 nvic_ipr12: NVIC_IPR12,
50 nvic_ipr13: NVIC_IPR13,
51 nvic_ipr14: NVIC_IPR14,
52 nvic_ipr15: NVIC_IPR15,
53 nvic_ipr16: NVIC_IPR16,
54 nvic_ipr17: NVIC_IPR17,
55 nvic_ipr18: NVIC_IPR18,
56 nvic_ipr19: NVIC_IPR19,
57 nvic_ipr20: NVIC_IPR20,
58 nvic_ipr21: NVIC_IPR21,
59 nvic_ipr22: NVIC_IPR22,
60 nvic_ipr23: NVIC_IPR23,
61 nvic_ipr24: NVIC_IPR24,
62 nvic_ipr25: NVIC_IPR25,
63 nvic_ipr26: NVIC_IPR26,
64 nvic_ipr27: NVIC_IPR27,
65 _reserved53: [u8; 0x0890],
66 cpuid: CPUID,
67 icsr: ICSR,
68 vtor: VTOR,
69 aircr: AIRCR,
70 scr: SCR,
71 ccr: CCR,
72 shpr1: SHPR1,
73 shpr2: SHPR2,
74 shpr3: SHPR3,
75 shcsr: SHCSR,
76 cfsr: CFSR,
77 hfsr: HFSR,
78 _reserved65: [u8; 0x04],
79 mmfar: MMFAR,
80 bfar: BFAR,
81 afsr: AFSR,
82 _reserved68: [u8; 0x48],
83 cpacr: CPACR,
84 _reserved69: [u8; 0x04],
85 mpu_type: MPU_TYPE,
86 mpu_ctrl: MPU_CTRL,
87 mpu_rnr: MPU_RNR,
88 mpu_rbar: MPU_RBAR,
89 mpu_rasr: MPU_RASR,
90 mpu_rbar_a1: MPU_RBAR_A1,
91 mpu_rasr_a1: MPU_RASR_A1,
92 mpu_rbar_a2: MPU_RBAR_A2,
93 mpu_rasr_a2: MPU_RASR_A2,
94 mpu_rbar_a3: MPU_RBAR_A3,
95 mpu_rasr_a3: MPU_RASR_A3,
96 _reserved80: [u8; 0x0144],
97 stir: STIR,
98 _reserved81: [u8; 0x30],
99 fpccr: FPCCR,
100 fpcar: FPCAR,
101 fpdscr: FPDSCR,
102}
103impl RegisterBlock {
104 #[doc = "0x08 - Auxiliary Control Register"]
105 #[inline(always)]
106 pub const fn actlr(&self) -> &ACTLR {
107 &self.actlr
108 }
109 #[doc = "0x10 - SysTick Control and Status Register"]
110 #[inline(always)]
111 pub const fn syst_csr(&self) -> &SYST_CSR {
112 &self.syst_csr
113 }
114 #[doc = "0x14 - SysTick Reload Value Register"]
115 #[inline(always)]
116 pub const fn syst_rvr(&self) -> &SYST_RVR {
117 &self.syst_rvr
118 }
119 #[doc = "0x18 - SysTick Current Value Register"]
120 #[inline(always)]
121 pub const fn syst_cvr(&self) -> &SYST_CVR {
122 &self.syst_cvr
123 }
124 #[doc = "0x1c - SysTick Calibration Value Register r"]
125 #[inline(always)]
126 pub const fn syst_calib(&self) -> &SYST_CALIB {
127 &self.syst_calib
128 }
129 #[doc = "0x100 - Interrupt Set-enable Register 0"]
130 #[inline(always)]
131 pub const fn nvic_iser0(&self) -> &NVIC_ISER0 {
132 &self.nvic_iser0
133 }
134 #[doc = "0x104 - Interrupt Set-enable Register 1"]
135 #[inline(always)]
136 pub const fn nvic_iser1(&self) -> &NVIC_ISER1 {
137 &self.nvic_iser1
138 }
139 #[doc = "0x108 - Interrupt Set-enable Register 2"]
140 #[inline(always)]
141 pub const fn nvic_iser2(&self) -> &NVIC_ISER2 {
142 &self.nvic_iser2
143 }
144 #[doc = "0x10c - Interrupt Set-enable Register 3"]
145 #[inline(always)]
146 pub const fn nvic_iser3(&self) -> &NVIC_ISER3 {
147 &self.nvic_iser3
148 }
149 #[doc = "0x180 - Interrupt Clear-enable Register 0"]
150 #[inline(always)]
151 pub const fn nvic_icer0(&self) -> &NVIC_ICER0 {
152 &self.nvic_icer0
153 }
154 #[doc = "0x184 - Interrupt Clear-enable Register 1"]
155 #[inline(always)]
156 pub const fn nvic_icer1(&self) -> &NVIC_ICER1 {
157 &self.nvic_icer1
158 }
159 #[doc = "0x188 - Interrupt Clear-enable Register 2"]
160 #[inline(always)]
161 pub const fn nvic_icer2(&self) -> &NVIC_ICER2 {
162 &self.nvic_icer2
163 }
164 #[doc = "0x18c - Interrupt Clear-enable Register 3"]
165 #[inline(always)]
166 pub const fn nvic_icer3(&self) -> &NVIC_ICER3 {
167 &self.nvic_icer3
168 }
169 #[doc = "0x200 - Interrupt Set-pending Register 0"]
170 #[inline(always)]
171 pub const fn nvic_ispr0(&self) -> &NVIC_ISPR0 {
172 &self.nvic_ispr0
173 }
174 #[doc = "0x204 - Interrupt Set-pending Register 1"]
175 #[inline(always)]
176 pub const fn nvic_ispr1(&self) -> &NVIC_ISPR1 {
177 &self.nvic_ispr1
178 }
179 #[doc = "0x208 - Interrupt Set-pending Register 2"]
180 #[inline(always)]
181 pub const fn nvic_ispr2(&self) -> &NVIC_ISPR2 {
182 &self.nvic_ispr2
183 }
184 #[doc = "0x20c - Interrupt Set-pending Register 3"]
185 #[inline(always)]
186 pub const fn nvic_ispr3(&self) -> &NVIC_ISPR3 {
187 &self.nvic_ispr3
188 }
189 #[doc = "0x280 - Interrupt Clear-pending Register 0"]
190 #[inline(always)]
191 pub const fn nvic_icpr0(&self) -> &NVIC_ICPR0 {
192 &self.nvic_icpr0
193 }
194 #[doc = "0x284 - Interrupt Clear-pending Register 1"]
195 #[inline(always)]
196 pub const fn nvic_icpr1(&self) -> &NVIC_ICPR1 {
197 &self.nvic_icpr1
198 }
199 #[doc = "0x288 - Interrupt Clear-pending Register 2"]
200 #[inline(always)]
201 pub const fn nvic_icpr2(&self) -> &NVIC_ICPR2 {
202 &self.nvic_icpr2
203 }
204 #[doc = "0x28c - Interrupt Clear-pending Register 3"]
205 #[inline(always)]
206 pub const fn nvic_icpr3(&self) -> &NVIC_ICPR3 {
207 &self.nvic_icpr3
208 }
209 #[doc = "0x300 - Interrupt Active Bit Register 0"]
210 #[inline(always)]
211 pub const fn nvic_iabr0(&self) -> &NVIC_IABR0 {
212 &self.nvic_iabr0
213 }
214 #[doc = "0x304 - Interrupt Active Bit Register 1"]
215 #[inline(always)]
216 pub const fn nvic_iabr1(&self) -> &NVIC_IABR1 {
217 &self.nvic_iabr1
218 }
219 #[doc = "0x308 - Interrupt Active Bit Register 2"]
220 #[inline(always)]
221 pub const fn nvic_iabr2(&self) -> &NVIC_IABR2 {
222 &self.nvic_iabr2
223 }
224 #[doc = "0x30c - Interrupt Active Bit Register 3"]
225 #[inline(always)]
226 pub const fn nvic_iabr3(&self) -> &NVIC_IABR3 {
227 &self.nvic_iabr3
228 }
229 #[doc = "0x400 - Interrupt Priority Register 0"]
230 #[inline(always)]
231 pub const fn nvic_ipr0(&self) -> &NVIC_IPR0 {
232 &self.nvic_ipr0
233 }
234 #[doc = "0x404 - Interrupt Priority Register 1"]
235 #[inline(always)]
236 pub const fn nvic_ipr1(&self) -> &NVIC_IPR1 {
237 &self.nvic_ipr1
238 }
239 #[doc = "0x408 - Interrupt Priority Register 2"]
240 #[inline(always)]
241 pub const fn nvic_ipr2(&self) -> &NVIC_IPR2 {
242 &self.nvic_ipr2
243 }
244 #[doc = "0x40c - Interrupt Priority Register 3"]
245 #[inline(always)]
246 pub const fn nvic_ipr3(&self) -> &NVIC_IPR3 {
247 &self.nvic_ipr3
248 }
249 #[doc = "0x410 - Interrupt Priority Register 4"]
250 #[inline(always)]
251 pub const fn nvic_ipr4(&self) -> &NVIC_IPR4 {
252 &self.nvic_ipr4
253 }
254 #[doc = "0x414 - Interrupt Priority Register 5"]
255 #[inline(always)]
256 pub const fn nvic_ipr5(&self) -> &NVIC_IPR5 {
257 &self.nvic_ipr5
258 }
259 #[doc = "0x418 - Interrupt Priority Register 6"]
260 #[inline(always)]
261 pub const fn nvic_ipr6(&self) -> &NVIC_IPR6 {
262 &self.nvic_ipr6
263 }
264 #[doc = "0x41c - Interrupt Priority Register 7"]
265 #[inline(always)]
266 pub const fn nvic_ipr7(&self) -> &NVIC_IPR7 {
267 &self.nvic_ipr7
268 }
269 #[doc = "0x420 - Interrupt Priority Register 8"]
270 #[inline(always)]
271 pub const fn nvic_ipr8(&self) -> &NVIC_IPR8 {
272 &self.nvic_ipr8
273 }
274 #[doc = "0x424 - Interrupt Priority Register 9"]
275 #[inline(always)]
276 pub const fn nvic_ipr9(&self) -> &NVIC_IPR9 {
277 &self.nvic_ipr9
278 }
279 #[doc = "0x428 - Interrupt Priority Register 10"]
280 #[inline(always)]
281 pub const fn nvic_ipr10(&self) -> &NVIC_IPR10 {
282 &self.nvic_ipr10
283 }
284 #[doc = "0x42c - Interrupt Priority Register 11"]
285 #[inline(always)]
286 pub const fn nvic_ipr11(&self) -> &NVIC_IPR11 {
287 &self.nvic_ipr11
288 }
289 #[doc = "0x430 - Interrupt Priority Register 12"]
290 #[inline(always)]
291 pub const fn nvic_ipr12(&self) -> &NVIC_IPR12 {
292 &self.nvic_ipr12
293 }
294 #[doc = "0x434 - Interrupt Priority Register 13"]
295 #[inline(always)]
296 pub const fn nvic_ipr13(&self) -> &NVIC_IPR13 {
297 &self.nvic_ipr13
298 }
299 #[doc = "0x438 - Interrupt Priority Register 14"]
300 #[inline(always)]
301 pub const fn nvic_ipr14(&self) -> &NVIC_IPR14 {
302 &self.nvic_ipr14
303 }
304 #[doc = "0x43c - Interrupt Priority Register 15"]
305 #[inline(always)]
306 pub const fn nvic_ipr15(&self) -> &NVIC_IPR15 {
307 &self.nvic_ipr15
308 }
309 #[doc = "0x440 - Interrupt Priority Register 16"]
310 #[inline(always)]
311 pub const fn nvic_ipr16(&self) -> &NVIC_IPR16 {
312 &self.nvic_ipr16
313 }
314 #[doc = "0x444 - Interrupt Priority Register 17"]
315 #[inline(always)]
316 pub const fn nvic_ipr17(&self) -> &NVIC_IPR17 {
317 &self.nvic_ipr17
318 }
319 #[doc = "0x448 - Interrupt Priority Register 18"]
320 #[inline(always)]
321 pub const fn nvic_ipr18(&self) -> &NVIC_IPR18 {
322 &self.nvic_ipr18
323 }
324 #[doc = "0x44c - Interrupt Priority Register 19"]
325 #[inline(always)]
326 pub const fn nvic_ipr19(&self) -> &NVIC_IPR19 {
327 &self.nvic_ipr19
328 }
329 #[doc = "0x450 - Interrupt Priority Register 20"]
330 #[inline(always)]
331 pub const fn nvic_ipr20(&self) -> &NVIC_IPR20 {
332 &self.nvic_ipr20
333 }
334 #[doc = "0x454 - Interrupt Priority Register 21"]
335 #[inline(always)]
336 pub const fn nvic_ipr21(&self) -> &NVIC_IPR21 {
337 &self.nvic_ipr21
338 }
339 #[doc = "0x458 - Interrupt Priority Register 22"]
340 #[inline(always)]
341 pub const fn nvic_ipr22(&self) -> &NVIC_IPR22 {
342 &self.nvic_ipr22
343 }
344 #[doc = "0x45c - Interrupt Priority Register 23"]
345 #[inline(always)]
346 pub const fn nvic_ipr23(&self) -> &NVIC_IPR23 {
347 &self.nvic_ipr23
348 }
349 #[doc = "0x460 - Interrupt Priority Register 24"]
350 #[inline(always)]
351 pub const fn nvic_ipr24(&self) -> &NVIC_IPR24 {
352 &self.nvic_ipr24
353 }
354 #[doc = "0x464 - Interrupt Priority Register 25"]
355 #[inline(always)]
356 pub const fn nvic_ipr25(&self) -> &NVIC_IPR25 {
357 &self.nvic_ipr25
358 }
359 #[doc = "0x468 - Interrupt Priority Register 26"]
360 #[inline(always)]
361 pub const fn nvic_ipr26(&self) -> &NVIC_IPR26 {
362 &self.nvic_ipr26
363 }
364 #[doc = "0x46c - Interrupt Priority Register 27"]
365 #[inline(always)]
366 pub const fn nvic_ipr27(&self) -> &NVIC_IPR27 {
367 &self.nvic_ipr27
368 }
369 #[doc = "0xd00 - CPUID Base Register"]
370 #[inline(always)]
371 pub const fn cpuid(&self) -> &CPUID {
372 &self.cpuid
373 }
374 #[doc = "0xd04 - Interrupt Control and State Register"]
375 #[inline(always)]
376 pub const fn icsr(&self) -> &ICSR {
377 &self.icsr
378 }
379 #[doc = "0xd08 - Vector Table Offset Register"]
380 #[inline(always)]
381 pub const fn vtor(&self) -> &VTOR {
382 &self.vtor
383 }
384 #[doc = "0xd0c - Application Interrupt and Reset Control Register"]
385 #[inline(always)]
386 pub const fn aircr(&self) -> &AIRCR {
387 &self.aircr
388 }
389 #[doc = "0xd10 - System Control Register"]
390 #[inline(always)]
391 pub const fn scr(&self) -> &SCR {
392 &self.scr
393 }
394 #[doc = "0xd14 - Configuration and Control Register"]
395 #[inline(always)]
396 pub const fn ccr(&self) -> &CCR {
397 &self.ccr
398 }
399 #[doc = "0xd18 - System Handler Priority Register 1"]
400 #[inline(always)]
401 pub const fn shpr1(&self) -> &SHPR1 {
402 &self.shpr1
403 }
404 #[doc = "0xd1c - System Handler Priority Register 2"]
405 #[inline(always)]
406 pub const fn shpr2(&self) -> &SHPR2 {
407 &self.shpr2
408 }
409 #[doc = "0xd20 - System Handler Priority Register 3"]
410 #[inline(always)]
411 pub const fn shpr3(&self) -> &SHPR3 {
412 &self.shpr3
413 }
414 #[doc = "0xd24 - System Handler Control and State Register"]
415 #[inline(always)]
416 pub const fn shcsr(&self) -> &SHCSR {
417 &self.shcsr
418 }
419 #[doc = "0xd28 - Configurable Fault Status Register"]
420 #[inline(always)]
421 pub const fn cfsr(&self) -> &CFSR {
422 &self.cfsr
423 }
424 #[doc = "0xd2c - HardFault Status Register"]
425 #[inline(always)]
426 pub const fn hfsr(&self) -> &HFSR {
427 &self.hfsr
428 }
429 #[doc = "0xd34 - MemManage Fault Address Register"]
430 #[inline(always)]
431 pub const fn mmfar(&self) -> &MMFAR {
432 &self.mmfar
433 }
434 #[doc = "0xd38 - BusFault Address Register"]
435 #[inline(always)]
436 pub const fn bfar(&self) -> &BFAR {
437 &self.bfar
438 }
439 #[doc = "0xd3c - Auxiliary Fault Status Register"]
440 #[inline(always)]
441 pub const fn afsr(&self) -> &AFSR {
442 &self.afsr
443 }
444 #[doc = "0xd88 - Coprocessor Access Control Register"]
445 #[inline(always)]
446 pub const fn cpacr(&self) -> &CPACR {
447 &self.cpacr
448 }
449 #[doc = "0xd90 - MPU Type Register"]
450 #[inline(always)]
451 pub const fn mpu_type(&self) -> &MPU_TYPE {
452 &self.mpu_type
453 }
454 #[doc = "0xd94 - MPU Control Register"]
455 #[inline(always)]
456 pub const fn mpu_ctrl(&self) -> &MPU_CTRL {
457 &self.mpu_ctrl
458 }
459 #[doc = "0xd98 - MPU Region Number Register"]
460 #[inline(always)]
461 pub const fn mpu_rnr(&self) -> &MPU_RNR {
462 &self.mpu_rnr
463 }
464 #[doc = "0xd9c - MPU Region Base Address Register"]
465 #[inline(always)]
466 pub const fn mpu_rbar(&self) -> &MPU_RBAR {
467 &self.mpu_rbar
468 }
469 #[doc = "0xda0 - MPU Region Attribute and Size Register"]
470 #[inline(always)]
471 pub const fn mpu_rasr(&self) -> &MPU_RASR {
472 &self.mpu_rasr
473 }
474 #[doc = "0xda4 - MPU Region Base Address Register A1"]
475 #[inline(always)]
476 pub const fn mpu_rbar_a1(&self) -> &MPU_RBAR_A1 {
477 &self.mpu_rbar_a1
478 }
479 #[doc = "0xda8 - MPU Region Attribute and Size Register A1"]
480 #[inline(always)]
481 pub const fn mpu_rasr_a1(&self) -> &MPU_RASR_A1 {
482 &self.mpu_rasr_a1
483 }
484 #[doc = "0xdac - MPU Region Base Address Register A2"]
485 #[inline(always)]
486 pub const fn mpu_rbar_a2(&self) -> &MPU_RBAR_A2 {
487 &self.mpu_rbar_a2
488 }
489 #[doc = "0xdb0 - MPU Region Attribute and Size Register A2"]
490 #[inline(always)]
491 pub const fn mpu_rasr_a2(&self) -> &MPU_RASR_A2 {
492 &self.mpu_rasr_a2
493 }
494 #[doc = "0xdb4 - MPU Region Base Address Register A3"]
495 #[inline(always)]
496 pub const fn mpu_rbar_a3(&self) -> &MPU_RBAR_A3 {
497 &self.mpu_rbar_a3
498 }
499 #[doc = "0xdb8 - MPU Region Attribute and Size Register A3"]
500 #[inline(always)]
501 pub const fn mpu_rasr_a3(&self) -> &MPU_RASR_A3 {
502 &self.mpu_rasr_a3
503 }
504 #[doc = "0xf00 - Software Trigger Interrupt Register"]
505 #[inline(always)]
506 pub const fn stir(&self) -> &STIR {
507 &self.stir
508 }
509 #[doc = "0xf34 - Floating-point Context Control Register"]
510 #[inline(always)]
511 pub const fn fpccr(&self) -> &FPCCR {
512 &self.fpccr
513 }
514 #[doc = "0xf38 - Floating-point Context Address Register"]
515 #[inline(always)]
516 pub const fn fpcar(&self) -> &FPCAR {
517 &self.fpcar
518 }
519 #[doc = "0xf3c - Floating-point Default Status Control Register"]
520 #[inline(always)]
521 pub const fn fpdscr(&self) -> &FPDSCR {
522 &self.fpdscr
523 }
524}
525#[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`]
526module"]
527pub type ACTLR = crate::Reg<actlr::ACTLR_SPEC>;
528#[doc = "Auxiliary Control Register"]
529pub mod actlr;
530#[doc = "SYST_CSR (rw) register accessor: SysTick Control and Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_csr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_csr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_csr`]
531module"]
532pub type SYST_CSR = crate::Reg<syst_csr::SYST_CSR_SPEC>;
533#[doc = "SysTick Control and Status Register"]
534pub mod syst_csr;
535#[doc = "SYST_RVR (rw) register accessor: SysTick Reload Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_rvr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_rvr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_rvr`]
536module"]
537pub type SYST_RVR = crate::Reg<syst_rvr::SYST_RVR_SPEC>;
538#[doc = "SysTick Reload Value Register"]
539pub mod syst_rvr;
540#[doc = "SYST_CVR (rw) register accessor: SysTick Current Value Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_cvr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_cvr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_cvr`]
541module"]
542pub type SYST_CVR = crate::Reg<syst_cvr::SYST_CVR_SPEC>;
543#[doc = "SysTick Current Value Register"]
544pub mod syst_cvr;
545#[doc = "SYST_CALIB (rw) register accessor: SysTick Calibration Value Register r\n\nYou can [`read`](crate::Reg::read) this register and get [`syst_calib::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`syst_calib::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_calib`]
546module"]
547pub type SYST_CALIB = crate::Reg<syst_calib::SYST_CALIB_SPEC>;
548#[doc = "SysTick Calibration Value Register r"]
549pub mod syst_calib;
550#[doc = "NVIC_ISER0 (rw) register accessor: Interrupt Set-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser0`]
551module"]
552pub type NVIC_ISER0 = crate::Reg<nvic_iser0::NVIC_ISER0_SPEC>;
553#[doc = "Interrupt Set-enable Register 0"]
554pub mod nvic_iser0;
555#[doc = "NVIC_ISER1 (rw) register accessor: Interrupt Set-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser1`]
556module"]
557pub type NVIC_ISER1 = crate::Reg<nvic_iser1::NVIC_ISER1_SPEC>;
558#[doc = "Interrupt Set-enable Register 1"]
559pub mod nvic_iser1;
560#[doc = "NVIC_ISER2 (rw) register accessor: Interrupt Set-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser2`]
561module"]
562pub type NVIC_ISER2 = crate::Reg<nvic_iser2::NVIC_ISER2_SPEC>;
563#[doc = "Interrupt Set-enable Register 2"]
564pub mod nvic_iser2;
565#[doc = "NVIC_ISER3 (rw) register accessor: Interrupt Set-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iser3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iser3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser3`]
566module"]
567pub type NVIC_ISER3 = crate::Reg<nvic_iser3::NVIC_ISER3_SPEC>;
568#[doc = "Interrupt Set-enable Register 3"]
569pub mod nvic_iser3;
570#[doc = "NVIC_ICER0 (rw) register accessor: Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer0`]
571module"]
572pub type NVIC_ICER0 = crate::Reg<nvic_icer0::NVIC_ICER0_SPEC>;
573#[doc = "Interrupt Clear-enable Register 0"]
574pub mod nvic_icer0;
575#[doc = "NVIC_ICER1 (rw) register accessor: Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer1`]
576module"]
577pub type NVIC_ICER1 = crate::Reg<nvic_icer1::NVIC_ICER1_SPEC>;
578#[doc = "Interrupt Clear-enable Register 1"]
579pub mod nvic_icer1;
580#[doc = "NVIC_ICER2 (rw) register accessor: Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer2`]
581module"]
582pub type NVIC_ICER2 = crate::Reg<nvic_icer2::NVIC_ICER2_SPEC>;
583#[doc = "Interrupt Clear-enable Register 2"]
584pub mod nvic_icer2;
585#[doc = "NVIC_ICER3 (rw) register accessor: Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icer3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icer3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer3`]
586module"]
587pub type NVIC_ICER3 = crate::Reg<nvic_icer3::NVIC_ICER3_SPEC>;
588#[doc = "Interrupt Clear-enable Register 3"]
589pub mod nvic_icer3;
590#[doc = "NVIC_ISPR0 (rw) register accessor: Interrupt Set-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr0`]
591module"]
592pub type NVIC_ISPR0 = crate::Reg<nvic_ispr0::NVIC_ISPR0_SPEC>;
593#[doc = "Interrupt Set-pending Register 0"]
594pub mod nvic_ispr0;
595#[doc = "NVIC_ISPR1 (rw) register accessor: Interrupt Set-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr1`]
596module"]
597pub type NVIC_ISPR1 = crate::Reg<nvic_ispr1::NVIC_ISPR1_SPEC>;
598#[doc = "Interrupt Set-pending Register 1"]
599pub mod nvic_ispr1;
600#[doc = "NVIC_ISPR2 (rw) register accessor: Interrupt Set-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr2`]
601module"]
602pub type NVIC_ISPR2 = crate::Reg<nvic_ispr2::NVIC_ISPR2_SPEC>;
603#[doc = "Interrupt Set-pending Register 2"]
604pub mod nvic_ispr2;
605#[doc = "NVIC_ISPR3 (rw) register accessor: Interrupt Set-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ispr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ispr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr3`]
606module"]
607pub type NVIC_ISPR3 = crate::Reg<nvic_ispr3::NVIC_ISPR3_SPEC>;
608#[doc = "Interrupt Set-pending Register 3"]
609pub mod nvic_ispr3;
610#[doc = "NVIC_ICPR0 (rw) register accessor: Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr0`]
611module"]
612pub type NVIC_ICPR0 = crate::Reg<nvic_icpr0::NVIC_ICPR0_SPEC>;
613#[doc = "Interrupt Clear-pending Register 0"]
614pub mod nvic_icpr0;
615#[doc = "NVIC_ICPR1 (rw) register accessor: Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr1`]
616module"]
617pub type NVIC_ICPR1 = crate::Reg<nvic_icpr1::NVIC_ICPR1_SPEC>;
618#[doc = "Interrupt Clear-pending Register 1"]
619pub mod nvic_icpr1;
620#[doc = "NVIC_ICPR2 (rw) register accessor: Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr2`]
621module"]
622pub type NVIC_ICPR2 = crate::Reg<nvic_icpr2::NVIC_ICPR2_SPEC>;
623#[doc = "Interrupt Clear-pending Register 2"]
624pub mod nvic_icpr2;
625#[doc = "NVIC_ICPR3 (rw) register accessor: Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_icpr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_icpr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr3`]
626module"]
627pub type NVIC_ICPR3 = crate::Reg<nvic_icpr3::NVIC_ICPR3_SPEC>;
628#[doc = "Interrupt Clear-pending Register 3"]
629pub mod nvic_icpr3;
630#[doc = "NVIC_IABR0 (rw) register accessor: Interrupt Active Bit Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr0`]
631module"]
632pub type NVIC_IABR0 = crate::Reg<nvic_iabr0::NVIC_IABR0_SPEC>;
633#[doc = "Interrupt Active Bit Register 0"]
634pub mod nvic_iabr0;
635#[doc = "NVIC_IABR1 (rw) register accessor: Interrupt Active Bit Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr1`]
636module"]
637pub type NVIC_IABR1 = crate::Reg<nvic_iabr1::NVIC_IABR1_SPEC>;
638#[doc = "Interrupt Active Bit Register 1"]
639pub mod nvic_iabr1;
640#[doc = "NVIC_IABR2 (rw) register accessor: Interrupt Active Bit Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr2`]
641module"]
642pub type NVIC_IABR2 = crate::Reg<nvic_iabr2::NVIC_IABR2_SPEC>;
643#[doc = "Interrupt Active Bit Register 2"]
644pub mod nvic_iabr2;
645#[doc = "NVIC_IABR3 (rw) register accessor: Interrupt Active Bit Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_iabr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_iabr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr3`]
646module"]
647pub type NVIC_IABR3 = crate::Reg<nvic_iabr3::NVIC_IABR3_SPEC>;
648#[doc = "Interrupt Active Bit Register 3"]
649pub mod nvic_iabr3;
650#[doc = "NVIC_IPR0 (rw) register accessor: Interrupt Priority Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr0`]
651module"]
652pub type NVIC_IPR0 = crate::Reg<nvic_ipr0::NVIC_IPR0_SPEC>;
653#[doc = "Interrupt Priority Register 0"]
654pub mod nvic_ipr0;
655#[doc = "NVIC_IPR1 (rw) register accessor: Interrupt Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr1`]
656module"]
657pub type NVIC_IPR1 = crate::Reg<nvic_ipr1::NVIC_IPR1_SPEC>;
658#[doc = "Interrupt Priority Register 1"]
659pub mod nvic_ipr1;
660#[doc = "NVIC_IPR2 (rw) register accessor: Interrupt Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr2`]
661module"]
662pub type NVIC_IPR2 = crate::Reg<nvic_ipr2::NVIC_IPR2_SPEC>;
663#[doc = "Interrupt Priority Register 2"]
664pub mod nvic_ipr2;
665#[doc = "NVIC_IPR3 (rw) register accessor: Interrupt Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr3`]
666module"]
667pub type NVIC_IPR3 = crate::Reg<nvic_ipr3::NVIC_IPR3_SPEC>;
668#[doc = "Interrupt Priority Register 3"]
669pub mod nvic_ipr3;
670#[doc = "NVIC_IPR4 (rw) register accessor: Interrupt Priority Register 4\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr4::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr4::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr4`]
671module"]
672pub type NVIC_IPR4 = crate::Reg<nvic_ipr4::NVIC_IPR4_SPEC>;
673#[doc = "Interrupt Priority Register 4"]
674pub mod nvic_ipr4;
675#[doc = "NVIC_IPR5 (rw) register accessor: Interrupt Priority Register 5\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr5::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr5::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr5`]
676module"]
677pub type NVIC_IPR5 = crate::Reg<nvic_ipr5::NVIC_IPR5_SPEC>;
678#[doc = "Interrupt Priority Register 5"]
679pub mod nvic_ipr5;
680#[doc = "NVIC_IPR6 (rw) register accessor: Interrupt Priority Register 6\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr6::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr6::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr6`]
681module"]
682pub type NVIC_IPR6 = crate::Reg<nvic_ipr6::NVIC_IPR6_SPEC>;
683#[doc = "Interrupt Priority Register 6"]
684pub mod nvic_ipr6;
685#[doc = "NVIC_IPR7 (rw) register accessor: Interrupt Priority Register 7\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr7::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr7::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr7`]
686module"]
687pub type NVIC_IPR7 = crate::Reg<nvic_ipr7::NVIC_IPR7_SPEC>;
688#[doc = "Interrupt Priority Register 7"]
689pub mod nvic_ipr7;
690#[doc = "NVIC_IPR8 (rw) register accessor: Interrupt Priority Register 8\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr8::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr8::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr8`]
691module"]
692pub type NVIC_IPR8 = crate::Reg<nvic_ipr8::NVIC_IPR8_SPEC>;
693#[doc = "Interrupt Priority Register 8"]
694pub mod nvic_ipr8;
695#[doc = "NVIC_IPR9 (rw) register accessor: Interrupt Priority Register 9\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr9::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr9::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr9`]
696module"]
697pub type NVIC_IPR9 = crate::Reg<nvic_ipr9::NVIC_IPR9_SPEC>;
698#[doc = "Interrupt Priority Register 9"]
699pub mod nvic_ipr9;
700#[doc = "NVIC_IPR10 (rw) register accessor: Interrupt Priority Register 10\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr10::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr10::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr10`]
701module"]
702pub type NVIC_IPR10 = crate::Reg<nvic_ipr10::NVIC_IPR10_SPEC>;
703#[doc = "Interrupt Priority Register 10"]
704pub mod nvic_ipr10;
705#[doc = "NVIC_IPR11 (rw) register accessor: Interrupt Priority Register 11\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr11::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr11::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr11`]
706module"]
707pub type NVIC_IPR11 = crate::Reg<nvic_ipr11::NVIC_IPR11_SPEC>;
708#[doc = "Interrupt Priority Register 11"]
709pub mod nvic_ipr11;
710#[doc = "NVIC_IPR12 (rw) register accessor: Interrupt Priority Register 12\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr12::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr12::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr12`]
711module"]
712pub type NVIC_IPR12 = crate::Reg<nvic_ipr12::NVIC_IPR12_SPEC>;
713#[doc = "Interrupt Priority Register 12"]
714pub mod nvic_ipr12;
715#[doc = "NVIC_IPR13 (rw) register accessor: Interrupt Priority Register 13\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr13::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr13::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr13`]
716module"]
717pub type NVIC_IPR13 = crate::Reg<nvic_ipr13::NVIC_IPR13_SPEC>;
718#[doc = "Interrupt Priority Register 13"]
719pub mod nvic_ipr13;
720#[doc = "NVIC_IPR14 (rw) register accessor: Interrupt Priority Register 14\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr14::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr14::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr14`]
721module"]
722pub type NVIC_IPR14 = crate::Reg<nvic_ipr14::NVIC_IPR14_SPEC>;
723#[doc = "Interrupt Priority Register 14"]
724pub mod nvic_ipr14;
725#[doc = "NVIC_IPR15 (rw) register accessor: Interrupt Priority Register 15\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr15::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr15::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr15`]
726module"]
727pub type NVIC_IPR15 = crate::Reg<nvic_ipr15::NVIC_IPR15_SPEC>;
728#[doc = "Interrupt Priority Register 15"]
729pub mod nvic_ipr15;
730#[doc = "NVIC_IPR16 (rw) register accessor: Interrupt Priority Register 16\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr16::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr16::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr16`]
731module"]
732pub type NVIC_IPR16 = crate::Reg<nvic_ipr16::NVIC_IPR16_SPEC>;
733#[doc = "Interrupt Priority Register 16"]
734pub mod nvic_ipr16;
735#[doc = "NVIC_IPR17 (rw) register accessor: Interrupt Priority Register 17\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr17::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr17::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr17`]
736module"]
737pub type NVIC_IPR17 = crate::Reg<nvic_ipr17::NVIC_IPR17_SPEC>;
738#[doc = "Interrupt Priority Register 17"]
739pub mod nvic_ipr17;
740#[doc = "NVIC_IPR18 (rw) register accessor: Interrupt Priority Register 18\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr18::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr18::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr18`]
741module"]
742pub type NVIC_IPR18 = crate::Reg<nvic_ipr18::NVIC_IPR18_SPEC>;
743#[doc = "Interrupt Priority Register 18"]
744pub mod nvic_ipr18;
745#[doc = "NVIC_IPR19 (rw) register accessor: Interrupt Priority Register 19\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr19::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr19::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr19`]
746module"]
747pub type NVIC_IPR19 = crate::Reg<nvic_ipr19::NVIC_IPR19_SPEC>;
748#[doc = "Interrupt Priority Register 19"]
749pub mod nvic_ipr19;
750#[doc = "NVIC_IPR20 (rw) register accessor: Interrupt Priority Register 20\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr20::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr20::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr20`]
751module"]
752pub type NVIC_IPR20 = crate::Reg<nvic_ipr20::NVIC_IPR20_SPEC>;
753#[doc = "Interrupt Priority Register 20"]
754pub mod nvic_ipr20;
755#[doc = "NVIC_IPR21 (rw) register accessor: Interrupt Priority Register 21\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr21::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr21::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr21`]
756module"]
757pub type NVIC_IPR21 = crate::Reg<nvic_ipr21::NVIC_IPR21_SPEC>;
758#[doc = "Interrupt Priority Register 21"]
759pub mod nvic_ipr21;
760#[doc = "NVIC_IPR22 (rw) register accessor: Interrupt Priority Register 22\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr22::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr22::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr22`]
761module"]
762pub type NVIC_IPR22 = crate::Reg<nvic_ipr22::NVIC_IPR22_SPEC>;
763#[doc = "Interrupt Priority Register 22"]
764pub mod nvic_ipr22;
765#[doc = "NVIC_IPR23 (rw) register accessor: Interrupt Priority Register 23\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr23::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr23::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr23`]
766module"]
767pub type NVIC_IPR23 = crate::Reg<nvic_ipr23::NVIC_IPR23_SPEC>;
768#[doc = "Interrupt Priority Register 23"]
769pub mod nvic_ipr23;
770#[doc = "NVIC_IPR24 (rw) register accessor: Interrupt Priority Register 24\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr24::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr24::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr24`]
771module"]
772pub type NVIC_IPR24 = crate::Reg<nvic_ipr24::NVIC_IPR24_SPEC>;
773#[doc = "Interrupt Priority Register 24"]
774pub mod nvic_ipr24;
775#[doc = "NVIC_IPR25 (rw) register accessor: Interrupt Priority Register 25\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr25::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr25::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr25`]
776module"]
777pub type NVIC_IPR25 = crate::Reg<nvic_ipr25::NVIC_IPR25_SPEC>;
778#[doc = "Interrupt Priority Register 25"]
779pub mod nvic_ipr25;
780#[doc = "NVIC_IPR26 (rw) register accessor: Interrupt Priority Register 26\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr26::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr26::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr26`]
781module"]
782pub type NVIC_IPR26 = crate::Reg<nvic_ipr26::NVIC_IPR26_SPEC>;
783#[doc = "Interrupt Priority Register 26"]
784pub mod nvic_ipr26;
785#[doc = "NVIC_IPR27 (rw) register accessor: Interrupt Priority Register 27\n\nYou can [`read`](crate::Reg::read) this register and get [`nvic_ipr27::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nvic_ipr27::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr27`]
786module"]
787pub type NVIC_IPR27 = crate::Reg<nvic_ipr27::NVIC_IPR27_SPEC>;
788#[doc = "Interrupt Priority Register 27"]
789pub mod nvic_ipr27;
790#[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`]
791module"]
792pub type CPUID = crate::Reg<cpuid::CPUID_SPEC>;
793#[doc = "CPUID Base Register"]
794pub mod cpuid;
795#[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`]
796module"]
797pub type ICSR = crate::Reg<icsr::ICSR_SPEC>;
798#[doc = "Interrupt Control and State Register"]
799pub mod icsr;
800#[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`]
801module"]
802pub type VTOR = crate::Reg<vtor::VTOR_SPEC>;
803#[doc = "Vector Table Offset Register"]
804pub mod vtor;
805#[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`]
806module"]
807pub type AIRCR = crate::Reg<aircr::AIRCR_SPEC>;
808#[doc = "Application Interrupt and Reset Control Register"]
809pub mod aircr;
810#[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`]
811module"]
812pub type SCR = crate::Reg<scr::SCR_SPEC>;
813#[doc = "System Control Register"]
814pub mod scr;
815#[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`]
816module"]
817pub type CCR = crate::Reg<ccr::CCR_SPEC>;
818#[doc = "Configuration and Control Register"]
819pub mod ccr;
820#[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`]
821module"]
822pub type SHPR1 = crate::Reg<shpr1::SHPR1_SPEC>;
823#[doc = "System Handler Priority Register 1"]
824pub mod shpr1;
825#[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`]
826module"]
827pub type SHPR2 = crate::Reg<shpr2::SHPR2_SPEC>;
828#[doc = "System Handler Priority Register 2"]
829pub mod shpr2;
830#[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`]
831module"]
832pub type SHPR3 = crate::Reg<shpr3::SHPR3_SPEC>;
833#[doc = "System Handler Priority Register 3"]
834pub mod shpr3;
835#[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`]
836module"]
837pub type SHCSR = crate::Reg<shcsr::SHCSR_SPEC>;
838#[doc = "System Handler Control and State Register"]
839pub mod shcsr;
840#[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`]
841module"]
842pub type CFSR = crate::Reg<cfsr::CFSR_SPEC>;
843#[doc = "Configurable Fault Status Register"]
844pub mod cfsr;
845#[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`]
846module"]
847pub type HFSR = crate::Reg<hfsr::HFSR_SPEC>;
848#[doc = "HardFault Status Register"]
849pub mod hfsr;
850#[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`]
851module"]
852pub type MMFAR = crate::Reg<mmfar::MMFAR_SPEC>;
853#[doc = "MemManage Fault Address Register"]
854pub mod mmfar;
855#[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`]
856module"]
857pub type BFAR = crate::Reg<bfar::BFAR_SPEC>;
858#[doc = "BusFault Address Register"]
859pub mod bfar;
860#[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`]
861module"]
862pub type AFSR = crate::Reg<afsr::AFSR_SPEC>;
863#[doc = "Auxiliary Fault Status Register"]
864pub mod afsr;
865#[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`]
866module"]
867pub type CPACR = crate::Reg<cpacr::CPACR_SPEC>;
868#[doc = "Coprocessor Access Control Register"]
869pub mod cpacr;
870#[doc = "MPU_TYPE (r) register accessor: MPU Type Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_type`]
871module"]
872pub type MPU_TYPE = crate::Reg<mpu_type::MPU_TYPE_SPEC>;
873#[doc = "MPU Type Register"]
874pub mod mpu_type;
875#[doc = "MPU_CTRL (rw) register accessor: MPU Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_ctrl`]
876module"]
877pub type MPU_CTRL = crate::Reg<mpu_ctrl::MPU_CTRL_SPEC>;
878#[doc = "MPU Control Register"]
879pub mod mpu_ctrl;
880#[doc = "MPU_RNR (rw) register accessor: MPU Region Number Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rnr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rnr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rnr`]
881module"]
882pub type MPU_RNR = crate::Reg<mpu_rnr::MPU_RNR_SPEC>;
883#[doc = "MPU Region Number Register"]
884pub mod mpu_rnr;
885#[doc = "MPU_RBAR (rw) register accessor: MPU Region Base Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar`]
886module"]
887pub type MPU_RBAR = crate::Reg<mpu_rbar::MPU_RBAR_SPEC>;
888#[doc = "MPU Region Base Address Register"]
889pub mod mpu_rbar;
890#[doc = "MPU_RASR (rw) register accessor: MPU Region Attribute and Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr`]
891module"]
892pub type MPU_RASR = crate::Reg<mpu_rasr::MPU_RASR_SPEC>;
893#[doc = "MPU Region Attribute and Size Register"]
894pub mod mpu_rasr;
895#[doc = "MPU_RBAR_A1 (rw) register accessor: MPU Region Base Address Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a1`]
896module"]
897pub type MPU_RBAR_A1 = crate::Reg<mpu_rbar_a1::MPU_RBAR_A1_SPEC>;
898#[doc = "MPU Region Base Address Register A1"]
899pub mod mpu_rbar_a1;
900#[doc = "MPU_RASR_A1 (rw) register accessor: MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a1`]
901module"]
902pub type MPU_RASR_A1 = crate::Reg<mpu_rasr_a1::MPU_RASR_A1_SPEC>;
903#[doc = "MPU Region Attribute and Size Register A1"]
904pub mod mpu_rasr_a1;
905#[doc = "MPU_RBAR_A2 (rw) register accessor: MPU Region Base Address Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a2`]
906module"]
907pub type MPU_RBAR_A2 = crate::Reg<mpu_rbar_a2::MPU_RBAR_A2_SPEC>;
908#[doc = "MPU Region Base Address Register A2"]
909pub mod mpu_rbar_a2;
910#[doc = "MPU_RASR_A2 (rw) register accessor: MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a2`]
911module"]
912pub type MPU_RASR_A2 = crate::Reg<mpu_rasr_a2::MPU_RASR_A2_SPEC>;
913#[doc = "MPU Region Attribute and Size Register A2"]
914pub mod mpu_rasr_a2;
915#[doc = "MPU_RBAR_A3 (rw) register accessor: MPU Region Base Address Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rbar_a3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a3`]
916module"]
917pub type MPU_RBAR_A3 = crate::Reg<mpu_rbar_a3::MPU_RBAR_A3_SPEC>;
918#[doc = "MPU Region Base Address Register A3"]
919pub mod mpu_rbar_a3;
920#[doc = "MPU_RASR_A3 (rw) register accessor: MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::Reg::read) this register and get [`mpu_rasr_a3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a3`]
921module"]
922pub type MPU_RASR_A3 = crate::Reg<mpu_rasr_a3::MPU_RASR_A3_SPEC>;
923#[doc = "MPU Region Attribute and Size Register A3"]
924pub mod mpu_rasr_a3;
925#[doc = "STIR (w) register accessor: Software Trigger Interrupt Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`stir::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stir`]
926module"]
927pub type STIR = crate::Reg<stir::STIR_SPEC>;
928#[doc = "Software Trigger Interrupt Register"]
929pub mod stir;
930#[doc = "FPCCR (rw) register accessor: Floating-point Context Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpccr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpccr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpccr`]
931module"]
932pub type FPCCR = crate::Reg<fpccr::FPCCR_SPEC>;
933#[doc = "Floating-point Context Control Register"]
934pub mod fpccr;
935#[doc = "FPCAR (rw) register accessor: Floating-point Context Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpcar::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpcar::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcar`]
936module"]
937pub type FPCAR = crate::Reg<fpcar::FPCAR_SPEC>;
938#[doc = "Floating-point Context Address Register"]
939pub mod fpcar;
940#[doc = "FPDSCR (rw) register accessor: Floating-point Default Status Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpdscr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpdscr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpdscr`]
941module"]
942pub type FPDSCR = crate::Reg<fpdscr::FPDSCR_SPEC>;
943#[doc = "Floating-point Default Status Control Register"]
944pub mod fpdscr;