xmc4300/scu_reset/
rstset.rs

1#[doc = "Register `RSTSET` writer"]
2pub type W = crate::W<RSTSET_SPEC>;
3#[doc = "Set Hibernate Wake-up Reset Status\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum HIBWK_A {
6    #[doc = "0: No effect"]
7    CONST_0 = 0,
8    #[doc = "1: Assert reset status bit"]
9    CONST_1 = 1,
10}
11impl From<HIBWK_A> for bool {
12    #[inline(always)]
13    fn from(variant: HIBWK_A) -> Self {
14        variant as u8 != 0
15    }
16}
17#[doc = "Field `HIBWK` writer - Set Hibernate Wake-up Reset Status"]
18pub type HIBWK_W<'a, REG> = crate::BitWriter<'a, REG, HIBWK_A>;
19impl<'a, REG> HIBWK_W<'a, REG>
20where
21    REG: crate::Writable + crate::RegisterSpec,
22{
23    #[doc = "No effect"]
24    #[inline(always)]
25    pub fn const_0(self) -> &'a mut crate::W<REG> {
26        self.variant(HIBWK_A::CONST_0)
27    }
28    #[doc = "Assert reset status bit"]
29    #[inline(always)]
30    pub fn const_1(self) -> &'a mut crate::W<REG> {
31        self.variant(HIBWK_A::CONST_1)
32    }
33}
34#[doc = "Set Hibernate Reset\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum HIBRS_A {
37    #[doc = "0: No effect"]
38    CONST_0 = 0,
39    #[doc = "1: Assert reset"]
40    CONST_1 = 1,
41}
42impl From<HIBRS_A> for bool {
43    #[inline(always)]
44    fn from(variant: HIBRS_A) -> Self {
45        variant as u8 != 0
46    }
47}
48#[doc = "Field `HIBRS` writer - Set Hibernate Reset"]
49pub type HIBRS_W<'a, REG> = crate::BitWriter<'a, REG, HIBRS_A>;
50impl<'a, REG> HIBRS_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    #[doc = "No effect"]
55    #[inline(always)]
56    pub fn const_0(self) -> &'a mut crate::W<REG> {
57        self.variant(HIBRS_A::CONST_0)
58    }
59    #[doc = "Assert reset"]
60    #[inline(always)]
61    pub fn const_1(self) -> &'a mut crate::W<REG> {
62        self.variant(HIBRS_A::CONST_1)
63    }
64}
65#[doc = "Enable Lockup Reset\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum LCKEN_A {
68    #[doc = "0: No effect"]
69    CONST_0 = 0,
70    #[doc = "1: Enable reset when Lockup gets asserted"]
71    CONST_1 = 1,
72}
73impl From<LCKEN_A> for bool {
74    #[inline(always)]
75    fn from(variant: LCKEN_A) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `LCKEN` writer - Enable Lockup Reset"]
80pub type LCKEN_W<'a, REG> = crate::BitWriter<'a, REG, LCKEN_A>;
81impl<'a, REG> LCKEN_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84{
85    #[doc = "No effect"]
86    #[inline(always)]
87    pub fn const_0(self) -> &'a mut crate::W<REG> {
88        self.variant(LCKEN_A::CONST_0)
89    }
90    #[doc = "Enable reset when Lockup gets asserted"]
91    #[inline(always)]
92    pub fn const_1(self) -> &'a mut crate::W<REG> {
93        self.variant(LCKEN_A::CONST_1)
94    }
95}
96#[doc = "ECAT0 Reset Status Information\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq, Eq)]
98pub enum ECAT0RS_A {
99    #[doc = "0: No effect"]
100    CONST_0 = 0,
101    #[doc = "1: Assert reset status bit"]
102    CONST_1 = 1,
103}
104impl From<ECAT0RS_A> for bool {
105    #[inline(always)]
106    fn from(variant: ECAT0RS_A) -> Self {
107        variant as u8 != 0
108    }
109}
110#[doc = "Field `ECAT0RS` writer - ECAT0 Reset Status Information"]
111pub type ECAT0RS_W<'a, REG> = crate::BitWriter<'a, REG, ECAT0RS_A>;
112impl<'a, REG> ECAT0RS_W<'a, REG>
113where
114    REG: crate::Writable + crate::RegisterSpec,
115{
116    #[doc = "No effect"]
117    #[inline(always)]
118    pub fn const_0(self) -> &'a mut crate::W<REG> {
119        self.variant(ECAT0RS_A::CONST_0)
120    }
121    #[doc = "Assert reset status bit"]
122    #[inline(always)]
123    pub fn const_1(self) -> &'a mut crate::W<REG> {
124        self.variant(ECAT0RS_A::CONST_1)
125    }
126}
127impl W {
128    #[doc = "Bit 8 - Set Hibernate Wake-up Reset Status"]
129    #[inline(always)]
130    pub fn hibwk(&mut self) -> HIBWK_W<RSTSET_SPEC> {
131        HIBWK_W::new(self, 8)
132    }
133    #[doc = "Bit 9 - Set Hibernate Reset"]
134    #[inline(always)]
135    pub fn hibrs(&mut self) -> HIBRS_W<RSTSET_SPEC> {
136        HIBRS_W::new(self, 9)
137    }
138    #[doc = "Bit 10 - Enable Lockup Reset"]
139    #[inline(always)]
140    pub fn lcken(&mut self) -> LCKEN_W<RSTSET_SPEC> {
141        LCKEN_W::new(self, 10)
142    }
143    #[doc = "Bit 12 - ECAT0 Reset Status Information"]
144    #[inline(always)]
145    pub fn ecat0rs(&mut self) -> ECAT0RS_W<RSTSET_SPEC> {
146        ECAT0RS_W::new(self, 12)
147    }
148}
149#[doc = "RCU Reset Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
150pub struct RSTSET_SPEC;
151impl crate::RegisterSpec for RSTSET_SPEC {
152    type Ux = u32;
153}
154#[doc = "`write(|w| ..)` method takes [`rstset::W`](W) writer structure"]
155impl crate::Writable for RSTSET_SPEC {
156    type Safety = crate::Unsafe;
157    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
158    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
159}
160#[doc = "`reset()` method sets RSTSET to value 0"]
161impl crate::Resettable for RSTSET_SPEC {
162    const RESET_VALUE: u32 = 0;
163}
xmc4300/scu_reset/rstset.rs

xmc4300/scu_reset/
rstset.rs
