xmc4300/scu_pll/
pllcon0.rs

1#[doc = "Register `PLLCON0` reader"]
2pub type R = crate::R<PLLCON0_SPEC>;
3#[doc = "Register `PLLCON0` writer"]
4pub type W = crate::W<PLLCON0_SPEC>;
5#[doc = "VCO Bypass\n\nValue on reset: 1"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum VCOBYP_A {
8    #[doc = "0: Normal operation, VCO is not bypassed"]
9    CONST_0 = 0,
10    #[doc = "1: Prescaler Mode, VCO is bypassed"]
11    CONST_1 = 1,
12}
13impl From<VCOBYP_A> for bool {
14    #[inline(always)]
15    fn from(variant: VCOBYP_A) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `VCOBYP` reader - VCO Bypass"]
20pub type VCOBYP_R = crate::BitReader<VCOBYP_A>;
21impl VCOBYP_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> VCOBYP_A {
25        match self.bits {
26            false => VCOBYP_A::CONST_0,
27            true => VCOBYP_A::CONST_1,
28        }
29    }
30    #[doc = "Normal operation, VCO is not bypassed"]
31    #[inline(always)]
32    pub fn is_const_0(&self) -> bool {
33        *self == VCOBYP_A::CONST_0
34    }
35    #[doc = "Prescaler Mode, VCO is bypassed"]
36    #[inline(always)]
37    pub fn is_const_1(&self) -> bool {
38        *self == VCOBYP_A::CONST_1
39    }
40}
41#[doc = "Field `VCOBYP` writer - VCO Bypass"]
42pub type VCOBYP_W<'a, REG> = crate::BitWriter<'a, REG, VCOBYP_A>;
43impl<'a, REG> VCOBYP_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Normal operation, VCO is not bypassed"]
48    #[inline(always)]
49    pub fn const_0(self) -> &'a mut crate::W<REG> {
50        self.variant(VCOBYP_A::CONST_0)
51    }
52    #[doc = "Prescaler Mode, VCO is bypassed"]
53    #[inline(always)]
54    pub fn const_1(self) -> &'a mut crate::W<REG> {
55        self.variant(VCOBYP_A::CONST_1)
56    }
57}
58#[doc = "VCO Power Saving Mode\n\nValue on reset: 1"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum VCOPWD_A {
61    #[doc = "0: Normal behavior"]
62    CONST_0 = 0,
63    #[doc = "1: The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."]
64    CONST_1 = 1,
65}
66impl From<VCOPWD_A> for bool {
67    #[inline(always)]
68    fn from(variant: VCOPWD_A) -> Self {
69        variant as u8 != 0
70    }
71}
72#[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"]
73pub type VCOPWD_R = crate::BitReader<VCOPWD_A>;
74impl VCOPWD_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> VCOPWD_A {
78        match self.bits {
79            false => VCOPWD_A::CONST_0,
80            true => VCOPWD_A::CONST_1,
81        }
82    }
83    #[doc = "Normal behavior"]
84    #[inline(always)]
85    pub fn is_const_0(&self) -> bool {
86        *self == VCOPWD_A::CONST_0
87    }
88    #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."]
89    #[inline(always)]
90    pub fn is_const_1(&self) -> bool {
91        *self == VCOPWD_A::CONST_1
92    }
93}
94#[doc = "Field `VCOPWD` writer - VCO Power Saving Mode"]
95pub type VCOPWD_W<'a, REG> = crate::BitWriter<'a, REG, VCOPWD_A>;
96impl<'a, REG> VCOPWD_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Normal behavior"]
101    #[inline(always)]
102    pub fn const_0(self) -> &'a mut crate::W<REG> {
103        self.variant(VCOPWD_A::CONST_0)
104    }
105    #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."]
106    #[inline(always)]
107    pub fn const_1(self) -> &'a mut crate::W<REG> {
108        self.variant(VCOPWD_A::CONST_1)
109    }
110}
111#[doc = "VCO Trim Control\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum VCOTR_A {
114    #[doc = "0: VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
115    CONST_0 = 0,
116    #[doc = "1: VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
117    CONST_1 = 1,
118}
119impl From<VCOTR_A> for bool {
120    #[inline(always)]
121    fn from(variant: VCOTR_A) -> Self {
122        variant as u8 != 0
123    }
124}
125#[doc = "Field `VCOTR` reader - VCO Trim Control"]
126pub type VCOTR_R = crate::BitReader<VCOTR_A>;
127impl VCOTR_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> VCOTR_A {
131        match self.bits {
132            false => VCOTR_A::CONST_0,
133            true => VCOTR_A::CONST_1,
134        }
135    }
136    #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
137    #[inline(always)]
138    pub fn is_const_0(&self) -> bool {
139        *self == VCOTR_A::CONST_0
140    }
141    #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
142    #[inline(always)]
143    pub fn is_const_1(&self) -> bool {
144        *self == VCOTR_A::CONST_1
145    }
146}
147#[doc = "Field `VCOTR` writer - VCO Trim Control"]
148pub type VCOTR_W<'a, REG> = crate::BitWriter<'a, REG, VCOTR_A>;
149impl<'a, REG> VCOTR_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
154    #[inline(always)]
155    pub fn const_0(self) -> &'a mut crate::W<REG> {
156        self.variant(VCOTR_A::CONST_0)
157    }
158    #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."]
159    #[inline(always)]
160    pub fn const_1(self) -> &'a mut crate::W<REG> {
161        self.variant(VCOTR_A::CONST_1)
162    }
163}
164#[doc = "Disconnect Oscillator from VCO\n\nValue on reset: 0"]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum FINDIS_A {
167    #[doc = "0: connect oscillator to the VCO part"]
168    CONST_0 = 0,
169    #[doc = "1: disconnect oscillator from the VCO part."]
170    CONST_1 = 1,
171}
172impl From<FINDIS_A> for bool {
173    #[inline(always)]
174    fn from(variant: FINDIS_A) -> Self {
175        variant as u8 != 0
176    }
177}
178#[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"]
179pub type FINDIS_R = crate::BitReader<FINDIS_A>;
180impl FINDIS_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> FINDIS_A {
184        match self.bits {
185            false => FINDIS_A::CONST_0,
186            true => FINDIS_A::CONST_1,
187        }
188    }
189    #[doc = "connect oscillator to the VCO part"]
190    #[inline(always)]
191    pub fn is_const_0(&self) -> bool {
192        *self == FINDIS_A::CONST_0
193    }
194    #[doc = "disconnect oscillator from the VCO part."]
195    #[inline(always)]
196    pub fn is_const_1(&self) -> bool {
197        *self == FINDIS_A::CONST_1
198    }
199}
200#[doc = "Field `FINDIS` writer - Disconnect Oscillator from VCO"]
201pub type FINDIS_W<'a, REG> = crate::BitWriter<'a, REG, FINDIS_A>;
202impl<'a, REG> FINDIS_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "connect oscillator to the VCO part"]
207    #[inline(always)]
208    pub fn const_0(self) -> &'a mut crate::W<REG> {
209        self.variant(FINDIS_A::CONST_0)
210    }
211    #[doc = "disconnect oscillator from the VCO part."]
212    #[inline(always)]
213    pub fn const_1(self) -> &'a mut crate::W<REG> {
214        self.variant(FINDIS_A::CONST_1)
215    }
216}
217#[doc = "Oscillator Disconnect Disable\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219pub enum OSCDISCDIS_A {
220    #[doc = "0: In case of a PLL loss-of-lock bit FINDIS is set"]
221    CONST_0 = 0,
222    #[doc = "1: In case of a PLL loss-of-lock bit FINDIS is cleared"]
223    CONST_1 = 1,
224}
225impl From<OSCDISCDIS_A> for bool {
226    #[inline(always)]
227    fn from(variant: OSCDISCDIS_A) -> Self {
228        variant as u8 != 0
229    }
230}
231#[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"]
232pub type OSCDISCDIS_R = crate::BitReader<OSCDISCDIS_A>;
233impl OSCDISCDIS_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub const fn variant(&self) -> OSCDISCDIS_A {
237        match self.bits {
238            false => OSCDISCDIS_A::CONST_0,
239            true => OSCDISCDIS_A::CONST_1,
240        }
241    }
242    #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"]
243    #[inline(always)]
244    pub fn is_const_0(&self) -> bool {
245        *self == OSCDISCDIS_A::CONST_0
246    }
247    #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"]
248    #[inline(always)]
249    pub fn is_const_1(&self) -> bool {
250        *self == OSCDISCDIS_A::CONST_1
251    }
252}
253#[doc = "Field `OSCDISCDIS` writer - Oscillator Disconnect Disable"]
254pub type OSCDISCDIS_W<'a, REG> = crate::BitWriter<'a, REG, OSCDISCDIS_A>;
255impl<'a, REG> OSCDISCDIS_W<'a, REG>
256where
257    REG: crate::Writable + crate::RegisterSpec,
258{
259    #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"]
260    #[inline(always)]
261    pub fn const_0(self) -> &'a mut crate::W<REG> {
262        self.variant(OSCDISCDIS_A::CONST_0)
263    }
264    #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"]
265    #[inline(always)]
266    pub fn const_1(self) -> &'a mut crate::W<REG> {
267        self.variant(OSCDISCDIS_A::CONST_1)
268    }
269}
270#[doc = "PLL Power Saving Mode\n\nValue on reset: 1"]
271#[derive(Clone, Copy, Debug, PartialEq, Eq)]
272pub enum PLLPWD_A {
273    #[doc = "0: Normal behavior"]
274    CONST_0 = 0,
275    #[doc = "1: The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."]
276    CONST_1 = 1,
277}
278impl From<PLLPWD_A> for bool {
279    #[inline(always)]
280    fn from(variant: PLLPWD_A) -> Self {
281        variant as u8 != 0
282    }
283}
284#[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"]
285pub type PLLPWD_R = crate::BitReader<PLLPWD_A>;
286impl PLLPWD_R {
287    #[doc = "Get enumerated values variant"]
288    #[inline(always)]
289    pub const fn variant(&self) -> PLLPWD_A {
290        match self.bits {
291            false => PLLPWD_A::CONST_0,
292            true => PLLPWD_A::CONST_1,
293        }
294    }
295    #[doc = "Normal behavior"]
296    #[inline(always)]
297    pub fn is_const_0(&self) -> bool {
298        *self == PLLPWD_A::CONST_0
299    }
300    #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."]
301    #[inline(always)]
302    pub fn is_const_1(&self) -> bool {
303        *self == PLLPWD_A::CONST_1
304    }
305}
306#[doc = "Field `PLLPWD` writer - PLL Power Saving Mode"]
307pub type PLLPWD_W<'a, REG> = crate::BitWriter<'a, REG, PLLPWD_A>;
308impl<'a, REG> PLLPWD_W<'a, REG>
309where
310    REG: crate::Writable + crate::RegisterSpec,
311{
312    #[doc = "Normal behavior"]
313    #[inline(always)]
314    pub fn const_0(self) -> &'a mut crate::W<REG> {
315        self.variant(PLLPWD_A::CONST_0)
316    }
317    #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."]
318    #[inline(always)]
319    pub fn const_1(self) -> &'a mut crate::W<REG> {
320        self.variant(PLLPWD_A::CONST_1)
321    }
322}
323#[doc = "Oscillator Watchdog Reset\n\nValue on reset: 1"]
324#[derive(Clone, Copy, Debug, PartialEq, Eq)]
325pub enum OSCRES_A {
326    #[doc = "0: The Oscillator Watchdog of the PLL is not reset and remains active"]
327    CONST_0 = 0,
328    #[doc = "1: The Oscillator Watchdog of the PLL is reset"]
329    CONST_1 = 1,
330}
331impl From<OSCRES_A> for bool {
332    #[inline(always)]
333    fn from(variant: OSCRES_A) -> Self {
334        variant as u8 != 0
335    }
336}
337#[doc = "Field `OSCRES` reader - Oscillator Watchdog Reset"]
338pub type OSCRES_R = crate::BitReader<OSCRES_A>;
339impl OSCRES_R {
340    #[doc = "Get enumerated values variant"]
341    #[inline(always)]
342    pub const fn variant(&self) -> OSCRES_A {
343        match self.bits {
344            false => OSCRES_A::CONST_0,
345            true => OSCRES_A::CONST_1,
346        }
347    }
348    #[doc = "The Oscillator Watchdog of the PLL is not reset and remains active"]
349    #[inline(always)]
350    pub fn is_const_0(&self) -> bool {
351        *self == OSCRES_A::CONST_0
352    }
353    #[doc = "The Oscillator Watchdog of the PLL is reset"]
354    #[inline(always)]
355    pub fn is_const_1(&self) -> bool {
356        *self == OSCRES_A::CONST_1
357    }
358}
359#[doc = "Field `OSCRES` writer - Oscillator Watchdog Reset"]
360pub type OSCRES_W<'a, REG> = crate::BitWriter<'a, REG, OSCRES_A>;
361impl<'a, REG> OSCRES_W<'a, REG>
362where
363    REG: crate::Writable + crate::RegisterSpec,
364{
365    #[doc = "The Oscillator Watchdog of the PLL is not reset and remains active"]
366    #[inline(always)]
367    pub fn const_0(self) -> &'a mut crate::W<REG> {
368        self.variant(OSCRES_A::CONST_0)
369    }
370    #[doc = "The Oscillator Watchdog of the PLL is reset"]
371    #[inline(always)]
372    pub fn const_1(self) -> &'a mut crate::W<REG> {
373        self.variant(OSCRES_A::CONST_1)
374    }
375}
376#[doc = "Field `RESLD` writer - Restart VCO Lock Detection"]
377pub type RESLD_W<'a, REG> = crate::BitWriter<'a, REG>;
378#[doc = "Automatic Oscillator Calibration Enable\n\nValue on reset: 0"]
379#[derive(Clone, Copy, Debug, PartialEq, Eq)]
380pub enum AOTREN_A {
381    #[doc = "0: Disable"]
382    CONST_0 = 0,
383    #[doc = "1: Enable"]
384    CONST_1 = 1,
385}
386impl From<AOTREN_A> for bool {
387    #[inline(always)]
388    fn from(variant: AOTREN_A) -> Self {
389        variant as u8 != 0
390    }
391}
392#[doc = "Field `AOTREN` reader - Automatic Oscillator Calibration Enable"]
393pub type AOTREN_R = crate::BitReader<AOTREN_A>;
394impl AOTREN_R {
395    #[doc = "Get enumerated values variant"]
396    #[inline(always)]
397    pub const fn variant(&self) -> AOTREN_A {
398        match self.bits {
399            false => AOTREN_A::CONST_0,
400            true => AOTREN_A::CONST_1,
401        }
402    }
403    #[doc = "Disable"]
404    #[inline(always)]
405    pub fn is_const_0(&self) -> bool {
406        *self == AOTREN_A::CONST_0
407    }
408    #[doc = "Enable"]
409    #[inline(always)]
410    pub fn is_const_1(&self) -> bool {
411        *self == AOTREN_A::CONST_1
412    }
413}
414#[doc = "Field `AOTREN` writer - Automatic Oscillator Calibration Enable"]
415pub type AOTREN_W<'a, REG> = crate::BitWriter<'a, REG, AOTREN_A>;
416impl<'a, REG> AOTREN_W<'a, REG>
417where
418    REG: crate::Writable + crate::RegisterSpec,
419{
420    #[doc = "Disable"]
421    #[inline(always)]
422    pub fn const_0(self) -> &'a mut crate::W<REG> {
423        self.variant(AOTREN_A::CONST_0)
424    }
425    #[doc = "Enable"]
426    #[inline(always)]
427    pub fn const_1(self) -> &'a mut crate::W<REG> {
428        self.variant(AOTREN_A::CONST_1)
429    }
430}
431#[doc = "Factory Oscillator Calibration\n\nValue on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433pub enum FOTR_A {
434    #[doc = "0: No effect"]
435    CONST_0 = 0,
436    #[doc = "1: Force fixed-value trimming"]
437    CONST_1 = 1,
438}
439impl From<FOTR_A> for bool {
440    #[inline(always)]
441    fn from(variant: FOTR_A) -> Self {
442        variant as u8 != 0
443    }
444}
445#[doc = "Field `FOTR` reader - Factory Oscillator Calibration"]
446pub type FOTR_R = crate::BitReader<FOTR_A>;
447impl FOTR_R {
448    #[doc = "Get enumerated values variant"]
449    #[inline(always)]
450    pub const fn variant(&self) -> FOTR_A {
451        match self.bits {
452            false => FOTR_A::CONST_0,
453            true => FOTR_A::CONST_1,
454        }
455    }
456    #[doc = "No effect"]
457    #[inline(always)]
458    pub fn is_const_0(&self) -> bool {
459        *self == FOTR_A::CONST_0
460    }
461    #[doc = "Force fixed-value trimming"]
462    #[inline(always)]
463    pub fn is_const_1(&self) -> bool {
464        *self == FOTR_A::CONST_1
465    }
466}
467#[doc = "Field `FOTR` writer - Factory Oscillator Calibration"]
468pub type FOTR_W<'a, REG> = crate::BitWriter<'a, REG, FOTR_A>;
469impl<'a, REG> FOTR_W<'a, REG>
470where
471    REG: crate::Writable + crate::RegisterSpec,
472{
473    #[doc = "No effect"]
474    #[inline(always)]
475    pub fn const_0(self) -> &'a mut crate::W<REG> {
476        self.variant(FOTR_A::CONST_0)
477    }
478    #[doc = "Force fixed-value trimming"]
479    #[inline(always)]
480    pub fn const_1(self) -> &'a mut crate::W<REG> {
481        self.variant(FOTR_A::CONST_1)
482    }
483}
484impl R {
485    #[doc = "Bit 0 - VCO Bypass"]
486    #[inline(always)]
487    pub fn vcobyp(&self) -> VCOBYP_R {
488        VCOBYP_R::new((self.bits & 1) != 0)
489    }
490    #[doc = "Bit 1 - VCO Power Saving Mode"]
491    #[inline(always)]
492    pub fn vcopwd(&self) -> VCOPWD_R {
493        VCOPWD_R::new(((self.bits >> 1) & 1) != 0)
494    }
495    #[doc = "Bit 2 - VCO Trim Control"]
496    #[inline(always)]
497    pub fn vcotr(&self) -> VCOTR_R {
498        VCOTR_R::new(((self.bits >> 2) & 1) != 0)
499    }
500    #[doc = "Bit 4 - Disconnect Oscillator from VCO"]
501    #[inline(always)]
502    pub fn findis(&self) -> FINDIS_R {
503        FINDIS_R::new(((self.bits >> 4) & 1) != 0)
504    }
505    #[doc = "Bit 6 - Oscillator Disconnect Disable"]
506    #[inline(always)]
507    pub fn oscdiscdis(&self) -> OSCDISCDIS_R {
508        OSCDISCDIS_R::new(((self.bits >> 6) & 1) != 0)
509    }
510    #[doc = "Bit 16 - PLL Power Saving Mode"]
511    #[inline(always)]
512    pub fn pllpwd(&self) -> PLLPWD_R {
513        PLLPWD_R::new(((self.bits >> 16) & 1) != 0)
514    }
515    #[doc = "Bit 17 - Oscillator Watchdog Reset"]
516    #[inline(always)]
517    pub fn oscres(&self) -> OSCRES_R {
518        OSCRES_R::new(((self.bits >> 17) & 1) != 0)
519    }
520    #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"]
521    #[inline(always)]
522    pub fn aotren(&self) -> AOTREN_R {
523        AOTREN_R::new(((self.bits >> 19) & 1) != 0)
524    }
525    #[doc = "Bit 20 - Factory Oscillator Calibration"]
526    #[inline(always)]
527    pub fn fotr(&self) -> FOTR_R {
528        FOTR_R::new(((self.bits >> 20) & 1) != 0)
529    }
530}
531impl W {
532    #[doc = "Bit 0 - VCO Bypass"]
533    #[inline(always)]
534    pub fn vcobyp(&mut self) -> VCOBYP_W<PLLCON0_SPEC> {
535        VCOBYP_W::new(self, 0)
536    }
537    #[doc = "Bit 1 - VCO Power Saving Mode"]
538    #[inline(always)]
539    pub fn vcopwd(&mut self) -> VCOPWD_W<PLLCON0_SPEC> {
540        VCOPWD_W::new(self, 1)
541    }
542    #[doc = "Bit 2 - VCO Trim Control"]
543    #[inline(always)]
544    pub fn vcotr(&mut self) -> VCOTR_W<PLLCON0_SPEC> {
545        VCOTR_W::new(self, 2)
546    }
547    #[doc = "Bit 4 - Disconnect Oscillator from VCO"]
548    #[inline(always)]
549    pub fn findis(&mut self) -> FINDIS_W<PLLCON0_SPEC> {
550        FINDIS_W::new(self, 4)
551    }
552    #[doc = "Bit 6 - Oscillator Disconnect Disable"]
553    #[inline(always)]
554    pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W<PLLCON0_SPEC> {
555        OSCDISCDIS_W::new(self, 6)
556    }
557    #[doc = "Bit 16 - PLL Power Saving Mode"]
558    #[inline(always)]
559    pub fn pllpwd(&mut self) -> PLLPWD_W<PLLCON0_SPEC> {
560        PLLPWD_W::new(self, 16)
561    }
562    #[doc = "Bit 17 - Oscillator Watchdog Reset"]
563    #[inline(always)]
564    pub fn oscres(&mut self) -> OSCRES_W<PLLCON0_SPEC> {
565        OSCRES_W::new(self, 17)
566    }
567    #[doc = "Bit 18 - Restart VCO Lock Detection"]
568    #[inline(always)]
569    pub fn resld(&mut self) -> RESLD_W<PLLCON0_SPEC> {
570        RESLD_W::new(self, 18)
571    }
572    #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"]
573    #[inline(always)]
574    pub fn aotren(&mut self) -> AOTREN_W<PLLCON0_SPEC> {
575        AOTREN_W::new(self, 19)
576    }
577    #[doc = "Bit 20 - Factory Oscillator Calibration"]
578    #[inline(always)]
579    pub fn fotr(&mut self) -> FOTR_W<PLLCON0_SPEC> {
580        FOTR_W::new(self, 20)
581    }
582}
583#[doc = "PLL Configuration 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pllcon0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pllcon0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
584pub struct PLLCON0_SPEC;
585impl crate::RegisterSpec for PLLCON0_SPEC {
586    type Ux = u32;
587}
588#[doc = "`read()` method returns [`pllcon0::R`](R) reader structure"]
589impl crate::Readable for PLLCON0_SPEC {}
590#[doc = "`write(|w| ..)` method takes [`pllcon0::W`](W) writer structure"]
591impl crate::Writable for PLLCON0_SPEC {
592    type Safety = crate::Unsafe;
593    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
594    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
595}
596#[doc = "`reset()` method sets PLLCON0 to value 0x0003_0003"]
597impl crate::Resettable for PLLCON0_SPEC {
598    const RESET_VALUE: u32 = 0x0003_0003;
599}
xmc4300/scu_pll/pllcon0.rs

xmc4300/scu_pll/
pllcon0.rs
