xmc4300/eth0/
mac_configuration.rs1#[doc = "Register `MAC_CONFIGURATION` reader"]
2pub type R = crate::R<MAC_CONFIGURATION_SPEC>;
3#[doc = "Register `MAC_CONFIGURATION` writer"]
4pub type W = crate::W<MAC_CONFIGURATION_SPEC>;
5#[doc = "Field `PRELEN` reader - Preamble Length for Transmit Frames"]
6pub type PRELEN_R = crate::FieldReader;
7#[doc = "Field `PRELEN` writer - Preamble Length for Transmit Frames"]
8pub type PRELEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `RE` reader - Receiver Enable"]
10pub type RE_R = crate::BitReader;
11#[doc = "Field `RE` writer - Receiver Enable"]
12pub type RE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TE` reader - Transmitter Enable"]
14pub type TE_R = crate::BitReader;
15#[doc = "Field `TE` writer - Transmitter Enable"]
16pub type TE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DC` reader - Deferral Check"]
18pub type DC_R = crate::BitReader;
19#[doc = "Field `DC` writer - Deferral Check"]
20pub type DC_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BL` reader - Back-Off Limit"]
22pub type BL_R = crate::FieldReader;
23#[doc = "Field `BL` writer - Back-Off Limit"]
24pub type BL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `ACS` reader - Automatic Pad or CRC Stripping"]
26pub type ACS_R = crate::BitReader;
27#[doc = "Field `ACS` writer - Automatic Pad or CRC Stripping"]
28pub type ACS_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `DR` reader - Disable Retry"]
30pub type DR_R = crate::BitReader;
31#[doc = "Field `DR` writer - Disable Retry"]
32pub type DR_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `IPC` reader - Checksum Offload"]
34pub type IPC_R = crate::BitReader;
35#[doc = "Field `IPC` writer - Checksum Offload"]
36pub type IPC_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `DM` reader - Duplex Mode"]
38pub type DM_R = crate::BitReader;
39#[doc = "Field `DM` writer - Duplex Mode"]
40pub type DM_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `LM` reader - Loopback Mode"]
42pub type LM_R = crate::BitReader;
43#[doc = "Field `LM` writer - Loopback Mode"]
44pub type LM_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `DO` reader - Disable Receive Own"]
46pub type DO_R = crate::BitReader;
47#[doc = "Field `DO` writer - Disable Receive Own"]
48pub type DO_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `FES` reader - Speed"]
50pub type FES_R = crate::BitReader;
51#[doc = "Field `FES` writer - Speed"]
52pub type FES_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `DCRS` reader - Disable Carrier Sense During Transmission"]
54pub type DCRS_R = crate::BitReader;
55#[doc = "Field `DCRS` writer - Disable Carrier Sense During Transmission"]
56pub type DCRS_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `IFG` reader - Inter-Frame Gap"]
58pub type IFG_R = crate::FieldReader;
59#[doc = "Field `IFG` writer - Inter-Frame Gap"]
60pub type IFG_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
61#[doc = "Field `JE` reader - Jumbo Frame Enable"]
62pub type JE_R = crate::BitReader;
63#[doc = "Field `JE` writer - Jumbo Frame Enable"]
64pub type JE_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `BE` reader - Frame Burst Enable"]
66pub type BE_R = crate::BitReader;
67#[doc = "Field `JD` reader - Jabber Disable"]
68pub type JD_R = crate::BitReader;
69#[doc = "Field `JD` writer - Jabber Disable"]
70pub type JD_W<'a, REG> = crate::BitWriter<'a, REG>;
71#[doc = "Field `WD` reader - Watchdog Disable"]
72pub type WD_R = crate::BitReader;
73#[doc = "Field `WD` writer - Watchdog Disable"]
74pub type WD_W<'a, REG> = crate::BitWriter<'a, REG>;
75#[doc = "Field `TC` reader - Transmit Configuration in RMII"]
76pub type TC_R = crate::BitReader;
77#[doc = "Field `CST` reader - CRC Stripping of Type Frames"]
78pub type CST_R = crate::BitReader;
79#[doc = "Field `CST` writer - CRC Stripping of Type Frames"]
80pub type CST_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `TWOKPE` reader - IEEE 802.3as support for 2K packets Enable"]
82pub type TWOKPE_R = crate::BitReader;
83#[doc = "Field `TWOKPE` writer - IEEE 802.3as support for 2K packets Enable"]
84pub type TWOKPE_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `SARC` reader - Source Address Insertion or Replacement Control"]
86pub type SARC_R = crate::FieldReader;
87impl R {
88 #[doc = "Bits 0:1 - Preamble Length for Transmit Frames"]
89 #[inline(always)]
90 pub fn prelen(&self) -> PRELEN_R {
91 PRELEN_R::new((self.bits & 3) as u8)
92 }
93 #[doc = "Bit 2 - Receiver Enable"]
94 #[inline(always)]
95 pub fn re(&self) -> RE_R {
96 RE_R::new(((self.bits >> 2) & 1) != 0)
97 }
98 #[doc = "Bit 3 - Transmitter Enable"]
99 #[inline(always)]
100 pub fn te(&self) -> TE_R {
101 TE_R::new(((self.bits >> 3) & 1) != 0)
102 }
103 #[doc = "Bit 4 - Deferral Check"]
104 #[inline(always)]
105 pub fn dc(&self) -> DC_R {
106 DC_R::new(((self.bits >> 4) & 1) != 0)
107 }
108 #[doc = "Bits 5:6 - Back-Off Limit"]
109 #[inline(always)]
110 pub fn bl(&self) -> BL_R {
111 BL_R::new(((self.bits >> 5) & 3) as u8)
112 }
113 #[doc = "Bit 7 - Automatic Pad or CRC Stripping"]
114 #[inline(always)]
115 pub fn acs(&self) -> ACS_R {
116 ACS_R::new(((self.bits >> 7) & 1) != 0)
117 }
118 #[doc = "Bit 9 - Disable Retry"]
119 #[inline(always)]
120 pub fn dr(&self) -> DR_R {
121 DR_R::new(((self.bits >> 9) & 1) != 0)
122 }
123 #[doc = "Bit 10 - Checksum Offload"]
124 #[inline(always)]
125 pub fn ipc(&self) -> IPC_R {
126 IPC_R::new(((self.bits >> 10) & 1) != 0)
127 }
128 #[doc = "Bit 11 - Duplex Mode"]
129 #[inline(always)]
130 pub fn dm(&self) -> DM_R {
131 DM_R::new(((self.bits >> 11) & 1) != 0)
132 }
133 #[doc = "Bit 12 - Loopback Mode"]
134 #[inline(always)]
135 pub fn lm(&self) -> LM_R {
136 LM_R::new(((self.bits >> 12) & 1) != 0)
137 }
138 #[doc = "Bit 13 - Disable Receive Own"]
139 #[inline(always)]
140 pub fn do_(&self) -> DO_R {
141 DO_R::new(((self.bits >> 13) & 1) != 0)
142 }
143 #[doc = "Bit 14 - Speed"]
144 #[inline(always)]
145 pub fn fes(&self) -> FES_R {
146 FES_R::new(((self.bits >> 14) & 1) != 0)
147 }
148 #[doc = "Bit 16 - Disable Carrier Sense During Transmission"]
149 #[inline(always)]
150 pub fn dcrs(&self) -> DCRS_R {
151 DCRS_R::new(((self.bits >> 16) & 1) != 0)
152 }
153 #[doc = "Bits 17:19 - Inter-Frame Gap"]
154 #[inline(always)]
155 pub fn ifg(&self) -> IFG_R {
156 IFG_R::new(((self.bits >> 17) & 7) as u8)
157 }
158 #[doc = "Bit 20 - Jumbo Frame Enable"]
159 #[inline(always)]
160 pub fn je(&self) -> JE_R {
161 JE_R::new(((self.bits >> 20) & 1) != 0)
162 }
163 #[doc = "Bit 21 - Frame Burst Enable"]
164 #[inline(always)]
165 pub fn be(&self) -> BE_R {
166 BE_R::new(((self.bits >> 21) & 1) != 0)
167 }
168 #[doc = "Bit 22 - Jabber Disable"]
169 #[inline(always)]
170 pub fn jd(&self) -> JD_R {
171 JD_R::new(((self.bits >> 22) & 1) != 0)
172 }
173 #[doc = "Bit 23 - Watchdog Disable"]
174 #[inline(always)]
175 pub fn wd(&self) -> WD_R {
176 WD_R::new(((self.bits >> 23) & 1) != 0)
177 }
178 #[doc = "Bit 24 - Transmit Configuration in RMII"]
179 #[inline(always)]
180 pub fn tc(&self) -> TC_R {
181 TC_R::new(((self.bits >> 24) & 1) != 0)
182 }
183 #[doc = "Bit 25 - CRC Stripping of Type Frames"]
184 #[inline(always)]
185 pub fn cst(&self) -> CST_R {
186 CST_R::new(((self.bits >> 25) & 1) != 0)
187 }
188 #[doc = "Bit 27 - IEEE 802.3as support for 2K packets Enable"]
189 #[inline(always)]
190 pub fn twokpe(&self) -> TWOKPE_R {
191 TWOKPE_R::new(((self.bits >> 27) & 1) != 0)
192 }
193 #[doc = "Bits 28:30 - Source Address Insertion or Replacement Control"]
194 #[inline(always)]
195 pub fn sarc(&self) -> SARC_R {
196 SARC_R::new(((self.bits >> 28) & 7) as u8)
197 }
198}
199impl W {
200 #[doc = "Bits 0:1 - Preamble Length for Transmit Frames"]
201 #[inline(always)]
202 pub fn prelen(&mut self) -> PRELEN_W<MAC_CONFIGURATION_SPEC> {
203 PRELEN_W::new(self, 0)
204 }
205 #[doc = "Bit 2 - Receiver Enable"]
206 #[inline(always)]
207 pub fn re(&mut self) -> RE_W<MAC_CONFIGURATION_SPEC> {
208 RE_W::new(self, 2)
209 }
210 #[doc = "Bit 3 - Transmitter Enable"]
211 #[inline(always)]
212 pub fn te(&mut self) -> TE_W<MAC_CONFIGURATION_SPEC> {
213 TE_W::new(self, 3)
214 }
215 #[doc = "Bit 4 - Deferral Check"]
216 #[inline(always)]
217 pub fn dc(&mut self) -> DC_W<MAC_CONFIGURATION_SPEC> {
218 DC_W::new(self, 4)
219 }
220 #[doc = "Bits 5:6 - Back-Off Limit"]
221 #[inline(always)]
222 pub fn bl(&mut self) -> BL_W<MAC_CONFIGURATION_SPEC> {
223 BL_W::new(self, 5)
224 }
225 #[doc = "Bit 7 - Automatic Pad or CRC Stripping"]
226 #[inline(always)]
227 pub fn acs(&mut self) -> ACS_W<MAC_CONFIGURATION_SPEC> {
228 ACS_W::new(self, 7)
229 }
230 #[doc = "Bit 9 - Disable Retry"]
231 #[inline(always)]
232 pub fn dr(&mut self) -> DR_W<MAC_CONFIGURATION_SPEC> {
233 DR_W::new(self, 9)
234 }
235 #[doc = "Bit 10 - Checksum Offload"]
236 #[inline(always)]
237 pub fn ipc(&mut self) -> IPC_W<MAC_CONFIGURATION_SPEC> {
238 IPC_W::new(self, 10)
239 }
240 #[doc = "Bit 11 - Duplex Mode"]
241 #[inline(always)]
242 pub fn dm(&mut self) -> DM_W<MAC_CONFIGURATION_SPEC> {
243 DM_W::new(self, 11)
244 }
245 #[doc = "Bit 12 - Loopback Mode"]
246 #[inline(always)]
247 pub fn lm(&mut self) -> LM_W<MAC_CONFIGURATION_SPEC> {
248 LM_W::new(self, 12)
249 }
250 #[doc = "Bit 13 - Disable Receive Own"]
251 #[inline(always)]
252 pub fn do_(&mut self) -> DO_W<MAC_CONFIGURATION_SPEC> {
253 DO_W::new(self, 13)
254 }
255 #[doc = "Bit 14 - Speed"]
256 #[inline(always)]
257 pub fn fes(&mut self) -> FES_W<MAC_CONFIGURATION_SPEC> {
258 FES_W::new(self, 14)
259 }
260 #[doc = "Bit 16 - Disable Carrier Sense During Transmission"]
261 #[inline(always)]
262 pub fn dcrs(&mut self) -> DCRS_W<MAC_CONFIGURATION_SPEC> {
263 DCRS_W::new(self, 16)
264 }
265 #[doc = "Bits 17:19 - Inter-Frame Gap"]
266 #[inline(always)]
267 pub fn ifg(&mut self) -> IFG_W<MAC_CONFIGURATION_SPEC> {
268 IFG_W::new(self, 17)
269 }
270 #[doc = "Bit 20 - Jumbo Frame Enable"]
271 #[inline(always)]
272 pub fn je(&mut self) -> JE_W<MAC_CONFIGURATION_SPEC> {
273 JE_W::new(self, 20)
274 }
275 #[doc = "Bit 22 - Jabber Disable"]
276 #[inline(always)]
277 pub fn jd(&mut self) -> JD_W<MAC_CONFIGURATION_SPEC> {
278 JD_W::new(self, 22)
279 }
280 #[doc = "Bit 23 - Watchdog Disable"]
281 #[inline(always)]
282 pub fn wd(&mut self) -> WD_W<MAC_CONFIGURATION_SPEC> {
283 WD_W::new(self, 23)
284 }
285 #[doc = "Bit 25 - CRC Stripping of Type Frames"]
286 #[inline(always)]
287 pub fn cst(&mut self) -> CST_W<MAC_CONFIGURATION_SPEC> {
288 CST_W::new(self, 25)
289 }
290 #[doc = "Bit 27 - IEEE 802.3as support for 2K packets Enable"]
291 #[inline(always)]
292 pub fn twokpe(&mut self) -> TWOKPE_W<MAC_CONFIGURATION_SPEC> {
293 TWOKPE_W::new(self, 27)
294 }
295}
296#[doc = "MAC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_configuration::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_configuration::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
297pub struct MAC_CONFIGURATION_SPEC;
298impl crate::RegisterSpec for MAC_CONFIGURATION_SPEC {
299 type Ux = u32;
300}
301#[doc = "`read()` method returns [`mac_configuration::R`](R) reader structure"]
302impl crate::Readable for MAC_CONFIGURATION_SPEC {}
303#[doc = "`write(|w| ..)` method takes [`mac_configuration::W`](W) writer structure"]
304impl crate::Writable for MAC_CONFIGURATION_SPEC {
305 type Safety = crate::Unsafe;
306 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
307 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
308}
309#[doc = "`reset()` method sets MAC_CONFIGURATION to value 0x8000"]
310impl crate::Resettable for MAC_CONFIGURATION_SPEC {
311 const RESET_VALUE: u32 = 0x8000;
312}