#![doc = "Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.37.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
#![allow(non_camel_case_types)]
#![allow(non_snake_case)]
#![no_std]
#![cfg_attr(docsrs, feature(doc_cfg))]
#[doc = r"Number available in the NVIC for configuring priority"]
pub const NVIC_PRIO_BITS: u8 = 6;
#[allow(unused_imports)]
use generic::*;
#[doc = r"Common register and bit access and modify traits"]
pub mod generic;
#[cfg(feature = "rt")]
extern "C" {
fn SCU_0();
fn ERU0_0();
fn ERU0_1();
fn ERU0_2();
fn ERU0_3();
fn ERU1_0();
fn ERU1_1();
fn ERU1_2();
fn ERU1_3();
fn PMU0_0();
fn VADC0_C0_0();
fn VADC0_C0_1();
fn VADC0_C0_2();
fn VADC0_C0_3();
fn VADC0_G0_0();
fn VADC0_G0_1();
fn VADC0_G0_2();
fn VADC0_G0_3();
fn VADC0_G1_0();
fn VADC0_G1_1();
fn VADC0_G1_2();
fn VADC0_G1_3();
fn DAC0_0();
fn DAC0_1();
fn CCU40_0();
fn CCU40_1();
fn CCU40_2();
fn CCU40_3();
fn CCU41_0();
fn CCU41_1();
fn CCU41_2();
fn CCU41_3();
fn CCU80_0();
fn CCU80_1();
fn CCU80_2();
fn CCU80_3();
fn POSIF0_0();
fn POSIF0_1();
fn HRPWM_0();
fn HRPWM_1();
fn HRPWM_2();
fn HRPWM_3();
fn CAN0_0();
fn CAN0_1();
fn CAN0_2();
fn CAN0_3();
fn CAN0_4();
fn CAN0_5();
fn CAN0_6();
fn CAN0_7();
fn USIC0_0();
fn USIC0_1();
fn USIC0_2();
fn USIC0_3();
fn USIC0_4();
fn USIC0_5();
fn USIC1_0();
fn USIC1_1();
fn USIC1_2();
fn USIC1_3();
fn USIC1_4();
fn USIC1_5();
fn LEDTS0_0();
fn FCE0_0();
fn GPDMA0_0();
fn USB0_0();
}
#[doc(hidden)]
#[repr(C)]
pub union Vector {
_handler: unsafe extern "C" fn(),
_reserved: u32,
}
#[cfg(feature = "rt")]
#[doc(hidden)]
#[link_section = ".vector_table.interrupts"]
#[no_mangle]
pub static __INTERRUPTS: [Vector; 108] = [
Vector { _handler: SCU_0 },
Vector { _handler: ERU0_0 },
Vector { _handler: ERU0_1 },
Vector { _handler: ERU0_2 },
Vector { _handler: ERU0_3 },
Vector { _handler: ERU1_0 },
Vector { _handler: ERU1_1 },
Vector { _handler: ERU1_2 },
Vector { _handler: ERU1_3 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: PMU0_0 },
Vector { _reserved: 0 },
Vector { _handler: VADC0_C0_0 },
Vector { _handler: VADC0_C0_1 },
Vector { _handler: VADC0_C0_2 },
Vector { _handler: VADC0_C0_3 },
Vector { _handler: VADC0_G0_0 },
Vector { _handler: VADC0_G0_1 },
Vector { _handler: VADC0_G0_2 },
Vector { _handler: VADC0_G0_3 },
Vector { _handler: VADC0_G1_0 },
Vector { _handler: VADC0_G1_1 },
Vector { _handler: VADC0_G1_2 },
Vector { _handler: VADC0_G1_3 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: DAC0_0 },
Vector { _handler: DAC0_1 },
Vector { _handler: CCU40_0 },
Vector { _handler: CCU40_1 },
Vector { _handler: CCU40_2 },
Vector { _handler: CCU40_3 },
Vector { _handler: CCU41_0 },
Vector { _handler: CCU41_1 },
Vector { _handler: CCU41_2 },
Vector { _handler: CCU41_3 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: CCU80_0 },
Vector { _handler: CCU80_1 },
Vector { _handler: CCU80_2 },
Vector { _handler: CCU80_3 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: POSIF0_0 },
Vector { _handler: POSIF0_1 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: HRPWM_0 },
Vector { _handler: HRPWM_1 },
Vector { _handler: HRPWM_2 },
Vector { _handler: HRPWM_3 },
Vector { _handler: CAN0_0 },
Vector { _handler: CAN0_1 },
Vector { _handler: CAN0_2 },
Vector { _handler: CAN0_3 },
Vector { _handler: CAN0_4 },
Vector { _handler: CAN0_5 },
Vector { _handler: CAN0_6 },
Vector { _handler: CAN0_7 },
Vector { _handler: USIC0_0 },
Vector { _handler: USIC0_1 },
Vector { _handler: USIC0_2 },
Vector { _handler: USIC0_3 },
Vector { _handler: USIC0_4 },
Vector { _handler: USIC0_5 },
Vector { _handler: USIC1_0 },
Vector { _handler: USIC1_1 },
Vector { _handler: USIC1_2 },
Vector { _handler: USIC1_3 },
Vector { _handler: USIC1_4 },
Vector { _handler: USIC1_5 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: LEDTS0_0 },
Vector { _reserved: 0 },
Vector { _handler: FCE0_0 },
Vector { _handler: GPDMA0_0 },
Vector { _reserved: 0 },
Vector { _handler: USB0_0 },
];
#[doc = r"Enumeration of all the interrupts."]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u16)]
pub enum Interrupt {
#[doc = "0 - System Control"]
SCU_0 = 0,
#[doc = "1 - External Request Unit 0"]
ERU0_0 = 1,
#[doc = "2 - External Request Unit 0"]
ERU0_1 = 2,
#[doc = "3 - External Request Unit 0"]
ERU0_2 = 3,
#[doc = "4 - External Request Unit 0"]
ERU0_3 = 4,
#[doc = "5 - External Request Unit 1"]
ERU1_0 = 5,
#[doc = "6 - External Request Unit 1"]
ERU1_1 = 6,
#[doc = "7 - External Request Unit 1"]
ERU1_2 = 7,
#[doc = "8 - External Request Unit 1"]
ERU1_3 = 8,
#[doc = "12 - Program Management Unit"]
PMU0_0 = 12,
#[doc = "14 - Analog to Digital Converter Common Block 0"]
VADC0_C0_0 = 14,
#[doc = "15 - Analog to Digital Converter Common Block 0"]
VADC0_C0_1 = 15,
#[doc = "16 - Analog to Digital Converter Common Block 0"]
VADC0_C0_2 = 16,
#[doc = "17 - Analog to Digital Converter Common Block 0"]
VADC0_C0_3 = 17,
#[doc = "18 - Analog to Digital Converter Group 0"]
VADC0_G0_0 = 18,
#[doc = "19 - Analog to Digital Converter Group 0"]
VADC0_G0_1 = 19,
#[doc = "20 - Analog to Digital Converter Group 0"]
VADC0_G0_2 = 20,
#[doc = "21 - Analog to Digital Converter Group 0"]
VADC0_G0_3 = 21,
#[doc = "22 - Analog to Digital Converter Group 1"]
VADC0_G1_0 = 22,
#[doc = "23 - Analog to Digital Converter Group 1"]
VADC0_G1_1 = 23,
#[doc = "24 - Analog to Digital Converter Group 1"]
VADC0_G1_2 = 24,
#[doc = "25 - Analog to Digital Converter Group 1"]
VADC0_G1_3 = 25,
#[doc = "42 - Digital to Analog Converter"]
DAC0_0 = 42,
#[doc = "43 - Digital to Analog Converter"]
DAC0_1 = 43,
#[doc = "44 - Capture Compare Unit 4 (Module 0)"]
CCU40_0 = 44,
#[doc = "45 - Capture Compare Unit 4 (Module 0)"]
CCU40_1 = 45,
#[doc = "46 - Capture Compare Unit 4 (Module 0)"]
CCU40_2 = 46,
#[doc = "47 - Capture Compare Unit 4 (Module 0)"]
CCU40_3 = 47,
#[doc = "48 - Capture Compare Unit 4 (Module 1)"]
CCU41_0 = 48,
#[doc = "49 - Capture Compare Unit 4 (Module 1)"]
CCU41_1 = 49,
#[doc = "50 - Capture Compare Unit 4 (Module 1)"]
CCU41_2 = 50,
#[doc = "51 - Capture Compare Unit 4 (Module 1)"]
CCU41_3 = 51,
#[doc = "60 - Capture Compare Unit 8 (Module 0)"]
CCU80_0 = 60,
#[doc = "61 - Capture Compare Unit 8 (Module 0)"]
CCU80_1 = 61,
#[doc = "62 - Capture Compare Unit 8 (Module 0)"]
CCU80_2 = 62,
#[doc = "63 - Capture Compare Unit 8 (Module 0)"]
CCU80_3 = 63,
#[doc = "68 - Position Interface (Module 0)"]
POSIF0_0 = 68,
#[doc = "69 - Position Interface (Module 0)"]
POSIF0_1 = 69,
#[doc = "72 - High Resolution Pulse Width Modulation (Module 0)"]
HRPWM_0 = 72,
#[doc = "73 - High Resolution Pulse Width Modulation (Module 0)"]
HRPWM_1 = 73,
#[doc = "74 - High Resolution Pulse Width Modulation (Module 0)"]
HRPWM_2 = 74,
#[doc = "75 - High Resolution Pulse Width Modulation (Module 0)"]
HRPWM_3 = 75,
#[doc = "76 - MultiCAN"]
CAN0_0 = 76,
#[doc = "77 - MultiCAN"]
CAN0_1 = 77,
#[doc = "78 - MultiCAN"]
CAN0_2 = 78,
#[doc = "79 - MultiCAN"]
CAN0_3 = 79,
#[doc = "80 - MultiCAN"]
CAN0_4 = 80,
#[doc = "81 - MultiCAN"]
CAN0_5 = 81,
#[doc = "82 - MultiCAN"]
CAN0_6 = 82,
#[doc = "83 - MultiCAN"]
CAN0_7 = 83,
#[doc = "84 - Universal Serial Interface Channel (Module 0)"]
USIC0_0 = 84,
#[doc = "85 - Universal Serial Interface Channel (Module 0)"]
USIC0_1 = 85,
#[doc = "86 - Universal Serial Interface Channel (Module 0)"]
USIC0_2 = 86,
#[doc = "87 - Universal Serial Interface Channel (Module 0)"]
USIC0_3 = 87,
#[doc = "88 - Universal Serial Interface Channel (Module 0)"]
USIC0_4 = 88,
#[doc = "89 - Universal Serial Interface Channel (Module 0)"]
USIC0_5 = 89,
#[doc = "90 - Universal Serial Interface Channel (Module 1)"]
USIC1_0 = 90,
#[doc = "91 - Universal Serial Interface Channel (Module 1)"]
USIC1_1 = 91,
#[doc = "92 - Universal Serial Interface Channel (Module 1)"]
USIC1_2 = 92,
#[doc = "93 - Universal Serial Interface Channel (Module 1)"]
USIC1_3 = 93,
#[doc = "94 - Universal Serial Interface Channel (Module 1)"]
USIC1_4 = 94,
#[doc = "95 - Universal Serial Interface Channel (Module 1)"]
USIC1_5 = 95,
#[doc = "102 - LED and Touch Sense Control Unit (Module 0)"]
LEDTS0_0 = 102,
#[doc = "104 - Flexible CRC Engine"]
FCE0_0 = 104,
#[doc = "105 - General Purpose DMA Unit 0"]
GPDMA0_0 = 105,
#[doc = "107 - Universal Serial Bus (Module 0)"]
USB0_0 = 107,
}
unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
#[inline(always)]
fn number(self) -> u16 {
self as u16
}
}
#[doc = "Cortex-M4 Private Peripheral Block"]
pub type PPB = crate::Periph<ppb::RegisterBlock, 0xe000_e000>;
impl core::fmt::Debug for PPB {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PPB").finish()
}
}
#[doc = "Cortex-M4 Private Peripheral Block"]
pub mod ppb;
#[doc = "DMA Line Router"]
pub type DLR = crate::Periph<dlr::RegisterBlock, 0x5000_4900>;
impl core::fmt::Debug for DLR {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("DLR").finish()
}
}
#[doc = "DMA Line Router"]
pub mod dlr;
#[doc = "Event Request Unit 0"]
pub type ERU0 = crate::Periph<eru0::RegisterBlock, 0x5000_4800>;
impl core::fmt::Debug for ERU0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("ERU0").finish()
}
}
#[doc = "Event Request Unit 0"]
pub mod eru0;
#[doc = "Event Request Unit 1"]
pub type ERU1 = crate::Periph<eru0::RegisterBlock, 0x4004_4000>;
impl core::fmt::Debug for ERU1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("ERU1").finish()
}
}
#[doc = "Event Request Unit 1"]
pub use self::eru0 as eru1;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0 = crate::Periph<gpdma0::RegisterBlock, 0x5001_42c0>;
impl core::fmt::Debug for GPDMA0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub mod gpdma0;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH0 = crate::Periph<gpdma0_ch0::RegisterBlock, 0x5001_4000>;
impl core::fmt::Debug for GPDMA0_CH0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH0").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub mod gpdma0_ch0;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH1 = crate::Periph<gpdma0_ch0::RegisterBlock, 0x5001_4058>;
impl core::fmt::Debug for GPDMA0_CH1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH1").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch0 as gpdma0_ch1;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH2 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_40b0>;
impl core::fmt::Debug for GPDMA0_CH2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH2").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub mod gpdma0_ch2;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH3 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_4108>;
impl core::fmt::Debug for GPDMA0_CH3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH3").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch2 as gpdma0_ch3;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH4 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_4160>;
impl core::fmt::Debug for GPDMA0_CH4 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH4").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch2 as gpdma0_ch4;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH5 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_41b8>;
impl core::fmt::Debug for GPDMA0_CH5 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH5").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch2 as gpdma0_ch5;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH6 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_4210>;
impl core::fmt::Debug for GPDMA0_CH6 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH6").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch2 as gpdma0_ch6;
#[doc = "General Purpose DMA Unit 0"]
pub type GPDMA0_CH7 = crate::Periph<gpdma0_ch2::RegisterBlock, 0x5001_4268>;
impl core::fmt::Debug for GPDMA0_CH7 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPDMA0_CH7").finish()
}
}
#[doc = "General Purpose DMA Unit 0"]
pub use self::gpdma0_ch2 as gpdma0_ch7;
#[doc = "Flexible CRC Engine"]
pub type FCE = crate::Periph<fce::RegisterBlock, 0x5002_0000>;
impl core::fmt::Debug for FCE {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FCE").finish()
}
}
#[doc = "Flexible CRC Engine"]
pub mod fce;
#[doc = "Flexible CRC Engine"]
pub type FCE_KE0 = crate::Periph<fce_ke0::RegisterBlock, 0x5002_0020>;
impl core::fmt::Debug for FCE_KE0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FCE_KE0").finish()
}
}
#[doc = "Flexible CRC Engine"]
pub mod fce_ke0;
#[doc = "Flexible CRC Engine"]
pub type FCE_KE1 = crate::Periph<fce_ke0::RegisterBlock, 0x5002_0040>;
impl core::fmt::Debug for FCE_KE1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FCE_KE1").finish()
}
}
#[doc = "Flexible CRC Engine"]
pub use self::fce_ke0 as fce_ke1;
#[doc = "Flexible CRC Engine"]
pub type FCE_KE2 = crate::Periph<fce_ke0::RegisterBlock, 0x5002_0060>;
impl core::fmt::Debug for FCE_KE2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FCE_KE2").finish()
}
}
#[doc = "Flexible CRC Engine"]
pub use self::fce_ke0 as fce_ke2;
#[doc = "Flexible CRC Engine"]
pub type FCE_KE3 = crate::Periph<fce_ke0::RegisterBlock, 0x5002_0080>;
impl core::fmt::Debug for FCE_KE3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FCE_KE3").finish()
}
}
#[doc = "Flexible CRC Engine"]
pub use self::fce_ke0 as fce_ke3;
#[doc = "Peripheral Bridge AHB 0"]
pub type PBA0 = crate::Periph<pba0::RegisterBlock, 0x4000_0000>;
impl core::fmt::Debug for PBA0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PBA0").finish()
}
}
#[doc = "Peripheral Bridge AHB 0"]
pub mod pba0;
#[doc = "Peripheral Bridge AHB 1"]
pub type PBA1 = crate::Periph<pba0::RegisterBlock, 0x4800_0000>;
impl core::fmt::Debug for PBA1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PBA1").finish()
}
}
#[doc = "Peripheral Bridge AHB 1"]
pub use self::pba0 as pba1;
#[doc = "Flash Memory Controller"]
pub type FLASH0 = crate::Periph<flash0::RegisterBlock, 0x5800_1000>;
impl core::fmt::Debug for FLASH0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("FLASH0").finish()
}
}
#[doc = "Flash Memory Controller"]
pub mod flash0;
#[doc = "Prefetch Unit"]
pub type PREF = crate::Periph<pref::RegisterBlock, 0x5800_4000>;
impl core::fmt::Debug for PREF {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PREF").finish()
}
}
#[doc = "Prefetch Unit"]
pub mod pref;
#[doc = "Program Management Unit"]
pub type PMU0 = crate::Periph<pmu0::RegisterBlock, 0x5800_0508>;
impl core::fmt::Debug for PMU0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PMU0").finish()
}
}
#[doc = "Program Management Unit"]
pub mod pmu0;
#[doc = "Watch Dog Timer"]
pub type WDT = crate::Periph<wdt::RegisterBlock, 0x5000_8000>;
impl core::fmt::Debug for WDT {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("WDT").finish()
}
}
#[doc = "Watch Dog Timer"]
pub mod wdt;
#[doc = "Real Time Clock"]
pub type RTC = crate::Periph<rtc::RegisterBlock, 0x5000_4a00>;
impl core::fmt::Debug for RTC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RTC").finish()
}
}
#[doc = "Real Time Clock"]
pub mod rtc;
#[doc = "System Control Unit"]
pub type SCU_CLK = crate::Periph<scu_clk::RegisterBlock, 0x5000_4600>;
impl core::fmt::Debug for SCU_CLK {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_CLK").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_clk;
#[doc = "System Control Unit"]
pub type SCU_OSC = crate::Periph<scu_osc::RegisterBlock, 0x5000_4700>;
impl core::fmt::Debug for SCU_OSC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_OSC").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_osc;
#[doc = "System Control Unit"]
pub type SCU_PLL = crate::Periph<scu_pll::RegisterBlock, 0x5000_4710>;
impl core::fmt::Debug for SCU_PLL {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_PLL").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_pll;
#[doc = "System Control Unit"]
pub type SCU_GENERAL = crate::Periph<scu_general::RegisterBlock, 0x5000_4000>;
impl core::fmt::Debug for SCU_GENERAL {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_GENERAL").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_general;
#[doc = "System Control Unit"]
pub type SCU_INTERRUPT = crate::Periph<scu_interrupt::RegisterBlock, 0x5000_4074>;
impl core::fmt::Debug for SCU_INTERRUPT {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_INTERRUPT").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_interrupt;
#[doc = "System Control Unit"]
pub type SCU_PARITY = crate::Periph<scu_parity::RegisterBlock, 0x5000_413c>;
impl core::fmt::Debug for SCU_PARITY {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_PARITY").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_parity;
#[doc = "System Control Unit"]
pub type SCU_TRAP = crate::Periph<scu_trap::RegisterBlock, 0x5000_4160>;
impl core::fmt::Debug for SCU_TRAP {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_TRAP").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_trap;
#[doc = "System Control Unit"]
pub type SCU_HIBERNATE = crate::Periph<scu_hibernate::RegisterBlock, 0x5000_4300>;
impl core::fmt::Debug for SCU_HIBERNATE {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_HIBERNATE").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_hibernate;
#[doc = "System Control Unit"]
pub type SCU_POWER = crate::Periph<scu_power::RegisterBlock, 0x5000_4200>;
impl core::fmt::Debug for SCU_POWER {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_POWER").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_power;
#[doc = "System Control Unit"]
pub type SCU_RESET = crate::Periph<scu_reset::RegisterBlock, 0x5000_4400>;
impl core::fmt::Debug for SCU_RESET {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SCU_RESET").finish()
}
}
#[doc = "System Control Unit"]
pub mod scu_reset;
#[doc = "LED and Touch Sense Unit 0"]
pub type LEDTS0 = crate::Periph<ledts0::RegisterBlock, 0x4801_0000>;
impl core::fmt::Debug for LEDTS0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("LEDTS0").finish()
}
}
#[doc = "LED and Touch Sense Unit 0"]
pub mod ledts0;
#[doc = "Universal Serial Bus"]
pub type USB0 = crate::Periph<usb0::RegisterBlock, 0x5004_0000>;
impl core::fmt::Debug for USB0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0").finish()
}
}
#[doc = "Universal Serial Bus"]
pub mod usb0;
#[doc = "Universal Serial Bus"]
pub type USB0_EP0 = crate::Periph<usb0_ep0::RegisterBlock, 0x5004_0900>;
impl core::fmt::Debug for USB0_EP0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP0").finish()
}
}
#[doc = "Universal Serial Bus"]
pub mod usb0_ep0;
#[doc = "Universal Serial Bus"]
pub type USB0_EP1 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_0920>;
impl core::fmt::Debug for USB0_EP1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP1").finish()
}
}
#[doc = "Universal Serial Bus"]
pub mod usb0_ep1;
#[doc = "Universal Serial Bus"]
pub type USB0_EP2 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_0940>;
impl core::fmt::Debug for USB0_EP2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP2").finish()
}
}
#[doc = "Universal Serial Bus"]
pub use self::usb0_ep1 as usb0_ep2;
#[doc = "Universal Serial Bus"]
pub type USB0_EP3 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_0960>;
impl core::fmt::Debug for USB0_EP3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP3").finish()
}
}
#[doc = "Universal Serial Bus"]
pub use self::usb0_ep1 as usb0_ep3;
#[doc = "Universal Serial Bus"]
pub type USB0_EP4 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_0980>;
impl core::fmt::Debug for USB0_EP4 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP4").finish()
}
}
#[doc = "Universal Serial Bus"]
pub use self::usb0_ep1 as usb0_ep4;
#[doc = "Universal Serial Bus"]
pub type USB0_EP5 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_09a0>;
impl core::fmt::Debug for USB0_EP5 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP5").finish()
}
}
#[doc = "Universal Serial Bus"]
pub use self::usb0_ep1 as usb0_ep5;
#[doc = "Universal Serial Bus"]
pub type USB0_EP6 = crate::Periph<usb0_ep1::RegisterBlock, 0x5004_09c0>;
impl core::fmt::Debug for USB0_EP6 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0_EP6").finish()
}
}
#[doc = "Universal Serial Bus"]
pub use self::usb0_ep1 as usb0_ep6;
#[doc = "Universal Serial Interface Controller 0"]
pub type USIC0 = crate::Periph<usic0::RegisterBlock, 0x4003_0008>;
impl core::fmt::Debug for USIC0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC0").finish()
}
}
#[doc = "Universal Serial Interface Controller 0"]
pub mod usic0;
#[doc = "Universal Serial Interface Controller 1"]
pub type USIC1 = crate::Periph<usic0::RegisterBlock, 0x4802_0008>;
impl core::fmt::Debug for USIC1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC1").finish()
}
}
#[doc = "Universal Serial Interface Controller 1"]
pub use self::usic0 as usic1;
#[doc = "Universal Serial Interface Controller 0"]
pub type USIC0_CH0 = crate::Periph<usic0_ch0::RegisterBlock, 0x4003_0000>;
impl core::fmt::Debug for USIC0_CH0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC0_CH0").finish()
}
}
#[doc = "Universal Serial Interface Controller 0"]
pub mod usic0_ch0;
#[doc = "Universal Serial Interface Controller 0"]
pub type USIC0_CH1 = crate::Periph<usic0_ch0::RegisterBlock, 0x4003_0200>;
impl core::fmt::Debug for USIC0_CH1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC0_CH1").finish()
}
}
#[doc = "Universal Serial Interface Controller 0"]
pub use self::usic0_ch0 as usic0_ch1;
#[doc = "Universal Serial Interface Controller 1"]
pub type USIC1_CH0 = crate::Periph<usic0_ch0::RegisterBlock, 0x4802_0000>;
impl core::fmt::Debug for USIC1_CH0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC1_CH0").finish()
}
}
#[doc = "Universal Serial Interface Controller 1"]
pub use self::usic0_ch0 as usic1_ch0;
#[doc = "Universal Serial Interface Controller 1"]
pub type USIC1_CH1 = crate::Periph<usic0_ch0::RegisterBlock, 0x4802_0200>;
impl core::fmt::Debug for USIC1_CH1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USIC1_CH1").finish()
}
}
#[doc = "Universal Serial Interface Controller 1"]
pub use self::usic0_ch0 as usic1_ch1;
#[doc = "Controller Area Networks"]
pub type CAN = crate::Periph<can::RegisterBlock, 0x4801_4000>;
impl core::fmt::Debug for CAN {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN").finish()
}
}
#[doc = "Controller Area Networks"]
pub mod can;
#[doc = "Controller Area Networks"]
pub type CAN_NODE0 = crate::Periph<can_node0::RegisterBlock, 0x4801_4200>;
impl core::fmt::Debug for CAN_NODE0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_NODE0").finish()
}
}
#[doc = "Controller Area Networks"]
pub mod can_node0;
#[doc = "Controller Area Networks"]
pub type CAN_NODE1 = crate::Periph<can_node0::RegisterBlock, 0x4801_4300>;
impl core::fmt::Debug for CAN_NODE1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_NODE1").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_node0 as can_node1;
#[doc = "Controller Area Networks"]
pub type CAN_MO0 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5000>;
impl core::fmt::Debug for CAN_MO0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO0").finish()
}
}
#[doc = "Controller Area Networks"]
pub mod can_mo0;
#[doc = "Controller Area Networks"]
pub type CAN_MO1 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5020>;
impl core::fmt::Debug for CAN_MO1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO1").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo1;
#[doc = "Controller Area Networks"]
pub type CAN_MO2 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5040>;
impl core::fmt::Debug for CAN_MO2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO2").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo2;
#[doc = "Controller Area Networks"]
pub type CAN_MO3 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5060>;
impl core::fmt::Debug for CAN_MO3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO3").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo3;
#[doc = "Controller Area Networks"]
pub type CAN_MO4 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5080>;
impl core::fmt::Debug for CAN_MO4 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO4").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo4;
#[doc = "Controller Area Networks"]
pub type CAN_MO5 = crate::Periph<can_mo0::RegisterBlock, 0x4801_50a0>;
impl core::fmt::Debug for CAN_MO5 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO5").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo5;
#[doc = "Controller Area Networks"]
pub type CAN_MO6 = crate::Periph<can_mo0::RegisterBlock, 0x4801_50c0>;
impl core::fmt::Debug for CAN_MO6 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO6").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo6;
#[doc = "Controller Area Networks"]
pub type CAN_MO7 = crate::Periph<can_mo0::RegisterBlock, 0x4801_50e0>;
impl core::fmt::Debug for CAN_MO7 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO7").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo7;
#[doc = "Controller Area Networks"]
pub type CAN_MO8 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5100>;
impl core::fmt::Debug for CAN_MO8 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO8").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo8;
#[doc = "Controller Area Networks"]
pub type CAN_MO9 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5120>;
impl core::fmt::Debug for CAN_MO9 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO9").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo9;
#[doc = "Controller Area Networks"]
pub type CAN_MO10 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5140>;
impl core::fmt::Debug for CAN_MO10 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO10").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo10;
#[doc = "Controller Area Networks"]
pub type CAN_MO11 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5160>;
impl core::fmt::Debug for CAN_MO11 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO11").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo11;
#[doc = "Controller Area Networks"]
pub type CAN_MO12 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5180>;
impl core::fmt::Debug for CAN_MO12 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO12").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo12;
#[doc = "Controller Area Networks"]
pub type CAN_MO13 = crate::Periph<can_mo0::RegisterBlock, 0x4801_51a0>;
impl core::fmt::Debug for CAN_MO13 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO13").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo13;
#[doc = "Controller Area Networks"]
pub type CAN_MO14 = crate::Periph<can_mo0::RegisterBlock, 0x4801_51c0>;
impl core::fmt::Debug for CAN_MO14 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO14").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo14;
#[doc = "Controller Area Networks"]
pub type CAN_MO15 = crate::Periph<can_mo0::RegisterBlock, 0x4801_51e0>;
impl core::fmt::Debug for CAN_MO15 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO15").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo15;
#[doc = "Controller Area Networks"]
pub type CAN_MO16 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5200>;
impl core::fmt::Debug for CAN_MO16 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO16").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo16;
#[doc = "Controller Area Networks"]
pub type CAN_MO17 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5220>;
impl core::fmt::Debug for CAN_MO17 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO17").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo17;
#[doc = "Controller Area Networks"]
pub type CAN_MO18 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5240>;
impl core::fmt::Debug for CAN_MO18 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO18").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo18;
#[doc = "Controller Area Networks"]
pub type CAN_MO19 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5260>;
impl core::fmt::Debug for CAN_MO19 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO19").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo19;
#[doc = "Controller Area Networks"]
pub type CAN_MO20 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5280>;
impl core::fmt::Debug for CAN_MO20 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO20").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo20;
#[doc = "Controller Area Networks"]
pub type CAN_MO21 = crate::Periph<can_mo0::RegisterBlock, 0x4801_52a0>;
impl core::fmt::Debug for CAN_MO21 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO21").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo21;
#[doc = "Controller Area Networks"]
pub type CAN_MO22 = crate::Periph<can_mo0::RegisterBlock, 0x4801_52c0>;
impl core::fmt::Debug for CAN_MO22 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO22").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo22;
#[doc = "Controller Area Networks"]
pub type CAN_MO23 = crate::Periph<can_mo0::RegisterBlock, 0x4801_52e0>;
impl core::fmt::Debug for CAN_MO23 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO23").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo23;
#[doc = "Controller Area Networks"]
pub type CAN_MO24 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5300>;
impl core::fmt::Debug for CAN_MO24 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO24").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo24;
#[doc = "Controller Area Networks"]
pub type CAN_MO25 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5320>;
impl core::fmt::Debug for CAN_MO25 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO25").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo25;
#[doc = "Controller Area Networks"]
pub type CAN_MO26 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5340>;
impl core::fmt::Debug for CAN_MO26 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO26").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo26;
#[doc = "Controller Area Networks"]
pub type CAN_MO27 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5360>;
impl core::fmt::Debug for CAN_MO27 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO27").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo27;
#[doc = "Controller Area Networks"]
pub type CAN_MO28 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5380>;
impl core::fmt::Debug for CAN_MO28 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO28").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo28;
#[doc = "Controller Area Networks"]
pub type CAN_MO29 = crate::Periph<can_mo0::RegisterBlock, 0x4801_53a0>;
impl core::fmt::Debug for CAN_MO29 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO29").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo29;
#[doc = "Controller Area Networks"]
pub type CAN_MO30 = crate::Periph<can_mo0::RegisterBlock, 0x4801_53c0>;
impl core::fmt::Debug for CAN_MO30 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO30").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo30;
#[doc = "Controller Area Networks"]
pub type CAN_MO31 = crate::Periph<can_mo0::RegisterBlock, 0x4801_53e0>;
impl core::fmt::Debug for CAN_MO31 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO31").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo31;
#[doc = "Controller Area Networks"]
pub type CAN_MO32 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5400>;
impl core::fmt::Debug for CAN_MO32 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO32").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo32;
#[doc = "Controller Area Networks"]
pub type CAN_MO33 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5420>;
impl core::fmt::Debug for CAN_MO33 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO33").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo33;
#[doc = "Controller Area Networks"]
pub type CAN_MO34 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5440>;
impl core::fmt::Debug for CAN_MO34 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO34").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo34;
#[doc = "Controller Area Networks"]
pub type CAN_MO35 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5460>;
impl core::fmt::Debug for CAN_MO35 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO35").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo35;
#[doc = "Controller Area Networks"]
pub type CAN_MO36 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5480>;
impl core::fmt::Debug for CAN_MO36 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO36").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo36;
#[doc = "Controller Area Networks"]
pub type CAN_MO37 = crate::Periph<can_mo0::RegisterBlock, 0x4801_54a0>;
impl core::fmt::Debug for CAN_MO37 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO37").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo37;
#[doc = "Controller Area Networks"]
pub type CAN_MO38 = crate::Periph<can_mo0::RegisterBlock, 0x4801_54c0>;
impl core::fmt::Debug for CAN_MO38 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO38").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo38;
#[doc = "Controller Area Networks"]
pub type CAN_MO39 = crate::Periph<can_mo0::RegisterBlock, 0x4801_54e0>;
impl core::fmt::Debug for CAN_MO39 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO39").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo39;
#[doc = "Controller Area Networks"]
pub type CAN_MO40 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5500>;
impl core::fmt::Debug for CAN_MO40 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO40").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo40;
#[doc = "Controller Area Networks"]
pub type CAN_MO41 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5520>;
impl core::fmt::Debug for CAN_MO41 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO41").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo41;
#[doc = "Controller Area Networks"]
pub type CAN_MO42 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5540>;
impl core::fmt::Debug for CAN_MO42 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO42").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo42;
#[doc = "Controller Area Networks"]
pub type CAN_MO43 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5560>;
impl core::fmt::Debug for CAN_MO43 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO43").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo43;
#[doc = "Controller Area Networks"]
pub type CAN_MO44 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5580>;
impl core::fmt::Debug for CAN_MO44 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO44").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo44;
#[doc = "Controller Area Networks"]
pub type CAN_MO45 = crate::Periph<can_mo0::RegisterBlock, 0x4801_55a0>;
impl core::fmt::Debug for CAN_MO45 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO45").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo45;
#[doc = "Controller Area Networks"]
pub type CAN_MO46 = crate::Periph<can_mo0::RegisterBlock, 0x4801_55c0>;
impl core::fmt::Debug for CAN_MO46 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO46").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo46;
#[doc = "Controller Area Networks"]
pub type CAN_MO47 = crate::Periph<can_mo0::RegisterBlock, 0x4801_55e0>;
impl core::fmt::Debug for CAN_MO47 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO47").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo47;
#[doc = "Controller Area Networks"]
pub type CAN_MO48 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5600>;
impl core::fmt::Debug for CAN_MO48 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO48").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo48;
#[doc = "Controller Area Networks"]
pub type CAN_MO49 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5620>;
impl core::fmt::Debug for CAN_MO49 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO49").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo49;
#[doc = "Controller Area Networks"]
pub type CAN_MO50 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5640>;
impl core::fmt::Debug for CAN_MO50 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO50").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo50;
#[doc = "Controller Area Networks"]
pub type CAN_MO51 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5660>;
impl core::fmt::Debug for CAN_MO51 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO51").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo51;
#[doc = "Controller Area Networks"]
pub type CAN_MO52 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5680>;
impl core::fmt::Debug for CAN_MO52 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO52").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo52;
#[doc = "Controller Area Networks"]
pub type CAN_MO53 = crate::Periph<can_mo0::RegisterBlock, 0x4801_56a0>;
impl core::fmt::Debug for CAN_MO53 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO53").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo53;
#[doc = "Controller Area Networks"]
pub type CAN_MO54 = crate::Periph<can_mo0::RegisterBlock, 0x4801_56c0>;
impl core::fmt::Debug for CAN_MO54 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO54").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo54;
#[doc = "Controller Area Networks"]
pub type CAN_MO55 = crate::Periph<can_mo0::RegisterBlock, 0x4801_56e0>;
impl core::fmt::Debug for CAN_MO55 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO55").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo55;
#[doc = "Controller Area Networks"]
pub type CAN_MO56 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5700>;
impl core::fmt::Debug for CAN_MO56 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO56").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo56;
#[doc = "Controller Area Networks"]
pub type CAN_MO57 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5720>;
impl core::fmt::Debug for CAN_MO57 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO57").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo57;
#[doc = "Controller Area Networks"]
pub type CAN_MO58 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5740>;
impl core::fmt::Debug for CAN_MO58 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO58").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo58;
#[doc = "Controller Area Networks"]
pub type CAN_MO59 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5760>;
impl core::fmt::Debug for CAN_MO59 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO59").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo59;
#[doc = "Controller Area Networks"]
pub type CAN_MO60 = crate::Periph<can_mo0::RegisterBlock, 0x4801_5780>;
impl core::fmt::Debug for CAN_MO60 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO60").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo60;
#[doc = "Controller Area Networks"]
pub type CAN_MO61 = crate::Periph<can_mo0::RegisterBlock, 0x4801_57a0>;
impl core::fmt::Debug for CAN_MO61 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO61").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo61;
#[doc = "Controller Area Networks"]
pub type CAN_MO62 = crate::Periph<can_mo0::RegisterBlock, 0x4801_57c0>;
impl core::fmt::Debug for CAN_MO62 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO62").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo62;
#[doc = "Controller Area Networks"]
pub type CAN_MO63 = crate::Periph<can_mo0::RegisterBlock, 0x4801_57e0>;
impl core::fmt::Debug for CAN_MO63 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CAN_MO63").finish()
}
}
#[doc = "Controller Area Networks"]
pub use self::can_mo0 as can_mo63;
#[doc = "Analog to Digital Converter"]
pub type VADC = crate::Periph<vadc::RegisterBlock, 0x4000_4000>;
impl core::fmt::Debug for VADC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("VADC").finish()
}
}
#[doc = "Analog to Digital Converter"]
pub mod vadc;
#[doc = "Analog to Digital Converter"]
pub type VADC_G0 = crate::Periph<vadc_g0::RegisterBlock, 0x4000_4400>;
impl core::fmt::Debug for VADC_G0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("VADC_G0").finish()
}
}
#[doc = "Analog to Digital Converter"]
pub mod vadc_g0;
#[doc = "Analog to Digital Converter"]
pub type VADC_G1 = crate::Periph<vadc_g0::RegisterBlock, 0x4000_4800>;
impl core::fmt::Debug for VADC_G1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("VADC_G1").finish()
}
}
#[doc = "Analog to Digital Converter"]
pub use self::vadc_g0 as vadc_g1;
#[doc = "Digital to Analog Converter"]
pub type DAC = crate::Periph<dac::RegisterBlock, 0x4801_8000>;
impl core::fmt::Debug for DAC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("DAC").finish()
}
}
#[doc = "Digital to Analog Converter"]
pub mod dac;
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub type CCU40 = crate::Periph<ccu40::RegisterBlock, 0x4000_c000>;
impl core::fmt::Debug for CCU40 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU40").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub mod ccu40;
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub type CCU41 = crate::Periph<ccu40::RegisterBlock, 0x4001_0000>;
impl core::fmt::Debug for CCU41 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU41").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub use self::ccu40 as ccu41;
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub type CCU40_CC40 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4000_c100>;
impl core::fmt::Debug for CCU40_CC40 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU40_CC40").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub mod ccu40_cc40;
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub type CCU40_CC41 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4000_c200>;
impl core::fmt::Debug for CCU40_CC41 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU40_CC41").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub use self::ccu40_cc40 as ccu40_cc41;
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub type CCU40_CC42 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4000_c300>;
impl core::fmt::Debug for CCU40_CC42 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU40_CC42").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub use self::ccu40_cc40 as ccu40_cc42;
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub type CCU40_CC43 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4000_c400>;
impl core::fmt::Debug for CCU40_CC43 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU40_CC43").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 0"]
pub use self::ccu40_cc40 as ccu40_cc43;
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub type CCU41_CC40 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4001_0100>;
impl core::fmt::Debug for CCU41_CC40 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU41_CC40").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub use self::ccu40_cc40 as ccu41_cc40;
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub type CCU41_CC41 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4001_0200>;
impl core::fmt::Debug for CCU41_CC41 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU41_CC41").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub use self::ccu40_cc40 as ccu41_cc41;
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub type CCU41_CC42 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4001_0300>;
impl core::fmt::Debug for CCU41_CC42 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU41_CC42").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub use self::ccu40_cc40 as ccu41_cc42;
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub type CCU41_CC43 = crate::Periph<ccu40_cc40::RegisterBlock, 0x4001_0400>;
impl core::fmt::Debug for CCU41_CC43 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU41_CC43").finish()
}
}
#[doc = "Capture Compare Unit 4 - Unit 1"]
pub use self::ccu40_cc40 as ccu41_cc43;
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub type CCU80 = crate::Periph<ccu80::RegisterBlock, 0x4002_0000>;
impl core::fmt::Debug for CCU80 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU80").finish()
}
}
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub mod ccu80;
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub type CCU80_CC80 = crate::Periph<ccu80_cc80::RegisterBlock, 0x4002_0100>;
impl core::fmt::Debug for CCU80_CC80 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU80_CC80").finish()
}
}
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub mod ccu80_cc80;
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub type CCU80_CC81 = crate::Periph<ccu80_cc80::RegisterBlock, 0x4002_0200>;
impl core::fmt::Debug for CCU80_CC81 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU80_CC81").finish()
}
}
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub use self::ccu80_cc80 as ccu80_cc81;
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub type CCU80_CC82 = crate::Periph<ccu80_cc80::RegisterBlock, 0x4002_0300>;
impl core::fmt::Debug for CCU80_CC82 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU80_CC82").finish()
}
}
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub use self::ccu80_cc80 as ccu80_cc82;
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub type CCU80_CC83 = crate::Periph<ccu80_cc80::RegisterBlock, 0x4002_0400>;
impl core::fmt::Debug for CCU80_CC83 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CCU80_CC83").finish()
}
}
#[doc = "Capture Compare Unit 8 - Unit 0"]
pub use self::ccu80_cc80 as ccu80_cc83;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0 = crate::Periph<hrpwm0::RegisterBlock, 0x4002_0900>;
impl core::fmt::Debug for HRPWM0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub mod hrpwm0;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_CSG0 = crate::Periph<hrpwm0_csg0::RegisterBlock, 0x4002_0a00>;
impl core::fmt::Debug for HRPWM0_CSG0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_CSG0").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub mod hrpwm0_csg0;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_CSG1 = crate::Periph<hrpwm0_csg0::RegisterBlock, 0x4002_0b00>;
impl core::fmt::Debug for HRPWM0_CSG1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_CSG1").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub use self::hrpwm0_csg0 as hrpwm0_csg1;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_CSG2 = crate::Periph<hrpwm0_csg0::RegisterBlock, 0x4002_0c00>;
impl core::fmt::Debug for HRPWM0_CSG2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_CSG2").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub use self::hrpwm0_csg0 as hrpwm0_csg2;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_HRC0 = crate::Periph<hrpwm0_hrc0::RegisterBlock, 0x4002_1300>;
impl core::fmt::Debug for HRPWM0_HRC0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_HRC0").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub mod hrpwm0_hrc0;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_HRC1 = crate::Periph<hrpwm0_hrc0::RegisterBlock, 0x4002_1400>;
impl core::fmt::Debug for HRPWM0_HRC1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_HRC1").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub use self::hrpwm0_hrc0 as hrpwm0_hrc1;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_HRC2 = crate::Periph<hrpwm0_hrc0::RegisterBlock, 0x4002_1500>;
impl core::fmt::Debug for HRPWM0_HRC2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_HRC2").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub use self::hrpwm0_hrc0 as hrpwm0_hrc2;
#[doc = "High Resolution PWM Unit"]
pub type HRPWM0_HRC3 = crate::Periph<hrpwm0_hrc0::RegisterBlock, 0x4002_1600>;
impl core::fmt::Debug for HRPWM0_HRC3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HRPWM0_HRC3").finish()
}
}
#[doc = "High Resolution PWM Unit"]
pub use self::hrpwm0_hrc0 as hrpwm0_hrc3;
#[doc = "Position Interface 0"]
pub type POSIF0 = crate::Periph<posif0::RegisterBlock, 0x4002_8000>;
impl core::fmt::Debug for POSIF0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("POSIF0").finish()
}
}
#[doc = "Position Interface 0"]
pub mod posif0;
#[doc = "Port 0"]
pub type PORT0 = crate::Periph<port0::RegisterBlock, 0x4802_8000>;
impl core::fmt::Debug for PORT0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PORT0").finish()
}
}
#[doc = "Port 0"]
pub mod port0;
#[doc = "Port 1"]
pub type PORT1 = crate::Periph<port1::RegisterBlock, 0x4802_8100>;
impl core::fmt::Debug for PORT1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PORT1").finish()
}
}
#[doc = "Port 1"]
pub mod port1;
#[doc = "Port 2"]
pub type PORT2 = crate::Periph<port2::RegisterBlock, 0x4802_8200>;
impl core::fmt::Debug for PORT2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PORT2").finish()
}
}
#[doc = "Port 2"]
pub mod port2;
#[doc = "Port 3"]
pub type PORT3 = crate::Periph<port3::RegisterBlock, 0x4802_8300>;
impl core::fmt::Debug for PORT3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PORT3").finish()
}
}
#[doc = "Port 3"]
pub mod port3;
#[doc = "Port 14"]
pub type PORT14 = crate::Periph<port14::RegisterBlock, 0x4802_8e00>;
impl core::fmt::Debug for PORT14 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PORT14").finish()
}
}
#[doc = "Port 14"]
pub mod port14;
#[no_mangle]
static mut DEVICE_PERIPHERALS: bool = false;
#[doc = r" All the peripherals."]
#[allow(non_snake_case)]
pub struct Peripherals {
#[doc = "PPB"]
pub PPB: PPB,
#[doc = "DLR"]
pub DLR: DLR,
#[doc = "ERU0"]
pub ERU0: ERU0,
#[doc = "ERU1"]
pub ERU1: ERU1,
#[doc = "GPDMA0"]
pub GPDMA0: GPDMA0,
#[doc = "GPDMA0_CH0"]
pub GPDMA0_CH0: GPDMA0_CH0,
#[doc = "GPDMA0_CH1"]
pub GPDMA0_CH1: GPDMA0_CH1,
#[doc = "GPDMA0_CH2"]
pub GPDMA0_CH2: GPDMA0_CH2,
#[doc = "GPDMA0_CH3"]
pub GPDMA0_CH3: GPDMA0_CH3,
#[doc = "GPDMA0_CH4"]
pub GPDMA0_CH4: GPDMA0_CH4,
#[doc = "GPDMA0_CH5"]
pub GPDMA0_CH5: GPDMA0_CH5,
#[doc = "GPDMA0_CH6"]
pub GPDMA0_CH6: GPDMA0_CH6,
#[doc = "GPDMA0_CH7"]
pub GPDMA0_CH7: GPDMA0_CH7,
#[doc = "FCE"]
pub FCE: FCE,
#[doc = "FCE_KE0"]
pub FCE_KE0: FCE_KE0,
#[doc = "FCE_KE1"]
pub FCE_KE1: FCE_KE1,
#[doc = "FCE_KE2"]
pub FCE_KE2: FCE_KE2,
#[doc = "FCE_KE3"]
pub FCE_KE3: FCE_KE3,
#[doc = "PBA0"]
pub PBA0: PBA0,
#[doc = "PBA1"]
pub PBA1: PBA1,
#[doc = "FLASH0"]
pub FLASH0: FLASH0,
#[doc = "PREF"]
pub PREF: PREF,
#[doc = "PMU0"]
pub PMU0: PMU0,
#[doc = "WDT"]
pub WDT: WDT,
#[doc = "RTC"]
pub RTC: RTC,
#[doc = "SCU_CLK"]
pub SCU_CLK: SCU_CLK,
#[doc = "SCU_OSC"]
pub SCU_OSC: SCU_OSC,
#[doc = "SCU_PLL"]
pub SCU_PLL: SCU_PLL,
#[doc = "SCU_GENERAL"]
pub SCU_GENERAL: SCU_GENERAL,
#[doc = "SCU_INTERRUPT"]
pub SCU_INTERRUPT: SCU_INTERRUPT,
#[doc = "SCU_PARITY"]
pub SCU_PARITY: SCU_PARITY,
#[doc = "SCU_TRAP"]
pub SCU_TRAP: SCU_TRAP,
#[doc = "SCU_HIBERNATE"]
pub SCU_HIBERNATE: SCU_HIBERNATE,
#[doc = "SCU_POWER"]
pub SCU_POWER: SCU_POWER,
#[doc = "SCU_RESET"]
pub SCU_RESET: SCU_RESET,
#[doc = "LEDTS0"]
pub LEDTS0: LEDTS0,
#[doc = "USB0"]
pub USB0: USB0,
#[doc = "USB0_EP0"]
pub USB0_EP0: USB0_EP0,
#[doc = "USB0_EP1"]
pub USB0_EP1: USB0_EP1,
#[doc = "USB0_EP2"]
pub USB0_EP2: USB0_EP2,
#[doc = "USB0_EP3"]
pub USB0_EP3: USB0_EP3,
#[doc = "USB0_EP4"]
pub USB0_EP4: USB0_EP4,
#[doc = "USB0_EP5"]
pub USB0_EP5: USB0_EP5,
#[doc = "USB0_EP6"]
pub USB0_EP6: USB0_EP6,
#[doc = "USIC0"]
pub USIC0: USIC0,
#[doc = "USIC1"]
pub USIC1: USIC1,
#[doc = "USIC0_CH0"]
pub USIC0_CH0: USIC0_CH0,
#[doc = "USIC0_CH1"]
pub USIC0_CH1: USIC0_CH1,
#[doc = "USIC1_CH0"]
pub USIC1_CH0: USIC1_CH0,
#[doc = "USIC1_CH1"]
pub USIC1_CH1: USIC1_CH1,
#[doc = "CAN"]
pub CAN: CAN,
#[doc = "CAN_NODE0"]
pub CAN_NODE0: CAN_NODE0,
#[doc = "CAN_NODE1"]
pub CAN_NODE1: CAN_NODE1,
#[doc = "CAN_MO0"]
pub CAN_MO0: CAN_MO0,
#[doc = "CAN_MO1"]
pub CAN_MO1: CAN_MO1,
#[doc = "CAN_MO2"]
pub CAN_MO2: CAN_MO2,
#[doc = "CAN_MO3"]
pub CAN_MO3: CAN_MO3,
#[doc = "CAN_MO4"]
pub CAN_MO4: CAN_MO4,
#[doc = "CAN_MO5"]
pub CAN_MO5: CAN_MO5,
#[doc = "CAN_MO6"]
pub CAN_MO6: CAN_MO6,
#[doc = "CAN_MO7"]
pub CAN_MO7: CAN_MO7,
#[doc = "CAN_MO8"]
pub CAN_MO8: CAN_MO8,
#[doc = "CAN_MO9"]
pub CAN_MO9: CAN_MO9,
#[doc = "CAN_MO10"]
pub CAN_MO10: CAN_MO10,
#[doc = "CAN_MO11"]
pub CAN_MO11: CAN_MO11,
#[doc = "CAN_MO12"]
pub CAN_MO12: CAN_MO12,
#[doc = "CAN_MO13"]
pub CAN_MO13: CAN_MO13,
#[doc = "CAN_MO14"]
pub CAN_MO14: CAN_MO14,
#[doc = "CAN_MO15"]
pub CAN_MO15: CAN_MO15,
#[doc = "CAN_MO16"]
pub CAN_MO16: CAN_MO16,
#[doc = "CAN_MO17"]
pub CAN_MO17: CAN_MO17,
#[doc = "CAN_MO18"]
pub CAN_MO18: CAN_MO18,
#[doc = "CAN_MO19"]
pub CAN_MO19: CAN_MO19,
#[doc = "CAN_MO20"]
pub CAN_MO20: CAN_MO20,
#[doc = "CAN_MO21"]
pub CAN_MO21: CAN_MO21,
#[doc = "CAN_MO22"]
pub CAN_MO22: CAN_MO22,
#[doc = "CAN_MO23"]
pub CAN_MO23: CAN_MO23,
#[doc = "CAN_MO24"]
pub CAN_MO24: CAN_MO24,
#[doc = "CAN_MO25"]
pub CAN_MO25: CAN_MO25,
#[doc = "CAN_MO26"]
pub CAN_MO26: CAN_MO26,
#[doc = "CAN_MO27"]
pub CAN_MO27: CAN_MO27,
#[doc = "CAN_MO28"]
pub CAN_MO28: CAN_MO28,
#[doc = "CAN_MO29"]
pub CAN_MO29: CAN_MO29,
#[doc = "CAN_MO30"]
pub CAN_MO30: CAN_MO30,
#[doc = "CAN_MO31"]
pub CAN_MO31: CAN_MO31,
#[doc = "CAN_MO32"]
pub CAN_MO32: CAN_MO32,
#[doc = "CAN_MO33"]
pub CAN_MO33: CAN_MO33,
#[doc = "CAN_MO34"]
pub CAN_MO34: CAN_MO34,
#[doc = "CAN_MO35"]
pub CAN_MO35: CAN_MO35,
#[doc = "CAN_MO36"]
pub CAN_MO36: CAN_MO36,
#[doc = "CAN_MO37"]
pub CAN_MO37: CAN_MO37,
#[doc = "CAN_MO38"]
pub CAN_MO38: CAN_MO38,
#[doc = "CAN_MO39"]
pub CAN_MO39: CAN_MO39,
#[doc = "CAN_MO40"]
pub CAN_MO40: CAN_MO40,
#[doc = "CAN_MO41"]
pub CAN_MO41: CAN_MO41,
#[doc = "CAN_MO42"]
pub CAN_MO42: CAN_MO42,
#[doc = "CAN_MO43"]
pub CAN_MO43: CAN_MO43,
#[doc = "CAN_MO44"]
pub CAN_MO44: CAN_MO44,
#[doc = "CAN_MO45"]
pub CAN_MO45: CAN_MO45,
#[doc = "CAN_MO46"]
pub CAN_MO46: CAN_MO46,
#[doc = "CAN_MO47"]
pub CAN_MO47: CAN_MO47,
#[doc = "CAN_MO48"]
pub CAN_MO48: CAN_MO48,
#[doc = "CAN_MO49"]
pub CAN_MO49: CAN_MO49,
#[doc = "CAN_MO50"]
pub CAN_MO50: CAN_MO50,
#[doc = "CAN_MO51"]
pub CAN_MO51: CAN_MO51,
#[doc = "CAN_MO52"]
pub CAN_MO52: CAN_MO52,
#[doc = "CAN_MO53"]
pub CAN_MO53: CAN_MO53,
#[doc = "CAN_MO54"]
pub CAN_MO54: CAN_MO54,
#[doc = "CAN_MO55"]
pub CAN_MO55: CAN_MO55,
#[doc = "CAN_MO56"]
pub CAN_MO56: CAN_MO56,
#[doc = "CAN_MO57"]
pub CAN_MO57: CAN_MO57,
#[doc = "CAN_MO58"]
pub CAN_MO58: CAN_MO58,
#[doc = "CAN_MO59"]
pub CAN_MO59: CAN_MO59,
#[doc = "CAN_MO60"]
pub CAN_MO60: CAN_MO60,
#[doc = "CAN_MO61"]
pub CAN_MO61: CAN_MO61,
#[doc = "CAN_MO62"]
pub CAN_MO62: CAN_MO62,
#[doc = "CAN_MO63"]
pub CAN_MO63: CAN_MO63,
#[doc = "VADC"]
pub VADC: VADC,
#[doc = "VADC_G0"]
pub VADC_G0: VADC_G0,
#[doc = "VADC_G1"]
pub VADC_G1: VADC_G1,
#[doc = "DAC"]
pub DAC: DAC,
#[doc = "CCU40"]
pub CCU40: CCU40,
#[doc = "CCU41"]
pub CCU41: CCU41,
#[doc = "CCU40_CC40"]
pub CCU40_CC40: CCU40_CC40,
#[doc = "CCU40_CC41"]
pub CCU40_CC41: CCU40_CC41,
#[doc = "CCU40_CC42"]
pub CCU40_CC42: CCU40_CC42,
#[doc = "CCU40_CC43"]
pub CCU40_CC43: CCU40_CC43,
#[doc = "CCU41_CC40"]
pub CCU41_CC40: CCU41_CC40,
#[doc = "CCU41_CC41"]
pub CCU41_CC41: CCU41_CC41,
#[doc = "CCU41_CC42"]
pub CCU41_CC42: CCU41_CC42,
#[doc = "CCU41_CC43"]
pub CCU41_CC43: CCU41_CC43,
#[doc = "CCU80"]
pub CCU80: CCU80,
#[doc = "CCU80_CC80"]
pub CCU80_CC80: CCU80_CC80,
#[doc = "CCU80_CC81"]
pub CCU80_CC81: CCU80_CC81,
#[doc = "CCU80_CC82"]
pub CCU80_CC82: CCU80_CC82,
#[doc = "CCU80_CC83"]
pub CCU80_CC83: CCU80_CC83,
#[doc = "HRPWM0"]
pub HRPWM0: HRPWM0,
#[doc = "HRPWM0_CSG0"]
pub HRPWM0_CSG0: HRPWM0_CSG0,
#[doc = "HRPWM0_CSG1"]
pub HRPWM0_CSG1: HRPWM0_CSG1,
#[doc = "HRPWM0_CSG2"]
pub HRPWM0_CSG2: HRPWM0_CSG2,
#[doc = "HRPWM0_HRC0"]
pub HRPWM0_HRC0: HRPWM0_HRC0,
#[doc = "HRPWM0_HRC1"]
pub HRPWM0_HRC1: HRPWM0_HRC1,
#[doc = "HRPWM0_HRC2"]
pub HRPWM0_HRC2: HRPWM0_HRC2,
#[doc = "HRPWM0_HRC3"]
pub HRPWM0_HRC3: HRPWM0_HRC3,
#[doc = "POSIF0"]
pub POSIF0: POSIF0,
#[doc = "PORT0"]
pub PORT0: PORT0,
#[doc = "PORT1"]
pub PORT1: PORT1,
#[doc = "PORT2"]
pub PORT2: PORT2,
#[doc = "PORT3"]
pub PORT3: PORT3,
#[doc = "PORT14"]
pub PORT14: PORT14,
}
impl Peripherals {
#[doc = r" Returns all the peripherals *once*."]
#[cfg(feature = "critical-section")]
#[inline]
pub fn take() -> Option<Self> {
critical_section::with(|_| {
if unsafe { DEVICE_PERIPHERALS } {
return None;
}
Some(unsafe { Peripherals::steal() })
})
}
#[doc = r" Unchecked version of `Peripherals::take`."]
#[doc = r""]
#[doc = r" # Safety"]
#[doc = r""]
#[doc = r" Each of the returned peripherals must be used at most once."]
#[inline]
pub unsafe fn steal() -> Self {
DEVICE_PERIPHERALS = true;
Peripherals {
PPB: PPB::steal(),
DLR: DLR::steal(),
ERU0: ERU0::steal(),
ERU1: ERU1::steal(),
GPDMA0: GPDMA0::steal(),
GPDMA0_CH0: GPDMA0_CH0::steal(),
GPDMA0_CH1: GPDMA0_CH1::steal(),
GPDMA0_CH2: GPDMA0_CH2::steal(),
GPDMA0_CH3: GPDMA0_CH3::steal(),
GPDMA0_CH4: GPDMA0_CH4::steal(),
GPDMA0_CH5: GPDMA0_CH5::steal(),
GPDMA0_CH6: GPDMA0_CH6::steal(),
GPDMA0_CH7: GPDMA0_CH7::steal(),
FCE: FCE::steal(),
FCE_KE0: FCE_KE0::steal(),
FCE_KE1: FCE_KE1::steal(),
FCE_KE2: FCE_KE2::steal(),
FCE_KE3: FCE_KE3::steal(),
PBA0: PBA0::steal(),
PBA1: PBA1::steal(),
FLASH0: FLASH0::steal(),
PREF: PREF::steal(),
PMU0: PMU0::steal(),
WDT: WDT::steal(),
RTC: RTC::steal(),
SCU_CLK: SCU_CLK::steal(),
SCU_OSC: SCU_OSC::steal(),
SCU_PLL: SCU_PLL::steal(),
SCU_GENERAL: SCU_GENERAL::steal(),
SCU_INTERRUPT: SCU_INTERRUPT::steal(),
SCU_PARITY: SCU_PARITY::steal(),
SCU_TRAP: SCU_TRAP::steal(),
SCU_HIBERNATE: SCU_HIBERNATE::steal(),
SCU_POWER: SCU_POWER::steal(),
SCU_RESET: SCU_RESET::steal(),
LEDTS0: LEDTS0::steal(),
USB0: USB0::steal(),
USB0_EP0: USB0_EP0::steal(),
USB0_EP1: USB0_EP1::steal(),
USB0_EP2: USB0_EP2::steal(),
USB0_EP3: USB0_EP3::steal(),
USB0_EP4: USB0_EP4::steal(),
USB0_EP5: USB0_EP5::steal(),
USB0_EP6: USB0_EP6::steal(),
USIC0: USIC0::steal(),
USIC1: USIC1::steal(),
USIC0_CH0: USIC0_CH0::steal(),
USIC0_CH1: USIC0_CH1::steal(),
USIC1_CH0: USIC1_CH0::steal(),
USIC1_CH1: USIC1_CH1::steal(),
CAN: CAN::steal(),
CAN_NODE0: CAN_NODE0::steal(),
CAN_NODE1: CAN_NODE1::steal(),
CAN_MO0: CAN_MO0::steal(),
CAN_MO1: CAN_MO1::steal(),
CAN_MO2: CAN_MO2::steal(),
CAN_MO3: CAN_MO3::steal(),
CAN_MO4: CAN_MO4::steal(),
CAN_MO5: CAN_MO5::steal(),
CAN_MO6: CAN_MO6::steal(),
CAN_MO7: CAN_MO7::steal(),
CAN_MO8: CAN_MO8::steal(),
CAN_MO9: CAN_MO9::steal(),
CAN_MO10: CAN_MO10::steal(),
CAN_MO11: CAN_MO11::steal(),
CAN_MO12: CAN_MO12::steal(),
CAN_MO13: CAN_MO13::steal(),
CAN_MO14: CAN_MO14::steal(),
CAN_MO15: CAN_MO15::steal(),
CAN_MO16: CAN_MO16::steal(),
CAN_MO17: CAN_MO17::steal(),
CAN_MO18: CAN_MO18::steal(),
CAN_MO19: CAN_MO19::steal(),
CAN_MO20: CAN_MO20::steal(),
CAN_MO21: CAN_MO21::steal(),
CAN_MO22: CAN_MO22::steal(),
CAN_MO23: CAN_MO23::steal(),
CAN_MO24: CAN_MO24::steal(),
CAN_MO25: CAN_MO25::steal(),
CAN_MO26: CAN_MO26::steal(),
CAN_MO27: CAN_MO27::steal(),
CAN_MO28: CAN_MO28::steal(),
CAN_MO29: CAN_MO29::steal(),
CAN_MO30: CAN_MO30::steal(),
CAN_MO31: CAN_MO31::steal(),
CAN_MO32: CAN_MO32::steal(),
CAN_MO33: CAN_MO33::steal(),
CAN_MO34: CAN_MO34::steal(),
CAN_MO35: CAN_MO35::steal(),
CAN_MO36: CAN_MO36::steal(),
CAN_MO37: CAN_MO37::steal(),
CAN_MO38: CAN_MO38::steal(),
CAN_MO39: CAN_MO39::steal(),
CAN_MO40: CAN_MO40::steal(),
CAN_MO41: CAN_MO41::steal(),
CAN_MO42: CAN_MO42::steal(),
CAN_MO43: CAN_MO43::steal(),
CAN_MO44: CAN_MO44::steal(),
CAN_MO45: CAN_MO45::steal(),
CAN_MO46: CAN_MO46::steal(),
CAN_MO47: CAN_MO47::steal(),
CAN_MO48: CAN_MO48::steal(),
CAN_MO49: CAN_MO49::steal(),
CAN_MO50: CAN_MO50::steal(),
CAN_MO51: CAN_MO51::steal(),
CAN_MO52: CAN_MO52::steal(),
CAN_MO53: CAN_MO53::steal(),
CAN_MO54: CAN_MO54::steal(),
CAN_MO55: CAN_MO55::steal(),
CAN_MO56: CAN_MO56::steal(),
CAN_MO57: CAN_MO57::steal(),
CAN_MO58: CAN_MO58::steal(),
CAN_MO59: CAN_MO59::steal(),
CAN_MO60: CAN_MO60::steal(),
CAN_MO61: CAN_MO61::steal(),
CAN_MO62: CAN_MO62::steal(),
CAN_MO63: CAN_MO63::steal(),
VADC: VADC::steal(),
VADC_G0: VADC_G0::steal(),
VADC_G1: VADC_G1::steal(),
DAC: DAC::steal(),
CCU40: CCU40::steal(),
CCU41: CCU41::steal(),
CCU40_CC40: CCU40_CC40::steal(),
CCU40_CC41: CCU40_CC41::steal(),
CCU40_CC42: CCU40_CC42::steal(),
CCU40_CC43: CCU40_CC43::steal(),
CCU41_CC40: CCU41_CC40::steal(),
CCU41_CC41: CCU41_CC41::steal(),
CCU41_CC42: CCU41_CC42::steal(),
CCU41_CC43: CCU41_CC43::steal(),
CCU80: CCU80::steal(),
CCU80_CC80: CCU80_CC80::steal(),
CCU80_CC81: CCU80_CC81::steal(),
CCU80_CC82: CCU80_CC82::steal(),
CCU80_CC83: CCU80_CC83::steal(),
HRPWM0: HRPWM0::steal(),
HRPWM0_CSG0: HRPWM0_CSG0::steal(),
HRPWM0_CSG1: HRPWM0_CSG1::steal(),
HRPWM0_CSG2: HRPWM0_CSG2::steal(),
HRPWM0_HRC0: HRPWM0_HRC0::steal(),
HRPWM0_HRC1: HRPWM0_HRC1::steal(),
HRPWM0_HRC2: HRPWM0_HRC2::steal(),
HRPWM0_HRC3: HRPWM0_HRC3::steal(),
POSIF0: POSIF0::steal(),
PORT0: PORT0::steal(),
PORT1: PORT1::steal(),
PORT2: PORT2::steal(),
PORT3: PORT3::steal(),
PORT14: PORT14::steal(),
}
}
}