1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 rststat: RSTSTAT,
5 rstset: RSTSET,
6 rstclr: RSTCLR,
7 prstat0: PRSTAT0,
8 prset0: PRSET0,
9 prclr0: PRCLR0,
10 prstat1: PRSTAT1,
11 prset1: PRSET1,
12 prclr1: PRCLR1,
13 prstat2: PRSTAT2,
14 prset2: PRSET2,
15 prclr2: PRCLR2,
16}
17impl RegisterBlock {
18 #[doc = "0x00 - RCU Reset Status"]
19 #[inline(always)]
20 pub const fn rststat(&self) -> &RSTSTAT {
21 &self.rststat
22 }
23 #[doc = "0x04 - RCU Reset Set Register"]
24 #[inline(always)]
25 pub const fn rstset(&self) -> &RSTSET {
26 &self.rstset
27 }
28 #[doc = "0x08 - RCU Reset Clear Register"]
29 #[inline(always)]
30 pub const fn rstclr(&self) -> &RSTCLR {
31 &self.rstclr
32 }
33 #[doc = "0x0c - RCU Peripheral 0 Reset Status"]
34 #[inline(always)]
35 pub const fn prstat0(&self) -> &PRSTAT0 {
36 &self.prstat0
37 }
38 #[doc = "0x10 - RCU Peripheral 0 Reset Set"]
39 #[inline(always)]
40 pub const fn prset0(&self) -> &PRSET0 {
41 &self.prset0
42 }
43 #[doc = "0x14 - RCU Peripheral 0 Reset Clear"]
44 #[inline(always)]
45 pub const fn prclr0(&self) -> &PRCLR0 {
46 &self.prclr0
47 }
48 #[doc = "0x18 - RCU Peripheral 1 Reset Status"]
49 #[inline(always)]
50 pub const fn prstat1(&self) -> &PRSTAT1 {
51 &self.prstat1
52 }
53 #[doc = "0x1c - RCU Peripheral 1 Reset Set"]
54 #[inline(always)]
55 pub const fn prset1(&self) -> &PRSET1 {
56 &self.prset1
57 }
58 #[doc = "0x20 - RCU Peripheral 1 Reset Clear"]
59 #[inline(always)]
60 pub const fn prclr1(&self) -> &PRCLR1 {
61 &self.prclr1
62 }
63 #[doc = "0x24 - RCU Peripheral 2 Reset Status"]
64 #[inline(always)]
65 pub const fn prstat2(&self) -> &PRSTAT2 {
66 &self.prstat2
67 }
68 #[doc = "0x28 - RCU Peripheral 2 Reset Set"]
69 #[inline(always)]
70 pub const fn prset2(&self) -> &PRSET2 {
71 &self.prset2
72 }
73 #[doc = "0x2c - RCU Peripheral 2 Reset Clear"]
74 #[inline(always)]
75 pub const fn prclr2(&self) -> &PRCLR2 {
76 &self.prclr2
77 }
78}
79#[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`]
80module"]
81pub type RSTSTAT = crate::Reg<rststat::RSTSTAT_SPEC>;
82#[doc = "RCU Reset Status"]
83pub mod rststat;
84#[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`]
85module"]
86pub type RSTSET = crate::Reg<rstset::RSTSET_SPEC>;
87#[doc = "RCU Reset Set Register"]
88pub mod rstset;
89#[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`]
90module"]
91pub type RSTCLR = crate::Reg<rstclr::RSTCLR_SPEC>;
92#[doc = "RCU Reset Clear Register"]
93pub mod rstclr;
94#[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`]
95module"]
96pub type PRSTAT0 = crate::Reg<prstat0::PRSTAT0_SPEC>;
97#[doc = "RCU Peripheral 0 Reset Status"]
98pub mod prstat0;
99#[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`]
100module"]
101pub type PRSET0 = crate::Reg<prset0::PRSET0_SPEC>;
102#[doc = "RCU Peripheral 0 Reset Set"]
103pub mod prset0;
104#[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`]
105module"]
106pub type PRCLR0 = crate::Reg<prclr0::PRCLR0_SPEC>;
107#[doc = "RCU Peripheral 0 Reset Clear"]
108pub mod prclr0;
109#[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`]
110module"]
111pub type PRSTAT1 = crate::Reg<prstat1::PRSTAT1_SPEC>;
112#[doc = "RCU Peripheral 1 Reset Status"]
113pub mod prstat1;
114#[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`]
115module"]
116pub type PRSET1 = crate::Reg<prset1::PRSET1_SPEC>;
117#[doc = "RCU Peripheral 1 Reset Set"]
118pub mod prset1;
119#[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`]
120module"]
121pub type PRCLR1 = crate::Reg<prclr1::PRCLR1_SPEC>;
122#[doc = "RCU Peripheral 1 Reset Clear"]
123pub mod prclr1;
124#[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`]
125module"]
126pub type PRSTAT2 = crate::Reg<prstat2::PRSTAT2_SPEC>;
127#[doc = "RCU Peripheral 2 Reset Status"]
128pub mod prstat2;
129#[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`]
130module"]
131pub type PRSET2 = crate::Reg<prset2::PRSET2_SPEC>;
132#[doc = "RCU Peripheral 2 Reset Set"]
133pub mod prset2;
134#[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`]
135module"]
136pub type PRCLR2 = crate::Reg<prclr2::PRCLR2_SPEC>;
137#[doc = "RCU Peripheral 2 Reset Clear"]
138pub mod prclr2;