xmc4100/scu_power/
pwrclr.rs

1#[doc = "Register `PWRCLR` writer"]
2pub type W = crate::W<PWRCLR_SPEC>;
3#[doc = "Clear Disable Hibernate Domain\n\nValue on reset: 0"]
4#[derive(Clone, Copy, Debug, PartialEq, Eq)]
5pub enum HIB_A {
6    #[doc = "0: No effect"]
7    VALUE1 = 0,
8    #[doc = "1: Disable Hibernate domain"]
9    VALUE2 = 1,
10}
11impl From<HIB_A> for bool {
12    #[inline(always)]
13    fn from(variant: HIB_A) -> Self {
14        variant as u8 != 0
15    }
16}
17#[doc = "Field `HIB` writer - Clear Disable Hibernate Domain"]
18pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_A>;
19impl<'a, REG> HIB_W<'a, REG>
20where
21    REG: crate::Writable + crate::RegisterSpec,
22{
23    #[doc = "No effect"]
24    #[inline(always)]
25    pub fn value1(self) -> &'a mut crate::W<REG> {
26        self.variant(HIB_A::VALUE1)
27    }
28    #[doc = "Disable Hibernate domain"]
29    #[inline(always)]
30    pub fn value2(self) -> &'a mut crate::W<REG> {
31        self.variant(HIB_A::VALUE2)
32    }
33}
34#[doc = "Clear USB PHY Transceiver Disable\n\nValue on reset: 0"]
35#[derive(Clone, Copy, Debug, PartialEq, Eq)]
36pub enum USBPHYPDQ_A {
37    #[doc = "0: No effect"]
38    VALUE1 = 0,
39    #[doc = "1: Power-down"]
40    VALUE2 = 1,
41}
42impl From<USBPHYPDQ_A> for bool {
43    #[inline(always)]
44    fn from(variant: USBPHYPDQ_A) -> Self {
45        variant as u8 != 0
46    }
47}
48#[doc = "Field `USBPHYPDQ` writer - Clear USB PHY Transceiver Disable"]
49pub type USBPHYPDQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPHYPDQ_A>;
50impl<'a, REG> USBPHYPDQ_W<'a, REG>
51where
52    REG: crate::Writable + crate::RegisterSpec,
53{
54    #[doc = "No effect"]
55    #[inline(always)]
56    pub fn value1(self) -> &'a mut crate::W<REG> {
57        self.variant(USBPHYPDQ_A::VALUE1)
58    }
59    #[doc = "Power-down"]
60    #[inline(always)]
61    pub fn value2(self) -> &'a mut crate::W<REG> {
62        self.variant(USBPHYPDQ_A::VALUE2)
63    }
64}
65#[doc = "Clear USB Weak Pull-Up at PADN Enable\n\nValue on reset: 0"]
66#[derive(Clone, Copy, Debug, PartialEq, Eq)]
67pub enum USBPUWQ_A {
68    #[doc = "0: No effect"]
69    VALUE1 = 0,
70    #[doc = "1: Pull-up active"]
71    VALUE2 = 1,
72}
73impl From<USBPUWQ_A> for bool {
74    #[inline(always)]
75    fn from(variant: USBPUWQ_A) -> Self {
76        variant as u8 != 0
77    }
78}
79#[doc = "Field `USBPUWQ` writer - Clear USB Weak Pull-Up at PADN Enable"]
80pub type USBPUWQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPUWQ_A>;
81impl<'a, REG> USBPUWQ_W<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84{
85    #[doc = "No effect"]
86    #[inline(always)]
87    pub fn value1(self) -> &'a mut crate::W<REG> {
88        self.variant(USBPUWQ_A::VALUE1)
89    }
90    #[doc = "Pull-up active"]
91    #[inline(always)]
92    pub fn value2(self) -> &'a mut crate::W<REG> {
93        self.variant(USBPUWQ_A::VALUE2)
94    }
95}
96impl W {
97    #[doc = "Bit 0 - Clear Disable Hibernate Domain"]
98    #[inline(always)]
99    pub fn hib(&mut self) -> HIB_W<PWRCLR_SPEC> {
100        HIB_W::new(self, 0)
101    }
102    #[doc = "Bit 16 - Clear USB PHY Transceiver Disable"]
103    #[inline(always)]
104    pub fn usbphypdq(&mut self) -> USBPHYPDQ_W<PWRCLR_SPEC> {
105        USBPHYPDQ_W::new(self, 16)
106    }
107    #[doc = "Bit 18 - Clear USB Weak Pull-Up at PADN Enable"]
108    #[inline(always)]
109    pub fn usbpuwq(&mut self) -> USBPUWQ_W<PWRCLR_SPEC> {
110        USBPUWQ_W::new(self, 18)
111    }
112}
113#[doc = "PCU Clear Control Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
114pub struct PWRCLR_SPEC;
115impl crate::RegisterSpec for PWRCLR_SPEC {
116    type Ux = u32;
117}
118#[doc = "`write(|w| ..)` method takes [`pwrclr::W`](W) writer structure"]
119impl crate::Writable for PWRCLR_SPEC {
120    type Safety = crate::Unsafe;
121    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
122    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
123}
124#[doc = "`reset()` method sets PWRCLR to value 0"]
125impl crate::Resettable for PWRCLR_SPEC {
126    const RESET_VALUE: u32 = 0;
127}
xmc4100/scu_power/pwrclr.rs

xmc4100/scu_power/
pwrclr.rs
