1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 out: OUT,
5 omr: OMR,
6 _reserved2: [u8; 0x08],
7 iocr0: IOCR0,
8 _reserved3: [u8; 0x10],
9 in_: IN,
10 _reserved4: [u8; 0x18],
11 pdr0: PDR0,
12 _reserved5: [u8; 0x1c],
13 pdisc: PDISC,
14 _reserved6: [u8; 0x0c],
15 pps: PPS,
16 hwsel: HWSEL,
17}
18impl RegisterBlock {
19 #[doc = "0x00 - Port 3 Output Register"]
20 #[inline(always)]
21 pub const fn out(&self) -> &OUT {
22 &self.out
23 }
24 #[doc = "0x04 - Port 3 Output Modification Register"]
25 #[inline(always)]
26 pub const fn omr(&self) -> &OMR {
27 &self.omr
28 }
29 #[doc = "0x10 - Port 3 Input/Output Control Register 0"]
30 #[inline(always)]
31 pub const fn iocr0(&self) -> &IOCR0 {
32 &self.iocr0
33 }
34 #[doc = "0x24 - Port 3 Input Register"]
35 #[inline(always)]
36 pub const fn in_(&self) -> &IN {
37 &self.in_
38 }
39 #[doc = "0x40 - Port 3 Pad Driver Mode 0 Register"]
40 #[inline(always)]
41 pub const fn pdr0(&self) -> &PDR0 {
42 &self.pdr0
43 }
44 #[doc = "0x60 - Port 3 Pin Function Decision Control Register"]
45 #[inline(always)]
46 pub const fn pdisc(&self) -> &PDISC {
47 &self.pdisc
48 }
49 #[doc = "0x70 - Port 3 Pin Power Save Register"]
50 #[inline(always)]
51 pub const fn pps(&self) -> &PPS {
52 &self.pps
53 }
54 #[doc = "0x74 - Port 3 Pin Hardware Select Register"]
55 #[inline(always)]
56 pub const fn hwsel(&self) -> &HWSEL {
57 &self.hwsel
58 }
59}
60#[doc = "OUT (rw) register accessor: Port 3 Output Register\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`]
61module"]
62pub type OUT = crate::Reg<out::OUT_SPEC>;
63#[doc = "Port 3 Output Register"]
64pub mod out;
65#[doc = "OMR (w) register accessor: Port 3 Output Modification Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`]
66module"]
67pub type OMR = crate::Reg<omr::OMR_SPEC>;
68#[doc = "Port 3 Output Modification Register"]
69pub mod omr;
70#[doc = "IOCR0 (rw) register accessor: Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`]
71module"]
72pub type IOCR0 = crate::Reg<iocr0::IOCR0_SPEC>;
73#[doc = "Port 3 Input/Output Control Register 0"]
74pub mod iocr0;
75#[doc = "IN (r) register accessor: Port 3 Input Register\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`]
76module"]
77pub type IN = crate::Reg<in_::IN_SPEC>;
78#[doc = "Port 3 Input Register"]
79pub mod in_;
80#[doc = "PDR0 (rw) register accessor: Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`]
81module"]
82pub type PDR0 = crate::Reg<pdr0::PDR0_SPEC>;
83#[doc = "Port 3 Pad Driver Mode 0 Register"]
84pub mod pdr0;
85#[doc = "PDISC (r) register accessor: Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`]
86module"]
87pub type PDISC = crate::Reg<pdisc::PDISC_SPEC>;
88#[doc = "Port 3 Pin Function Decision Control Register"]
89pub mod pdisc;
90#[doc = "PPS (rw) register accessor: Port 3 Pin Power Save Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`]
91module"]
92pub type PPS = crate::Reg<pps::PPS_SPEC>;
93#[doc = "Port 3 Pin Power Save Register"]
94pub mod pps;
95#[doc = "HWSEL (rw) register accessor: Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`]
96module"]
97pub type HWSEL = crate::Reg<hwsel::HWSEL_SPEC>;
98#[doc = "Port 3 Pin Hardware Select Register"]
99pub mod hwsel;