1#[doc = "Register `PDR1` reader"]
2pub type R = crate::R<PDR1_SPEC>;
3#[doc = "Register `PDR1` writer"]
4pub type W = crate::W<PDR1_SPEC>;
5#[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"]
6pub type PD8_R = crate::FieldReader;
7#[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"]
8pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"]
10pub type PD9_R = crate::FieldReader;
11#[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"]
12pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"]
14pub type PD10_R = crate::FieldReader;
15#[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"]
16pub type PD10_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17#[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"]
18pub type PD11_R = crate::FieldReader;
19#[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"]
20pub type PD11_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
21#[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"]
22pub type PD12_R = crate::FieldReader;
23#[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"]
24pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"]
26pub type PD13_R = crate::FieldReader;
27#[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"]
28pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
29#[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"]
30pub type PD14_R = crate::FieldReader;
31#[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"]
32pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
33#[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"]
34pub type PD15_R = crate::FieldReader;
35#[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"]
36pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
37impl R {
38 #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"]
39 #[inline(always)]
40 pub fn pd8(&self) -> PD8_R {
41 PD8_R::new((self.bits & 7) as u8)
42 }
43 #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"]
44 #[inline(always)]
45 pub fn pd9(&self) -> PD9_R {
46 PD9_R::new(((self.bits >> 4) & 7) as u8)
47 }
48 #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"]
49 #[inline(always)]
50 pub fn pd10(&self) -> PD10_R {
51 PD10_R::new(((self.bits >> 8) & 7) as u8)
52 }
53 #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"]
54 #[inline(always)]
55 pub fn pd11(&self) -> PD11_R {
56 PD11_R::new(((self.bits >> 12) & 7) as u8)
57 }
58 #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"]
59 #[inline(always)]
60 pub fn pd12(&self) -> PD12_R {
61 PD12_R::new(((self.bits >> 16) & 7) as u8)
62 }
63 #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"]
64 #[inline(always)]
65 pub fn pd13(&self) -> PD13_R {
66 PD13_R::new(((self.bits >> 20) & 7) as u8)
67 }
68 #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"]
69 #[inline(always)]
70 pub fn pd14(&self) -> PD14_R {
71 PD14_R::new(((self.bits >> 24) & 7) as u8)
72 }
73 #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"]
74 #[inline(always)]
75 pub fn pd15(&self) -> PD15_R {
76 PD15_R::new(((self.bits >> 28) & 7) as u8)
77 }
78}
79impl W {
80 #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"]
81 #[inline(always)]
82 pub fn pd8(&mut self) -> PD8_W<PDR1_SPEC> {
83 PD8_W::new(self, 0)
84 }
85 #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"]
86 #[inline(always)]
87 pub fn pd9(&mut self) -> PD9_W<PDR1_SPEC> {
88 PD9_W::new(self, 4)
89 }
90 #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"]
91 #[inline(always)]
92 pub fn pd10(&mut self) -> PD10_W<PDR1_SPEC> {
93 PD10_W::new(self, 8)
94 }
95 #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"]
96 #[inline(always)]
97 pub fn pd11(&mut self) -> PD11_W<PDR1_SPEC> {
98 PD11_W::new(self, 12)
99 }
100 #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"]
101 #[inline(always)]
102 pub fn pd12(&mut self) -> PD12_W<PDR1_SPEC> {
103 PD12_W::new(self, 16)
104 }
105 #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"]
106 #[inline(always)]
107 pub fn pd13(&mut self) -> PD13_W<PDR1_SPEC> {
108 PD13_W::new(self, 20)
109 }
110 #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"]
111 #[inline(always)]
112 pub fn pd14(&mut self) -> PD14_W<PDR1_SPEC> {
113 PD14_W::new(self, 24)
114 }
115 #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"]
116 #[inline(always)]
117 pub fn pd15(&mut self) -> PD15_W<PDR1_SPEC> {
118 PD15_W::new(self, 28)
119 }
120}
121#[doc = "Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct PDR1_SPEC;
123impl crate::RegisterSpec for PDR1_SPEC {
124 type Ux = u32;
125}
126#[doc = "`read()` method returns [`pdr1::R`](R) reader structure"]
127impl crate::Readable for PDR1_SPEC {}
128#[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"]
129impl crate::Writable for PDR1_SPEC {
130 type Safety = crate::Unsafe;
131 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
132 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
133}
134#[doc = "`reset()` method sets PDR1 to value 0x2222_2222"]
135impl crate::Resettable for PDR1_SPEC {
136 const RESET_VALUE: u32 = 0x2222_2222;
137}