1#[doc = "Register `CFG` reader"]
2pub type R = crate::R<CFG_SPEC>;
3#[doc = "Register `CFG` writer"]
4pub type W = crate::W<CFG_SPEC>;
5#[doc = "CRC Mismatch Interrupt\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum CMI_A {
8 #[doc = "0: CRC Mismatch Interrupt is disabled"]
9 VALUE1 = 0,
10 #[doc = "1: CRC Mismatch Interrupt is enabled"]
11 VALUE2 = 1,
12}
13impl From<CMI_A> for bool {
14 #[inline(always)]
15 fn from(variant: CMI_A) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Field `CMI` reader - CRC Mismatch Interrupt"]
20pub type CMI_R = crate::BitReader<CMI_A>;
21impl CMI_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> CMI_A {
25 match self.bits {
26 false => CMI_A::VALUE1,
27 true => CMI_A::VALUE2,
28 }
29 }
30 #[doc = "CRC Mismatch Interrupt is disabled"]
31 #[inline(always)]
32 pub fn is_value1(&self) -> bool {
33 *self == CMI_A::VALUE1
34 }
35 #[doc = "CRC Mismatch Interrupt is enabled"]
36 #[inline(always)]
37 pub fn is_value2(&self) -> bool {
38 *self == CMI_A::VALUE2
39 }
40}
41#[doc = "Field `CMI` writer - CRC Mismatch Interrupt"]
42pub type CMI_W<'a, REG> = crate::BitWriter<'a, REG, CMI_A>;
43impl<'a, REG> CMI_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "CRC Mismatch Interrupt is disabled"]
48 #[inline(always)]
49 pub fn value1(self) -> &'a mut crate::W<REG> {
50 self.variant(CMI_A::VALUE1)
51 }
52 #[doc = "CRC Mismatch Interrupt is enabled"]
53 #[inline(always)]
54 pub fn value2(self) -> &'a mut crate::W<REG> {
55 self.variant(CMI_A::VALUE2)
56 }
57}
58#[doc = "Configuration Error Interrupt\n\nValue on reset: 0"]
59#[derive(Clone, Copy, Debug, PartialEq, Eq)]
60pub enum CEI_A {
61 #[doc = "0: Configuration Error Interrupt is disabled"]
62 VALUE1 = 0,
63 #[doc = "1: Configuration Error Interrupt is enabled"]
64 VALUE2 = 1,
65}
66impl From<CEI_A> for bool {
67 #[inline(always)]
68 fn from(variant: CEI_A) -> Self {
69 variant as u8 != 0
70 }
71}
72#[doc = "Field `CEI` reader - Configuration Error Interrupt"]
73pub type CEI_R = crate::BitReader<CEI_A>;
74impl CEI_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> CEI_A {
78 match self.bits {
79 false => CEI_A::VALUE1,
80 true => CEI_A::VALUE2,
81 }
82 }
83 #[doc = "Configuration Error Interrupt is disabled"]
84 #[inline(always)]
85 pub fn is_value1(&self) -> bool {
86 *self == CEI_A::VALUE1
87 }
88 #[doc = "Configuration Error Interrupt is enabled"]
89 #[inline(always)]
90 pub fn is_value2(&self) -> bool {
91 *self == CEI_A::VALUE2
92 }
93}
94#[doc = "Field `CEI` writer - Configuration Error Interrupt"]
95pub type CEI_W<'a, REG> = crate::BitWriter<'a, REG, CEI_A>;
96impl<'a, REG> CEI_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "Configuration Error Interrupt is disabled"]
101 #[inline(always)]
102 pub fn value1(self) -> &'a mut crate::W<REG> {
103 self.variant(CEI_A::VALUE1)
104 }
105 #[doc = "Configuration Error Interrupt is enabled"]
106 #[inline(always)]
107 pub fn value2(self) -> &'a mut crate::W<REG> {
108 self.variant(CEI_A::VALUE2)
109 }
110}
111#[doc = "Length Error Interrupt\n\nValue on reset: 0"]
112#[derive(Clone, Copy, Debug, PartialEq, Eq)]
113pub enum LEI_A {
114 #[doc = "0: Length Error Interrupt is disabled"]
115 VALUE1 = 0,
116 #[doc = "1: Length Error Interrupt is enabled"]
117 VALUE2 = 1,
118}
119impl From<LEI_A> for bool {
120 #[inline(always)]
121 fn from(variant: LEI_A) -> Self {
122 variant as u8 != 0
123 }
124}
125#[doc = "Field `LEI` reader - Length Error Interrupt"]
126pub type LEI_R = crate::BitReader<LEI_A>;
127impl LEI_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> LEI_A {
131 match self.bits {
132 false => LEI_A::VALUE1,
133 true => LEI_A::VALUE2,
134 }
135 }
136 #[doc = "Length Error Interrupt is disabled"]
137 #[inline(always)]
138 pub fn is_value1(&self) -> bool {
139 *self == LEI_A::VALUE1
140 }
141 #[doc = "Length Error Interrupt is enabled"]
142 #[inline(always)]
143 pub fn is_value2(&self) -> bool {
144 *self == LEI_A::VALUE2
145 }
146}
147#[doc = "Field `LEI` writer - Length Error Interrupt"]
148pub type LEI_W<'a, REG> = crate::BitWriter<'a, REG, LEI_A>;
149impl<'a, REG> LEI_W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "Length Error Interrupt is disabled"]
154 #[inline(always)]
155 pub fn value1(self) -> &'a mut crate::W<REG> {
156 self.variant(LEI_A::VALUE1)
157 }
158 #[doc = "Length Error Interrupt is enabled"]
159 #[inline(always)]
160 pub fn value2(self) -> &'a mut crate::W<REG> {
161 self.variant(LEI_A::VALUE2)
162 }
163}
164#[doc = "Bus Error Interrupt\n\nValue on reset: 0"]
165#[derive(Clone, Copy, Debug, PartialEq, Eq)]
166pub enum BEI_A {
167 #[doc = "0: Bus Error Interrupt is disabled"]
168 VALUE1 = 0,
169 #[doc = "1: Bus Error Interrupt is enabled"]
170 VALUE2 = 1,
171}
172impl From<BEI_A> for bool {
173 #[inline(always)]
174 fn from(variant: BEI_A) -> Self {
175 variant as u8 != 0
176 }
177}
178#[doc = "Field `BEI` reader - Bus Error Interrupt"]
179pub type BEI_R = crate::BitReader<BEI_A>;
180impl BEI_R {
181 #[doc = "Get enumerated values variant"]
182 #[inline(always)]
183 pub const fn variant(&self) -> BEI_A {
184 match self.bits {
185 false => BEI_A::VALUE1,
186 true => BEI_A::VALUE2,
187 }
188 }
189 #[doc = "Bus Error Interrupt is disabled"]
190 #[inline(always)]
191 pub fn is_value1(&self) -> bool {
192 *self == BEI_A::VALUE1
193 }
194 #[doc = "Bus Error Interrupt is enabled"]
195 #[inline(always)]
196 pub fn is_value2(&self) -> bool {
197 *self == BEI_A::VALUE2
198 }
199}
200#[doc = "Field `BEI` writer - Bus Error Interrupt"]
201pub type BEI_W<'a, REG> = crate::BitWriter<'a, REG, BEI_A>;
202impl<'a, REG> BEI_W<'a, REG>
203where
204 REG: crate::Writable + crate::RegisterSpec,
205{
206 #[doc = "Bus Error Interrupt is disabled"]
207 #[inline(always)]
208 pub fn value1(self) -> &'a mut crate::W<REG> {
209 self.variant(BEI_A::VALUE1)
210 }
211 #[doc = "Bus Error Interrupt is enabled"]
212 #[inline(always)]
213 pub fn value2(self) -> &'a mut crate::W<REG> {
214 self.variant(BEI_A::VALUE2)
215 }
216}
217#[doc = "CRC Check Comparison\n\nValue on reset: 0"]
218#[derive(Clone, Copy, Debug, PartialEq, Eq)]
219pub enum CCE_A {
220 #[doc = "0: CRC check comparison at the end of a message is disabled"]
221 VALUE1 = 0,
222 #[doc = "1: CRC check comparison at the end of a message is enabled"]
223 VALUE2 = 1,
224}
225impl From<CCE_A> for bool {
226 #[inline(always)]
227 fn from(variant: CCE_A) -> Self {
228 variant as u8 != 0
229 }
230}
231#[doc = "Field `CCE` reader - CRC Check Comparison"]
232pub type CCE_R = crate::BitReader<CCE_A>;
233impl CCE_R {
234 #[doc = "Get enumerated values variant"]
235 #[inline(always)]
236 pub const fn variant(&self) -> CCE_A {
237 match self.bits {
238 false => CCE_A::VALUE1,
239 true => CCE_A::VALUE2,
240 }
241 }
242 #[doc = "CRC check comparison at the end of a message is disabled"]
243 #[inline(always)]
244 pub fn is_value1(&self) -> bool {
245 *self == CCE_A::VALUE1
246 }
247 #[doc = "CRC check comparison at the end of a message is enabled"]
248 #[inline(always)]
249 pub fn is_value2(&self) -> bool {
250 *self == CCE_A::VALUE2
251 }
252}
253#[doc = "Field `CCE` writer - CRC Check Comparison"]
254pub type CCE_W<'a, REG> = crate::BitWriter<'a, REG, CCE_A>;
255impl<'a, REG> CCE_W<'a, REG>
256where
257 REG: crate::Writable + crate::RegisterSpec,
258{
259 #[doc = "CRC check comparison at the end of a message is disabled"]
260 #[inline(always)]
261 pub fn value1(self) -> &'a mut crate::W<REG> {
262 self.variant(CCE_A::VALUE1)
263 }
264 #[doc = "CRC check comparison at the end of a message is enabled"]
265 #[inline(always)]
266 pub fn value2(self) -> &'a mut crate::W<REG> {
267 self.variant(CCE_A::VALUE2)
268 }
269}
270#[doc = "Automatic Length Reload\n\nValue on reset: 0"]
271#[derive(Clone, Copy, Debug, PartialEq, Eq)]
272pub enum ALR_A {
273 #[doc = "0: Disables automatic reload of the LENGTH field."]
274 VALUE1 = 0,
275 #[doc = "1: Enables automatic reload of the LENGTH field at the end of a message."]
276 VALUE2 = 1,
277}
278impl From<ALR_A> for bool {
279 #[inline(always)]
280 fn from(variant: ALR_A) -> Self {
281 variant as u8 != 0
282 }
283}
284#[doc = "Field `ALR` reader - Automatic Length Reload"]
285pub type ALR_R = crate::BitReader<ALR_A>;
286impl ALR_R {
287 #[doc = "Get enumerated values variant"]
288 #[inline(always)]
289 pub const fn variant(&self) -> ALR_A {
290 match self.bits {
291 false => ALR_A::VALUE1,
292 true => ALR_A::VALUE2,
293 }
294 }
295 #[doc = "Disables automatic reload of the LENGTH field."]
296 #[inline(always)]
297 pub fn is_value1(&self) -> bool {
298 *self == ALR_A::VALUE1
299 }
300 #[doc = "Enables automatic reload of the LENGTH field at the end of a message."]
301 #[inline(always)]
302 pub fn is_value2(&self) -> bool {
303 *self == ALR_A::VALUE2
304 }
305}
306#[doc = "Field `ALR` writer - Automatic Length Reload"]
307pub type ALR_W<'a, REG> = crate::BitWriter<'a, REG, ALR_A>;
308impl<'a, REG> ALR_W<'a, REG>
309where
310 REG: crate::Writable + crate::RegisterSpec,
311{
312 #[doc = "Disables automatic reload of the LENGTH field."]
313 #[inline(always)]
314 pub fn value1(self) -> &'a mut crate::W<REG> {
315 self.variant(ALR_A::VALUE1)
316 }
317 #[doc = "Enables automatic reload of the LENGTH field at the end of a message."]
318 #[inline(always)]
319 pub fn value2(self) -> &'a mut crate::W<REG> {
320 self.variant(ALR_A::VALUE2)
321 }
322}
323#[doc = "IR Byte Wise Reflection\n\nValue on reset: 1"]
324#[derive(Clone, Copy, Debug, PartialEq, Eq)]
325pub enum REFIN_A {
326 #[doc = "0: IR Byte Wise Reflection is disabled"]
327 VALUE1 = 0,
328 #[doc = "1: IR Byte Wise Reflection is enabled"]
329 VALUE2 = 1,
330}
331impl From<REFIN_A> for bool {
332 #[inline(always)]
333 fn from(variant: REFIN_A) -> Self {
334 variant as u8 != 0
335 }
336}
337#[doc = "Field `REFIN` reader - IR Byte Wise Reflection"]
338pub type REFIN_R = crate::BitReader<REFIN_A>;
339impl REFIN_R {
340 #[doc = "Get enumerated values variant"]
341 #[inline(always)]
342 pub const fn variant(&self) -> REFIN_A {
343 match self.bits {
344 false => REFIN_A::VALUE1,
345 true => REFIN_A::VALUE2,
346 }
347 }
348 #[doc = "IR Byte Wise Reflection is disabled"]
349 #[inline(always)]
350 pub fn is_value1(&self) -> bool {
351 *self == REFIN_A::VALUE1
352 }
353 #[doc = "IR Byte Wise Reflection is enabled"]
354 #[inline(always)]
355 pub fn is_value2(&self) -> bool {
356 *self == REFIN_A::VALUE2
357 }
358}
359#[doc = "Field `REFIN` writer - IR Byte Wise Reflection"]
360pub type REFIN_W<'a, REG> = crate::BitWriter<'a, REG, REFIN_A>;
361impl<'a, REG> REFIN_W<'a, REG>
362where
363 REG: crate::Writable + crate::RegisterSpec,
364{
365 #[doc = "IR Byte Wise Reflection is disabled"]
366 #[inline(always)]
367 pub fn value1(self) -> &'a mut crate::W<REG> {
368 self.variant(REFIN_A::VALUE1)
369 }
370 #[doc = "IR Byte Wise Reflection is enabled"]
371 #[inline(always)]
372 pub fn value2(self) -> &'a mut crate::W<REG> {
373 self.variant(REFIN_A::VALUE2)
374 }
375}
376#[doc = "CRC 32-Bit Wise Reflection\n\nValue on reset: 1"]
377#[derive(Clone, Copy, Debug, PartialEq, Eq)]
378pub enum REFOUT_A {
379 #[doc = "0: CRC 32-bit wise is disabled"]
380 VALUE1 = 0,
381 #[doc = "1: CRC 32-bit wise is enabled"]
382 VALUE2 = 1,
383}
384impl From<REFOUT_A> for bool {
385 #[inline(always)]
386 fn from(variant: REFOUT_A) -> Self {
387 variant as u8 != 0
388 }
389}
390#[doc = "Field `REFOUT` reader - CRC 32-Bit Wise Reflection"]
391pub type REFOUT_R = crate::BitReader<REFOUT_A>;
392impl REFOUT_R {
393 #[doc = "Get enumerated values variant"]
394 #[inline(always)]
395 pub const fn variant(&self) -> REFOUT_A {
396 match self.bits {
397 false => REFOUT_A::VALUE1,
398 true => REFOUT_A::VALUE2,
399 }
400 }
401 #[doc = "CRC 32-bit wise is disabled"]
402 #[inline(always)]
403 pub fn is_value1(&self) -> bool {
404 *self == REFOUT_A::VALUE1
405 }
406 #[doc = "CRC 32-bit wise is enabled"]
407 #[inline(always)]
408 pub fn is_value2(&self) -> bool {
409 *self == REFOUT_A::VALUE2
410 }
411}
412#[doc = "Field `REFOUT` writer - CRC 32-Bit Wise Reflection"]
413pub type REFOUT_W<'a, REG> = crate::BitWriter<'a, REG, REFOUT_A>;
414impl<'a, REG> REFOUT_W<'a, REG>
415where
416 REG: crate::Writable + crate::RegisterSpec,
417{
418 #[doc = "CRC 32-bit wise is disabled"]
419 #[inline(always)]
420 pub fn value1(self) -> &'a mut crate::W<REG> {
421 self.variant(REFOUT_A::VALUE1)
422 }
423 #[doc = "CRC 32-bit wise is enabled"]
424 #[inline(always)]
425 pub fn value2(self) -> &'a mut crate::W<REG> {
426 self.variant(REFOUT_A::VALUE2)
427 }
428}
429#[doc = "Selects the value to be xored with the final CRC\n\nValue on reset: 1"]
430#[derive(Clone, Copy, Debug, PartialEq, Eq)]
431pub enum XSEL_A {
432 #[doc = "0: 0x00000000"]
433 VALUE1 = 0,
434 #[doc = "1: 0xFFFFFFFF"]
435 VALUE2 = 1,
436}
437impl From<XSEL_A> for bool {
438 #[inline(always)]
439 fn from(variant: XSEL_A) -> Self {
440 variant as u8 != 0
441 }
442}
443#[doc = "Field `XSEL` reader - Selects the value to be xored with the final CRC"]
444pub type XSEL_R = crate::BitReader<XSEL_A>;
445impl XSEL_R {
446 #[doc = "Get enumerated values variant"]
447 #[inline(always)]
448 pub const fn variant(&self) -> XSEL_A {
449 match self.bits {
450 false => XSEL_A::VALUE1,
451 true => XSEL_A::VALUE2,
452 }
453 }
454 #[doc = "0x00000000"]
455 #[inline(always)]
456 pub fn is_value1(&self) -> bool {
457 *self == XSEL_A::VALUE1
458 }
459 #[doc = "0xFFFFFFFF"]
460 #[inline(always)]
461 pub fn is_value2(&self) -> bool {
462 *self == XSEL_A::VALUE2
463 }
464}
465#[doc = "Field `XSEL` writer - Selects the value to be xored with the final CRC"]
466pub type XSEL_W<'a, REG> = crate::BitWriter<'a, REG, XSEL_A>;
467impl<'a, REG> XSEL_W<'a, REG>
468where
469 REG: crate::Writable + crate::RegisterSpec,
470{
471 #[doc = "0x00000000"]
472 #[inline(always)]
473 pub fn value1(self) -> &'a mut crate::W<REG> {
474 self.variant(XSEL_A::VALUE1)
475 }
476 #[doc = "0xFFFFFFFF"]
477 #[inline(always)]
478 pub fn value2(self) -> &'a mut crate::W<REG> {
479 self.variant(XSEL_A::VALUE2)
480 }
481}
482impl R {
483 #[doc = "Bit 0 - CRC Mismatch Interrupt"]
484 #[inline(always)]
485 pub fn cmi(&self) -> CMI_R {
486 CMI_R::new((self.bits & 1) != 0)
487 }
488 #[doc = "Bit 1 - Configuration Error Interrupt"]
489 #[inline(always)]
490 pub fn cei(&self) -> CEI_R {
491 CEI_R::new(((self.bits >> 1) & 1) != 0)
492 }
493 #[doc = "Bit 2 - Length Error Interrupt"]
494 #[inline(always)]
495 pub fn lei(&self) -> LEI_R {
496 LEI_R::new(((self.bits >> 2) & 1) != 0)
497 }
498 #[doc = "Bit 3 - Bus Error Interrupt"]
499 #[inline(always)]
500 pub fn bei(&self) -> BEI_R {
501 BEI_R::new(((self.bits >> 3) & 1) != 0)
502 }
503 #[doc = "Bit 4 - CRC Check Comparison"]
504 #[inline(always)]
505 pub fn cce(&self) -> CCE_R {
506 CCE_R::new(((self.bits >> 4) & 1) != 0)
507 }
508 #[doc = "Bit 5 - Automatic Length Reload"]
509 #[inline(always)]
510 pub fn alr(&self) -> ALR_R {
511 ALR_R::new(((self.bits >> 5) & 1) != 0)
512 }
513 #[doc = "Bit 8 - IR Byte Wise Reflection"]
514 #[inline(always)]
515 pub fn refin(&self) -> REFIN_R {
516 REFIN_R::new(((self.bits >> 8) & 1) != 0)
517 }
518 #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"]
519 #[inline(always)]
520 pub fn refout(&self) -> REFOUT_R {
521 REFOUT_R::new(((self.bits >> 9) & 1) != 0)
522 }
523 #[doc = "Bit 10 - Selects the value to be xored with the final CRC"]
524 #[inline(always)]
525 pub fn xsel(&self) -> XSEL_R {
526 XSEL_R::new(((self.bits >> 10) & 1) != 0)
527 }
528}
529impl W {
530 #[doc = "Bit 0 - CRC Mismatch Interrupt"]
531 #[inline(always)]
532 pub fn cmi(&mut self) -> CMI_W<CFG_SPEC> {
533 CMI_W::new(self, 0)
534 }
535 #[doc = "Bit 1 - Configuration Error Interrupt"]
536 #[inline(always)]
537 pub fn cei(&mut self) -> CEI_W<CFG_SPEC> {
538 CEI_W::new(self, 1)
539 }
540 #[doc = "Bit 2 - Length Error Interrupt"]
541 #[inline(always)]
542 pub fn lei(&mut self) -> LEI_W<CFG_SPEC> {
543 LEI_W::new(self, 2)
544 }
545 #[doc = "Bit 3 - Bus Error Interrupt"]
546 #[inline(always)]
547 pub fn bei(&mut self) -> BEI_W<CFG_SPEC> {
548 BEI_W::new(self, 3)
549 }
550 #[doc = "Bit 4 - CRC Check Comparison"]
551 #[inline(always)]
552 pub fn cce(&mut self) -> CCE_W<CFG_SPEC> {
553 CCE_W::new(self, 4)
554 }
555 #[doc = "Bit 5 - Automatic Length Reload"]
556 #[inline(always)]
557 pub fn alr(&mut self) -> ALR_W<CFG_SPEC> {
558 ALR_W::new(self, 5)
559 }
560 #[doc = "Bit 8 - IR Byte Wise Reflection"]
561 #[inline(always)]
562 pub fn refin(&mut self) -> REFIN_W<CFG_SPEC> {
563 REFIN_W::new(self, 8)
564 }
565 #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"]
566 #[inline(always)]
567 pub fn refout(&mut self) -> REFOUT_W<CFG_SPEC> {
568 REFOUT_W::new(self, 9)
569 }
570 #[doc = "Bit 10 - Selects the value to be xored with the final CRC"]
571 #[inline(always)]
572 pub fn xsel(&mut self) -> XSEL_W<CFG_SPEC> {
573 XSEL_W::new(self, 10)
574 }
575}
576#[doc = "CRC Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
577pub struct CFG_SPEC;
578impl crate::RegisterSpec for CFG_SPEC {
579 type Ux = u32;
580}
581#[doc = "`read()` method returns [`cfg::R`](R) reader structure"]
582impl crate::Readable for CFG_SPEC {}
583#[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"]
584impl crate::Writable for CFG_SPEC {
585 type Safety = crate::Unsafe;
586 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
587 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
588}
589#[doc = "`reset()` method sets CFG to value 0x0700"]
590impl crate::Resettable for CFG_SPEC {
591 const RESET_VALUE: u32 = 0x0700;
592}