1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 diepctl0: DIEPCTL0,
5 _reserved1: [u8; 0x04],
6 diepint0: DIEPINT0,
7 _reserved2: [u8; 0x04],
8 dieptsiz0: DIEPTSIZ0,
9 diepdma0: DIEPDMA0,
10 dtxfsts0: DTXFSTS0,
11 diepdmab0: DIEPDMAB0,
12 _reserved6: [u8; 0x01e0],
13 doepctl0: DOEPCTL0,
14 _reserved7: [u8; 0x04],
15 doepint0: DOEPINT0,
16 _reserved8: [u8; 0x04],
17 doeptsiz0: DOEPTSIZ0,
18 doepdma0: DOEPDMA0,
19 _reserved10: [u8; 0x04],
20 doepdmab0: DOEPDMAB0,
21}
22impl RegisterBlock {
23 #[doc = "0x00 - Device Control IN Endpoint Control Register"]
24 #[inline(always)]
25 pub const fn diepctl0(&self) -> &DIEPCTL0 {
26 &self.diepctl0
27 }
28 #[doc = "0x08 - Device Endpoint Interrupt Register"]
29 #[inline(always)]
30 pub const fn diepint0(&self) -> &DIEPINT0 {
31 &self.diepint0
32 }
33 #[doc = "0x10 - Device IN Endpoint Transfer Size Register"]
34 #[inline(always)]
35 pub const fn dieptsiz0(&self) -> &DIEPTSIZ0 {
36 &self.dieptsiz0
37 }
38 #[doc = "0x14 - Device Endpoint DMA Address Register"]
39 #[inline(always)]
40 pub const fn diepdma0(&self) -> &DIEPDMA0 {
41 &self.diepdma0
42 }
43 #[doc = "0x18 - Device IN Endpoint Transmit FIFO Status Register"]
44 #[inline(always)]
45 pub const fn dtxfsts0(&self) -> &DTXFSTS0 {
46 &self.dtxfsts0
47 }
48 #[doc = "0x1c - Device Endpoint DMA Buffer Address Register"]
49 #[inline(always)]
50 pub const fn diepdmab0(&self) -> &DIEPDMAB0 {
51 &self.diepdmab0
52 }
53 #[doc = "0x200 - Device Control OUT Endpoint Control Register"]
54 #[inline(always)]
55 pub const fn doepctl0(&self) -> &DOEPCTL0 {
56 &self.doepctl0
57 }
58 #[doc = "0x208 - Device Endpoint Interrupt Register"]
59 #[inline(always)]
60 pub const fn doepint0(&self) -> &DOEPINT0 {
61 &self.doepint0
62 }
63 #[doc = "0x210 - Device OUT Endpoint Transfer Size Register"]
64 #[inline(always)]
65 pub const fn doeptsiz0(&self) -> &DOEPTSIZ0 {
66 &self.doeptsiz0
67 }
68 #[doc = "0x214 - Device Endpoint DMA Address Register"]
69 #[inline(always)]
70 pub const fn doepdma0(&self) -> &DOEPDMA0 {
71 &self.doepdma0
72 }
73 #[doc = "0x21c - Device Endpoint DMA Buffer Address Register"]
74 #[inline(always)]
75 pub const fn doepdmab0(&self) -> &DOEPDMAB0 {
76 &self.doepdmab0
77 }
78}
79#[doc = "DIEPCTL0 (rw) register accessor: Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`]
80module"]
81pub type DIEPCTL0 = crate::Reg<diepctl0::DIEPCTL0_SPEC>;
82#[doc = "Device Control IN Endpoint Control Register"]
83pub mod diepctl0;
84#[doc = "DIEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepint0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepint0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint0`]
85module"]
86pub type DIEPINT0 = crate::Reg<diepint0::DIEPINT0_SPEC>;
87#[doc = "Device Endpoint Interrupt Register"]
88pub mod diepint0;
89#[doc = "DIEPTSIZ0 (rw) register accessor: Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dieptsiz0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dieptsiz0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz0`]
90module"]
91pub type DIEPTSIZ0 = crate::Reg<dieptsiz0::DIEPTSIZ0_SPEC>;
92#[doc = "Device IN Endpoint Transfer Size Register"]
93pub mod dieptsiz0;
94#[doc = "DIEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdma0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepdma0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n<div class=\"warning\">One or more dependent resources other than the current register are immediately affected by a read operation.</div>\n\nFor information about available fields see [`mod@diepdma0`]
95module"]
96pub type DIEPDMA0 = crate::Reg<diepdma0::DIEPDMA0_SPEC>;
97#[doc = "Device Endpoint DMA Address Register"]
98pub mod diepdma0;
99#[doc = "DTXFSTS0 (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`dtxfsts0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts0`]
100module"]
101pub type DTXFSTS0 = crate::Reg<dtxfsts0::DTXFSTS0_SPEC>;
102#[doc = "Device IN Endpoint Transmit FIFO Status Register"]
103pub mod dtxfsts0;
104#[doc = "DIEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`diepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab0`]
105module"]
106pub type DIEPDMAB0 = crate::Reg<diepdmab0::DIEPDMAB0_SPEC>;
107#[doc = "Device Endpoint DMA Buffer Address Register"]
108pub mod diepdmab0;
109#[doc = "DOEPCTL0 (rw) register accessor: Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepctl0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepctl0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl0`]
110module"]
111pub type DOEPCTL0 = crate::Reg<doepctl0::DOEPCTL0_SPEC>;
112#[doc = "Device Control OUT Endpoint Control Register"]
113pub mod doepctl0;
114#[doc = "DOEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepint0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepint0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint0`]
115module"]
116pub type DOEPINT0 = crate::Reg<doepint0::DOEPINT0_SPEC>;
117#[doc = "Device Endpoint Interrupt Register"]
118pub mod doepint0;
119#[doc = "DOEPTSIZ0 (rw) register accessor: Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doeptsiz0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doeptsiz0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz0`]
120module"]
121pub type DOEPTSIZ0 = crate::Reg<doeptsiz0::DOEPTSIZ0_SPEC>;
122#[doc = "Device OUT Endpoint Transfer Size Register"]
123pub mod doeptsiz0;
124#[doc = "DOEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdma0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`doepdma0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\n<div class=\"warning\">One or more dependent resources other than the current register are immediately affected by a read operation.</div>\n\nFor information about available fields see [`mod@doepdma0`]
125module"]
126pub type DOEPDMA0 = crate::Reg<doepdma0::DOEPDMA0_SPEC>;
127#[doc = "Device Endpoint DMA Address Register"]
128pub mod doepdma0;
129#[doc = "DOEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::Reg::read) this register and get [`doepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab0`]
130module"]
131pub type DOEPDMAB0 = crate::Reg<doepdmab0::DOEPDMAB0_SPEC>;
132#[doc = "Device Endpoint DMA Buffer Address Register"]
133pub mod doepdmab0;