1#[doc = "Register `DAC1CFG1` reader"]
2pub type R = crate::R<DAC1CFG1_SPEC>;
3#[doc = "Register `DAC1CFG1` writer"]
4pub type W = crate::W<DAC1CFG1_SPEC>;
5#[doc = "Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum SCALE_A {
9 #[doc = "0: no shift = multiplication/division by 1"]
10 VALUE1 = 0,
11 #[doc = "1: shift by 1 = multiplication/division by 2"]
12 VALUE2 = 1,
13 #[doc = "2: shift by 2 = multiplication/division by 4"]
14 VALUE3 = 2,
15 #[doc = "3: shift left by 3 = multiplication/division by 8"]
16 VALUE4 = 3,
17 #[doc = "4: shift left by 4 = multiplication/division by 16"]
18 VALUE5 = 4,
19 #[doc = "5: shift left by 5 = multiplication/division by 32"]
20 VALUE6 = 5,
21 #[doc = "6: shift left by 6 = multiplication/division by 64"]
22 VALUE7 = 6,
23 #[doc = "7: shift left by 7 = multiplication/division by 128"]
24 VALUE8 = 7,
25}
26impl From<SCALE_A> for u8 {
27 #[inline(always)]
28 fn from(variant: SCALE_A) -> Self {
29 variant as _
30 }
31}
32impl crate::FieldSpec for SCALE_A {
33 type Ux = u8;
34}
35impl crate::IsEnum for SCALE_A {}
36#[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"]
37pub type SCALE_R = crate::FieldReader<SCALE_A>;
38impl SCALE_R {
39 #[doc = "Get enumerated values variant"]
40 #[inline(always)]
41 pub const fn variant(&self) -> SCALE_A {
42 match self.bits {
43 0 => SCALE_A::VALUE1,
44 1 => SCALE_A::VALUE2,
45 2 => SCALE_A::VALUE3,
46 3 => SCALE_A::VALUE4,
47 4 => SCALE_A::VALUE5,
48 5 => SCALE_A::VALUE6,
49 6 => SCALE_A::VALUE7,
50 7 => SCALE_A::VALUE8,
51 _ => unreachable!(),
52 }
53 }
54 #[doc = "no shift = multiplication/division by 1"]
55 #[inline(always)]
56 pub fn is_value1(&self) -> bool {
57 *self == SCALE_A::VALUE1
58 }
59 #[doc = "shift by 1 = multiplication/division by 2"]
60 #[inline(always)]
61 pub fn is_value2(&self) -> bool {
62 *self == SCALE_A::VALUE2
63 }
64 #[doc = "shift by 2 = multiplication/division by 4"]
65 #[inline(always)]
66 pub fn is_value3(&self) -> bool {
67 *self == SCALE_A::VALUE3
68 }
69 #[doc = "shift left by 3 = multiplication/division by 8"]
70 #[inline(always)]
71 pub fn is_value4(&self) -> bool {
72 *self == SCALE_A::VALUE4
73 }
74 #[doc = "shift left by 4 = multiplication/division by 16"]
75 #[inline(always)]
76 pub fn is_value5(&self) -> bool {
77 *self == SCALE_A::VALUE5
78 }
79 #[doc = "shift left by 5 = multiplication/division by 32"]
80 #[inline(always)]
81 pub fn is_value6(&self) -> bool {
82 *self == SCALE_A::VALUE6
83 }
84 #[doc = "shift left by 6 = multiplication/division by 64"]
85 #[inline(always)]
86 pub fn is_value7(&self) -> bool {
87 *self == SCALE_A::VALUE7
88 }
89 #[doc = "shift left by 7 = multiplication/division by 128"]
90 #[inline(always)]
91 pub fn is_value8(&self) -> bool {
92 *self == SCALE_A::VALUE8
93 }
94}
95#[doc = "Field `SCALE` writer - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"]
96pub type SCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SCALE_A, crate::Safe>;
97impl<'a, REG> SCALE_W<'a, REG>
98where
99 REG: crate::Writable + crate::RegisterSpec,
100 REG::Ux: From<u8>,
101{
102 #[doc = "no shift = multiplication/division by 1"]
103 #[inline(always)]
104 pub fn value1(self) -> &'a mut crate::W<REG> {
105 self.variant(SCALE_A::VALUE1)
106 }
107 #[doc = "shift by 1 = multiplication/division by 2"]
108 #[inline(always)]
109 pub fn value2(self) -> &'a mut crate::W<REG> {
110 self.variant(SCALE_A::VALUE2)
111 }
112 #[doc = "shift by 2 = multiplication/division by 4"]
113 #[inline(always)]
114 pub fn value3(self) -> &'a mut crate::W<REG> {
115 self.variant(SCALE_A::VALUE3)
116 }
117 #[doc = "shift left by 3 = multiplication/division by 8"]
118 #[inline(always)]
119 pub fn value4(self) -> &'a mut crate::W<REG> {
120 self.variant(SCALE_A::VALUE4)
121 }
122 #[doc = "shift left by 4 = multiplication/division by 16"]
123 #[inline(always)]
124 pub fn value5(self) -> &'a mut crate::W<REG> {
125 self.variant(SCALE_A::VALUE5)
126 }
127 #[doc = "shift left by 5 = multiplication/division by 32"]
128 #[inline(always)]
129 pub fn value6(self) -> &'a mut crate::W<REG> {
130 self.variant(SCALE_A::VALUE6)
131 }
132 #[doc = "shift left by 6 = multiplication/division by 64"]
133 #[inline(always)]
134 pub fn value7(self) -> &'a mut crate::W<REG> {
135 self.variant(SCALE_A::VALUE7)
136 }
137 #[doc = "shift left by 7 = multiplication/division by 128"]
138 #[inline(always)]
139 pub fn value8(self) -> &'a mut crate::W<REG> {
140 self.variant(SCALE_A::VALUE8)
141 }
142}
143#[doc = "Switch between up- and downscale of the DAC1 input data values\n\nValue on reset: 0"]
144#[derive(Clone, Copy, Debug, PartialEq, Eq)]
145pub enum MULDIV_A {
146 #[doc = "0: downscale = division (shift SCALE positions to the right)"]
147 VALUE1 = 0,
148 #[doc = "1: upscale = multiplication (shift SCALE positions to the left)"]
149 VALUE2 = 1,
150}
151impl From<MULDIV_A> for bool {
152 #[inline(always)]
153 fn from(variant: MULDIV_A) -> Self {
154 variant as u8 != 0
155 }
156}
157#[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC1 input data values"]
158pub type MULDIV_R = crate::BitReader<MULDIV_A>;
159impl MULDIV_R {
160 #[doc = "Get enumerated values variant"]
161 #[inline(always)]
162 pub const fn variant(&self) -> MULDIV_A {
163 match self.bits {
164 false => MULDIV_A::VALUE1,
165 true => MULDIV_A::VALUE2,
166 }
167 }
168 #[doc = "downscale = division (shift SCALE positions to the right)"]
169 #[inline(always)]
170 pub fn is_value1(&self) -> bool {
171 *self == MULDIV_A::VALUE1
172 }
173 #[doc = "upscale = multiplication (shift SCALE positions to the left)"]
174 #[inline(always)]
175 pub fn is_value2(&self) -> bool {
176 *self == MULDIV_A::VALUE2
177 }
178}
179#[doc = "Field `MULDIV` writer - Switch between up- and downscale of the DAC1 input data values"]
180pub type MULDIV_W<'a, REG> = crate::BitWriter<'a, REG, MULDIV_A>;
181impl<'a, REG> MULDIV_W<'a, REG>
182where
183 REG: crate::Writable + crate::RegisterSpec,
184{
185 #[doc = "downscale = division (shift SCALE positions to the right)"]
186 #[inline(always)]
187 pub fn value1(self) -> &'a mut crate::W<REG> {
188 self.variant(MULDIV_A::VALUE1)
189 }
190 #[doc = "upscale = multiplication (shift SCALE positions to the left)"]
191 #[inline(always)]
192 pub fn value2(self) -> &'a mut crate::W<REG> {
193 self.variant(MULDIV_A::VALUE2)
194 }
195}
196#[doc = "Field `OFFS` reader - 8-bit offset value addition"]
197pub type OFFS_R = crate::FieldReader;
198#[doc = "Field `OFFS` writer - 8-bit offset value addition"]
199pub type OFFS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
200#[doc = "Field `TRIGSEL` reader - Selects one of the eight external trigger sources for DAC1"]
201pub type TRIGSEL_R = crate::FieldReader;
202#[doc = "Field `TRIGSEL` writer - Selects one of the eight external trigger sources for DAC1"]
203pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
204#[doc = "Field `SWTRIG` reader - Software Trigger"]
205pub type SWTRIG_R = crate::BitReader;
206#[doc = "Field `SWTRIG` writer - Software Trigger"]
207pub type SWTRIG_W<'a, REG> = crate::BitWriter<'a, REG>;
208#[doc = "Select the trigger source for channel 1\n\nValue on reset: 0"]
209#[derive(Clone, Copy, Debug, PartialEq, Eq)]
210#[repr(u8)]
211pub enum TRIGMOD_A {
212 #[doc = "0: internal Trigger (integer divided clock - see FREQ parameter)"]
213 VALUE1 = 0,
214 #[doc = "1: external Trigger (preselected trigger by TRIGSEL parameter)"]
215 VALUE2 = 1,
216 #[doc = "2: software Trigger (see SWTRIG parameter)"]
217 VALUE3 = 2,
218}
219impl From<TRIGMOD_A> for u8 {
220 #[inline(always)]
221 fn from(variant: TRIGMOD_A) -> Self {
222 variant as _
223 }
224}
225impl crate::FieldSpec for TRIGMOD_A {
226 type Ux = u8;
227}
228impl crate::IsEnum for TRIGMOD_A {}
229#[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 1"]
230pub type TRIGMOD_R = crate::FieldReader<TRIGMOD_A>;
231impl TRIGMOD_R {
232 #[doc = "Get enumerated values variant"]
233 #[inline(always)]
234 pub const fn variant(&self) -> Option<TRIGMOD_A> {
235 match self.bits {
236 0 => Some(TRIGMOD_A::VALUE1),
237 1 => Some(TRIGMOD_A::VALUE2),
238 2 => Some(TRIGMOD_A::VALUE3),
239 _ => None,
240 }
241 }
242 #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"]
243 #[inline(always)]
244 pub fn is_value1(&self) -> bool {
245 *self == TRIGMOD_A::VALUE1
246 }
247 #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"]
248 #[inline(always)]
249 pub fn is_value2(&self) -> bool {
250 *self == TRIGMOD_A::VALUE2
251 }
252 #[doc = "software Trigger (see SWTRIG parameter)"]
253 #[inline(always)]
254 pub fn is_value3(&self) -> bool {
255 *self == TRIGMOD_A::VALUE3
256 }
257}
258#[doc = "Field `TRIGMOD` writer - Select the trigger source for channel 1"]
259pub type TRIGMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRIGMOD_A>;
260impl<'a, REG> TRIGMOD_W<'a, REG>
261where
262 REG: crate::Writable + crate::RegisterSpec,
263 REG::Ux: From<u8>,
264{
265 #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"]
266 #[inline(always)]
267 pub fn value1(self) -> &'a mut crate::W<REG> {
268 self.variant(TRIGMOD_A::VALUE1)
269 }
270 #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"]
271 #[inline(always)]
272 pub fn value2(self) -> &'a mut crate::W<REG> {
273 self.variant(TRIGMOD_A::VALUE2)
274 }
275 #[doc = "software Trigger (see SWTRIG parameter)"]
276 #[inline(always)]
277 pub fn value3(self) -> &'a mut crate::W<REG> {
278 self.variant(TRIGMOD_A::VALUE3)
279 }
280}
281#[doc = "Field `ANACFG` reader - DAC1 analog configuration/calibration parameters"]
282pub type ANACFG_R = crate::FieldReader;
283#[doc = "Field `ANACFG` writer - DAC1 analog configuration/calibration parameters"]
284pub type ANACFG_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
285#[doc = "Enable analog DAC for channel 1\n\nValue on reset: 0"]
286#[derive(Clone, Copy, Debug, PartialEq, Eq)]
287pub enum ANAEN_A {
288 #[doc = "0: DAC1 is set to standby (analog output only)"]
289 VALUE1 = 0,
290 #[doc = "1: enable DAC1 (analog output only)"]
291 VALUE2 = 1,
292}
293impl From<ANAEN_A> for bool {
294 #[inline(always)]
295 fn from(variant: ANAEN_A) -> Self {
296 variant as u8 != 0
297 }
298}
299#[doc = "Field `ANAEN` reader - Enable analog DAC for channel 1"]
300pub type ANAEN_R = crate::BitReader<ANAEN_A>;
301impl ANAEN_R {
302 #[doc = "Get enumerated values variant"]
303 #[inline(always)]
304 pub const fn variant(&self) -> ANAEN_A {
305 match self.bits {
306 false => ANAEN_A::VALUE1,
307 true => ANAEN_A::VALUE2,
308 }
309 }
310 #[doc = "DAC1 is set to standby (analog output only)"]
311 #[inline(always)]
312 pub fn is_value1(&self) -> bool {
313 *self == ANAEN_A::VALUE1
314 }
315 #[doc = "enable DAC1 (analog output only)"]
316 #[inline(always)]
317 pub fn is_value2(&self) -> bool {
318 *self == ANAEN_A::VALUE2
319 }
320}
321#[doc = "Field `ANAEN` writer - Enable analog DAC for channel 1"]
322pub type ANAEN_W<'a, REG> = crate::BitWriter<'a, REG, ANAEN_A>;
323impl<'a, REG> ANAEN_W<'a, REG>
324where
325 REG: crate::Writable + crate::RegisterSpec,
326{
327 #[doc = "DAC1 is set to standby (analog output only)"]
328 #[inline(always)]
329 pub fn value1(self) -> &'a mut crate::W<REG> {
330 self.variant(ANAEN_A::VALUE1)
331 }
332 #[doc = "enable DAC1 (analog output only)"]
333 #[inline(always)]
334 pub fn value2(self) -> &'a mut crate::W<REG> {
335 self.variant(ANAEN_A::VALUE2)
336 }
337}
338#[doc = "Field `REFCFGH` reader - Higher 4 band-gap configuration/calibration parameters"]
339pub type REFCFGH_R = crate::FieldReader;
340#[doc = "Field `REFCFGH` writer - Higher 4 band-gap configuration/calibration parameters"]
341pub type REFCFGH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
342impl R {
343 #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"]
344 #[inline(always)]
345 pub fn scale(&self) -> SCALE_R {
346 SCALE_R::new((self.bits & 7) as u8)
347 }
348 #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"]
349 #[inline(always)]
350 pub fn muldiv(&self) -> MULDIV_R {
351 MULDIV_R::new(((self.bits >> 3) & 1) != 0)
352 }
353 #[doc = "Bits 4:11 - 8-bit offset value addition"]
354 #[inline(always)]
355 pub fn offs(&self) -> OFFS_R {
356 OFFS_R::new(((self.bits >> 4) & 0xff) as u8)
357 }
358 #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"]
359 #[inline(always)]
360 pub fn trigsel(&self) -> TRIGSEL_R {
361 TRIGSEL_R::new(((self.bits >> 12) & 7) as u8)
362 }
363 #[doc = "Bit 16 - Software Trigger"]
364 #[inline(always)]
365 pub fn swtrig(&self) -> SWTRIG_R {
366 SWTRIG_R::new(((self.bits >> 16) & 1) != 0)
367 }
368 #[doc = "Bits 17:18 - Select the trigger source for channel 1"]
369 #[inline(always)]
370 pub fn trigmod(&self) -> TRIGMOD_R {
371 TRIGMOD_R::new(((self.bits >> 17) & 3) as u8)
372 }
373 #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"]
374 #[inline(always)]
375 pub fn anacfg(&self) -> ANACFG_R {
376 ANACFG_R::new(((self.bits >> 19) & 0x1f) as u8)
377 }
378 #[doc = "Bit 24 - Enable analog DAC for channel 1"]
379 #[inline(always)]
380 pub fn anaen(&self) -> ANAEN_R {
381 ANAEN_R::new(((self.bits >> 24) & 1) != 0)
382 }
383 #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"]
384 #[inline(always)]
385 pub fn refcfgh(&self) -> REFCFGH_R {
386 REFCFGH_R::new(((self.bits >> 28) & 0x0f) as u8)
387 }
388}
389impl W {
390 #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"]
391 #[inline(always)]
392 pub fn scale(&mut self) -> SCALE_W<DAC1CFG1_SPEC> {
393 SCALE_W::new(self, 0)
394 }
395 #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"]
396 #[inline(always)]
397 pub fn muldiv(&mut self) -> MULDIV_W<DAC1CFG1_SPEC> {
398 MULDIV_W::new(self, 3)
399 }
400 #[doc = "Bits 4:11 - 8-bit offset value addition"]
401 #[inline(always)]
402 pub fn offs(&mut self) -> OFFS_W<DAC1CFG1_SPEC> {
403 OFFS_W::new(self, 4)
404 }
405 #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"]
406 #[inline(always)]
407 pub fn trigsel(&mut self) -> TRIGSEL_W<DAC1CFG1_SPEC> {
408 TRIGSEL_W::new(self, 12)
409 }
410 #[doc = "Bit 16 - Software Trigger"]
411 #[inline(always)]
412 pub fn swtrig(&mut self) -> SWTRIG_W<DAC1CFG1_SPEC> {
413 SWTRIG_W::new(self, 16)
414 }
415 #[doc = "Bits 17:18 - Select the trigger source for channel 1"]
416 #[inline(always)]
417 pub fn trigmod(&mut self) -> TRIGMOD_W<DAC1CFG1_SPEC> {
418 TRIGMOD_W::new(self, 17)
419 }
420 #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"]
421 #[inline(always)]
422 pub fn anacfg(&mut self) -> ANACFG_W<DAC1CFG1_SPEC> {
423 ANACFG_W::new(self, 19)
424 }
425 #[doc = "Bit 24 - Enable analog DAC for channel 1"]
426 #[inline(always)]
427 pub fn anaen(&mut self) -> ANAEN_W<DAC1CFG1_SPEC> {
428 ANAEN_W::new(self, 24)
429 }
430 #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"]
431 #[inline(always)]
432 pub fn refcfgh(&mut self) -> REFCFGH_W<DAC1CFG1_SPEC> {
433 REFCFGH_W::new(self, 28)
434 }
435}
436#[doc = "DAC1 Configuration Register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`dac1cfg1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac1cfg1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
437pub struct DAC1CFG1_SPEC;
438impl crate::RegisterSpec for DAC1CFG1_SPEC {
439 type Ux = u32;
440}
441#[doc = "`read()` method returns [`dac1cfg1::R`](R) reader structure"]
442impl crate::Readable for DAC1CFG1_SPEC {}
443#[doc = "`write(|w| ..)` method takes [`dac1cfg1::W`](W) writer structure"]
444impl crate::Writable for DAC1CFG1_SPEC {
445 type Safety = crate::Unsafe;
446 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
447 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
448}
449#[doc = "`reset()` method sets DAC1CFG1 to value 0"]
450impl crate::Resettable for DAC1CFG1_SPEC {
451 const RESET_VALUE: u32 = 0;
452}