1#[doc = "Register `MOIPR` reader"]
2pub type R = crate::R<MOIPR_SPEC>;
3#[doc = "Register `MOIPR` writer"]
4pub type W = crate::W<MOIPR_SPEC>;
5#[doc = "Receive Interrupt Node Pointer\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum RXINP_A {
9 #[doc = "0: Interrupt output line INT_O0 is selected."]
10 VALUE1 = 0,
11 #[doc = "1: Interrupt output line INT_O1 is selected."]
12 VALUE2 = 1,
13 #[doc = "7: Interrupt output line INT_O7 is selected."]
14 VALUE3 = 7,
15}
16impl From<RXINP_A> for u8 {
17 #[inline(always)]
18 fn from(variant: RXINP_A) -> Self {
19 variant as _
20 }
21}
22impl crate::FieldSpec for RXINP_A {
23 type Ux = u8;
24}
25impl crate::IsEnum for RXINP_A {}
26#[doc = "Field `RXINP` reader - Receive Interrupt Node Pointer"]
27pub type RXINP_R = crate::FieldReader<RXINP_A>;
28impl RXINP_R {
29 #[doc = "Get enumerated values variant"]
30 #[inline(always)]
31 pub const fn variant(&self) -> Option<RXINP_A> {
32 match self.bits {
33 0 => Some(RXINP_A::VALUE1),
34 1 => Some(RXINP_A::VALUE2),
35 7 => Some(RXINP_A::VALUE3),
36 _ => None,
37 }
38 }
39 #[doc = "Interrupt output line INT_O0 is selected."]
40 #[inline(always)]
41 pub fn is_value1(&self) -> bool {
42 *self == RXINP_A::VALUE1
43 }
44 #[doc = "Interrupt output line INT_O1 is selected."]
45 #[inline(always)]
46 pub fn is_value2(&self) -> bool {
47 *self == RXINP_A::VALUE2
48 }
49 #[doc = "Interrupt output line INT_O7 is selected."]
50 #[inline(always)]
51 pub fn is_value3(&self) -> bool {
52 *self == RXINP_A::VALUE3
53 }
54}
55#[doc = "Field `RXINP` writer - Receive Interrupt Node Pointer"]
56pub type RXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RXINP_A>;
57impl<'a, REG> RXINP_W<'a, REG>
58where
59 REG: crate::Writable + crate::RegisterSpec,
60 REG::Ux: From<u8>,
61{
62 #[doc = "Interrupt output line INT_O0 is selected."]
63 #[inline(always)]
64 pub fn value1(self) -> &'a mut crate::W<REG> {
65 self.variant(RXINP_A::VALUE1)
66 }
67 #[doc = "Interrupt output line INT_O1 is selected."]
68 #[inline(always)]
69 pub fn value2(self) -> &'a mut crate::W<REG> {
70 self.variant(RXINP_A::VALUE2)
71 }
72 #[doc = "Interrupt output line INT_O7 is selected."]
73 #[inline(always)]
74 pub fn value3(self) -> &'a mut crate::W<REG> {
75 self.variant(RXINP_A::VALUE3)
76 }
77}
78#[doc = "Transmit Interrupt Node Pointer\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80#[repr(u8)]
81pub enum TXINP_A {
82 #[doc = "0: Interrupt output line INT_O0 is selected."]
83 VALUE1 = 0,
84 #[doc = "1: Interrupt output line INT_O1 is selected."]
85 VALUE2 = 1,
86 #[doc = "7: Interrupt output line INT_O7 is selected."]
87 VALUE3 = 7,
88}
89impl From<TXINP_A> for u8 {
90 #[inline(always)]
91 fn from(variant: TXINP_A) -> Self {
92 variant as _
93 }
94}
95impl crate::FieldSpec for TXINP_A {
96 type Ux = u8;
97}
98impl crate::IsEnum for TXINP_A {}
99#[doc = "Field `TXINP` reader - Transmit Interrupt Node Pointer"]
100pub type TXINP_R = crate::FieldReader<TXINP_A>;
101impl TXINP_R {
102 #[doc = "Get enumerated values variant"]
103 #[inline(always)]
104 pub const fn variant(&self) -> Option<TXINP_A> {
105 match self.bits {
106 0 => Some(TXINP_A::VALUE1),
107 1 => Some(TXINP_A::VALUE2),
108 7 => Some(TXINP_A::VALUE3),
109 _ => None,
110 }
111 }
112 #[doc = "Interrupt output line INT_O0 is selected."]
113 #[inline(always)]
114 pub fn is_value1(&self) -> bool {
115 *self == TXINP_A::VALUE1
116 }
117 #[doc = "Interrupt output line INT_O1 is selected."]
118 #[inline(always)]
119 pub fn is_value2(&self) -> bool {
120 *self == TXINP_A::VALUE2
121 }
122 #[doc = "Interrupt output line INT_O7 is selected."]
123 #[inline(always)]
124 pub fn is_value3(&self) -> bool {
125 *self == TXINP_A::VALUE3
126 }
127}
128#[doc = "Field `TXINP` writer - Transmit Interrupt Node Pointer"]
129pub type TXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TXINP_A>;
130impl<'a, REG> TXINP_W<'a, REG>
131where
132 REG: crate::Writable + crate::RegisterSpec,
133 REG::Ux: From<u8>,
134{
135 #[doc = "Interrupt output line INT_O0 is selected."]
136 #[inline(always)]
137 pub fn value1(self) -> &'a mut crate::W<REG> {
138 self.variant(TXINP_A::VALUE1)
139 }
140 #[doc = "Interrupt output line INT_O1 is selected."]
141 #[inline(always)]
142 pub fn value2(self) -> &'a mut crate::W<REG> {
143 self.variant(TXINP_A::VALUE2)
144 }
145 #[doc = "Interrupt output line INT_O7 is selected."]
146 #[inline(always)]
147 pub fn value3(self) -> &'a mut crate::W<REG> {
148 self.variant(TXINP_A::VALUE3)
149 }
150}
151#[doc = "Field `MPN` reader - Message Pending Number"]
152pub type MPN_R = crate::FieldReader;
153#[doc = "Field `MPN` writer - Message Pending Number"]
154pub type MPN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
155#[doc = "Field `CFCVAL` reader - CAN Frame Counter Value"]
156pub type CFCVAL_R = crate::FieldReader<u16>;
157#[doc = "Field `CFCVAL` writer - CAN Frame Counter Value"]
158pub type CFCVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
159impl R {
160 #[doc = "Bits 0:2 - Receive Interrupt Node Pointer"]
161 #[inline(always)]
162 pub fn rxinp(&self) -> RXINP_R {
163 RXINP_R::new((self.bits & 7) as u8)
164 }
165 #[doc = "Bits 4:6 - Transmit Interrupt Node Pointer"]
166 #[inline(always)]
167 pub fn txinp(&self) -> TXINP_R {
168 TXINP_R::new(((self.bits >> 4) & 7) as u8)
169 }
170 #[doc = "Bits 8:15 - Message Pending Number"]
171 #[inline(always)]
172 pub fn mpn(&self) -> MPN_R {
173 MPN_R::new(((self.bits >> 8) & 0xff) as u8)
174 }
175 #[doc = "Bits 16:31 - CAN Frame Counter Value"]
176 #[inline(always)]
177 pub fn cfcval(&self) -> CFCVAL_R {
178 CFCVAL_R::new(((self.bits >> 16) & 0xffff) as u16)
179 }
180}
181impl W {
182 #[doc = "Bits 0:2 - Receive Interrupt Node Pointer"]
183 #[inline(always)]
184 pub fn rxinp(&mut self) -> RXINP_W<MOIPR_SPEC> {
185 RXINP_W::new(self, 0)
186 }
187 #[doc = "Bits 4:6 - Transmit Interrupt Node Pointer"]
188 #[inline(always)]
189 pub fn txinp(&mut self) -> TXINP_W<MOIPR_SPEC> {
190 TXINP_W::new(self, 4)
191 }
192 #[doc = "Bits 8:15 - Message Pending Number"]
193 #[inline(always)]
194 pub fn mpn(&mut self) -> MPN_W<MOIPR_SPEC> {
195 MPN_W::new(self, 8)
196 }
197 #[doc = "Bits 16:31 - CAN Frame Counter Value"]
198 #[inline(always)]
199 pub fn cfcval(&mut self) -> CFCVAL_W<MOIPR_SPEC> {
200 CFCVAL_W::new(self, 16)
201 }
202}
203#[doc = "Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::Reg::read) this register and get [`moipr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`moipr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
204pub struct MOIPR_SPEC;
205impl crate::RegisterSpec for MOIPR_SPEC {
206 type Ux = u32;
207}
208#[doc = "`read()` method returns [`moipr::R`](R) reader structure"]
209impl crate::Readable for MOIPR_SPEC {}
210#[doc = "`write(|w| ..)` method takes [`moipr::W`](W) writer structure"]
211impl crate::Writable for MOIPR_SPEC {
212 type Safety = crate::Unsafe;
213 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
214 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
215}
216#[doc = "`reset()` method sets MOIPR to value 0"]
217impl crate::Resettable for MOIPR_SPEC {
218 const RESET_VALUE: u32 = 0;
219}