Constant x86::msr::MSR_IFSB_CNTR7
source · [−]pub const MSR_IFSB_CNTR7: u32 = 0x107d3;
Expand description
IFSB Latency Event Counter Register (R/W) See Section 18.17, Performance Monitoring on 64-bit Intel Xeon Processor MP with Up to 8-MByte L3 Cache.