x64asm/instruction/
register.rs

1// This file is part of "x64asm"
2// Under the MIT License
3// Copyright (c) 2023 Antonin Hérault
4
5/// Creates an `Operand::Register`.
6#[macro_export]
7macro_rules! register {
8    ($register:expr) => {
9        instruction::Operand::Register($register)
10    }
11}
12
13/// Creates an `Operand::Indirect`.
14#[macro_export]
15macro_rules! indirect_register {
16    ($register:expr) => {
17        instruction::Operand::Indirect($register)
18    }
19}
20
21/// 8 to 64 bits registers
22#[derive(Debug, Clone, PartialEq, Eq)]
23pub enum Register {
24    // 64 bits
25    Rax,
26    Rbx,
27    Rcx,
28    Rdx,
29    Rsi,
30    Rdi,
31    Rbp,
32    Rsp,
33    R8,
34    R9,
35    R10,
36    R11,
37    R12,
38    R13,
39    R14,
40    R15,
41
42    // 32 bits
43    Eax,
44    Ebx,
45    Ecx,
46    Edx,
47    Esi,
48    Edi,
49    Ebp,
50    Esp,
51    R8d,
52    R9d,
53    R10d,
54    R11d,
55    R12d,
56    R13d,
57    R14d,
58    R15d,
59
60    // 16 bits
61    Ax,
62    Bx,
63    Cx,
64    Dx,
65    Si,
66    Di,
67    Bp,
68    Sp,
69    R8w,
70    R9w,
71    R10w,
72    R11w,
73    R12w,
74    R13w,
75    R14w,
76    R15w,
77
78    // 8 bits
79    Al,
80    Bl,
81    Cl,
82    Dl,
83    Sil,
84    Dil,
85    Bpl,
86    Spl,
87    R8b,
88    R9b,
89    R10b,
90    R11b,
91    R12b,
92    R13b,
93    R14b,
94    R15b
95}
96
97/// Convert the enum object identifier to a string as lowercase.
98impl ToString for Register {
99    fn to_string(&self) -> String {
100        format!("{:?}", self).to_lowercase()
101    }
102}
x64asm/instruction/register.rs

x64asm/instruction/
register.rs
