whpx 0.1.0

// Windows Hypervisor Platform Definitions

use core::ops::{BitAnd, BitAndAssign, BitOr, BitOrAssign, BitXor, BitXorAssign};

use bitfield_struct::bitfield;

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvRegisterName(u32);

#[cfg(target_arch="x86_64")]
impl WHvRegisterName
{
	// X64 General Purpose Registers
	pub const X64_RAX:Self=Self(0x00000000);
	pub const X64_RCX:Self=Self(0x00000001);
	pub const X64_RDX:Self=Self(0x00000002);
	pub const X64_RBX:Self=Self(0x00000003);
	pub const X64_RSP:Self=Self(0x00000004);
	pub const X64_RBP:Self=Self(0x00000005);
	pub const X64_RSI:Self=Self(0x00000006);
	pub const X64_RDI:Self=Self(0x00000007);
	pub const X64_R8:Self=Self(0x00000008);
	pub const X64_R9:Self=Self(0x00000009);
	pub const X64_R10:Self=Self(0x0000000A);
	pub const X64_R11:Self=Self(0x0000000B);
	pub const X64_R12:Self=Self(0x0000000C);
	pub const X64_R13:Self=Self(0x0000000D);
	pub const X64_R14:Self=Self(0x0000000E);
	pub const X64_R15:Self=Self(0x0000000F);
	pub const X64_RIP:Self=Self(0x00000010);
	pub const X64_RFLAGS:Self=Self(0x00000011);

	// X64 Segment Registers
	pub const X64_ES:Self=Self(0x00000012);
	pub const X64_CS:Self=Self(0x00000013);
	pub const X64_SS:Self=Self(0x00000014);
	pub const X64_DS:Self=Self(0x00000015);
	pub const X64_FS:Self=Self(0x00000016);
	pub const X64_GS:Self=Self(0x00000017);
	pub const X64_LDTR:Self=Self(0x00000018);
	pub const X64_TR:Self=Self(0x00000019);

	// X64 Table Registers
	pub const X64_IDTR:Self=Self(0x0000001A);
	pub const X64_GDTR:Self=Self(0x0000001B);

	// X64 Control Registers
	pub const X64_CR0:Self=Self(0x0000001C);
	pub const X64_CR2:Self=Self(0x0000001D);
	pub const X64_CR3:Self=Self(0x0000001E);
	pub const X64_CR4:Self=Self(0x0000001F);
	pub const X64_CR8:Self=Self(0x00000020);
	
	// X64 Debug Registers
	pub const X64_DR0:Self=Self(0x00000021);
	pub const X64_DR1:Self=Self(0x00000022);
	pub const X64_DR2:Self=Self(0x00000023);
	pub const X64_DR3:Self=Self(0x00000024);
	pub const X64_DR6:Self=Self(0x00000025);
	pub const X64_DR7:Self=Self(0x00000026);

	// X64 Extended Control Registers
	pub const X64_XCR0:Self=Self(0x00000027);

	// X64 Virtual Control Registers
	pub const X64_V_CR0:Self=Self(0x00000028);
	pub const X64_V_CR3:Self=Self(0x00000029);
	pub const X64_V_CR4:Self=Self(0x0000002A);
	pub const X64_V_CR8:Self=Self(0x0000002B);

	// X64 Floating Point and SIMD Registers
	pub const X64_XMM0:Self=Self(0x00001000);
	pub const X64_XMM1:Self=Self(0x00001001);
	pub const X64_XMM2:Self=Self(0x00001002);
	pub const X64_XMM3:Self=Self(0x00001003);
	pub const X64_XMM4:Self=Self(0x00001004);
	pub const X64_XMM5:Self=Self(0x00001005);
	pub const X64_XMM6:Self=Self(0x00001006);
	pub const X64_XMM7:Self=Self(0x00001007);
	pub const X64_XMM8:Self=Self(0x00001008);
	pub const X64_XMM9:Self=Self(0x00001009);
	pub const X64_XMM10:Self=Self(0x0000100A);
	pub const X64_XMM11:Self=Self(0x0000100B);
	pub const X64_XMM12:Self=Self(0x0000100C);
	pub const X64_XMM13:Self=Self(0x0000100D);
	pub const X64_XMM14:Self=Self(0x0000100E);
	pub const X64_XMM15:Self=Self(0x0000100F);
	pub const X64_FP_MMX0:Self=Self(0x00001010);
	pub const X64_FP_MMX1:Self=Self(0x00001011);
	pub const X64_FP_MMX2:Self=Self(0x00001012);
	pub const X64_FP_MMX3:Self=Self(0x00001013);
	pub const X64_FP_MMX4:Self=Self(0x00001014);
	pub const X64_FP_MMX5:Self=Self(0x00001015);
	pub const X64_FP_MMX6:Self=Self(0x00001016);
	pub const X64_FP_MMX7:Self=Self(0x00001017);
	pub const X64_FP_CONTROL_STATUS:Self=Self(0x00001018);
	pub const X64_XMM_CONTROL_STATUS:Self=Self(0x00001019);

	// X64 Model Specific Registers
	pub const X64_TSC:Self=Self(0x00002000);
	pub const X64_EFER:Self=Self(0x00002001);
	pub const X64_KERNEL_GS_BASE:Self=Self(0x00002002);
	pub const X64_APIC_BASE:Self=Self(0x00002003);
	pub const X64_PAT:Self=Self(0x00002004);
	pub const X64_SYSENTER_CS:Self=Self(0x00002005);
	pub const X64_SYSENTER_EIP:Self=Self(0x00002006);
	pub const X64_SYSENTER_ESP:Self=Self(0x00002007);
	pub const X64_STAR:Self=Self(0x00002008);
	pub const X64_LSTAR:Self=Self(0x00002009);
	pub const X64_CSTAR:Self=Self(0x0000200A);
	pub const X64_SF_MASK:Self=Self(0x0000200B);
	pub const X64_INITIAL_APIC_ID:Self=Self(0x0000200C);

	pub const X64_MTRR_CAP:Self=Self(0x0000200D);
	pub const X64_MTRR_DEF_TYPE:Self=Self(0x0000200E);

	pub const X64_MTRR_PHYSBASE0:Self=Self(0x00002010);
	pub const X64_MTRR_PHYSBASE1:Self=Self(0x00002011);
	pub const X64_MTRR_PHYSBASE2:Self=Self(0x00002012);
	pub const X64_MTRR_PHYSBASE3:Self=Self(0x00002013);
	pub const X64_MTRR_PHYSBASE4:Self=Self(0x00002014);
	pub const X64_MTRR_PHYSBASE5:Self=Self(0x00002015);
	pub const X64_MTRR_PHYSBASE6:Self=Self(0x00002016);
	pub const X64_MTRR_PHYSBASE7:Self=Self(0x00002017);
	pub const X64_MTRR_PHYSBASE8:Self=Self(0x00002018);
	pub const X64_MTRR_PHYSBASE9:Self=Self(0x00002019);
	pub const X64_MTRR_PHYSBASEA:Self=Self(0x0000201A);
	pub const X64_MTRR_PHYSBASEB:Self=Self(0x0000201B);
	pub const X64_MTRR_PHYSBASEC:Self=Self(0x0000201C);
	pub const X64_MTRR_PHYSBASED:Self=Self(0x0000201D);
	pub const X64_MTRR_PHYSBASEE:Self=Self(0x0000201E);
	pub const X64_MTRR_PHYSBASEF:Self=Self(0x0000201F);

	pub const X64_MTRR_PHYSMASK0:Self=Self(0x00002040);
	pub const X64_MTRR_PHYSMASK1:Self=Self(0x00002041);
	pub const X64_MTRR_PHYSMASK2:Self=Self(0x00002042);
	pub const X64_MTRR_PHYSMASK3:Self=Self(0x00002043);
	pub const X64_MTRR_PHYSMASK4:Self=Self(0x00002044);
	pub const X64_MTRR_PHYSMASK5:Self=Self(0x00002045);
	pub const X64_MTRR_PHYSMASK6:Self=Self(0x00002046);
	pub const X64_MTRR_PHYSMASK7:Self=Self(0x00002047);
	pub const X64_MTRR_PHYSMASK8:Self=Self(0x00002048);
	pub const X64_MTRR_PHYSMASK9:Self=Self(0x00002049);
	pub const X64_MTRR_PHYSMASKA:Self=Self(0x0000204A);
	pub const X64_MTRR_PHYSMASKB:Self=Self(0x0000204B);
	pub const X64_MTRR_PHYSMASKC:Self=Self(0x0000204C);
	pub const X64_MTRR_PHYSMASKD:Self=Self(0x0000204D);
	pub const X64_MTRR_PHYSMASKE:Self=Self(0x0000204E);
	pub const X64_MTRR_PHYSMASKF:Self=Self(0x0000204F);

	pub const X64_MTRR_FIX64K_00000:Self=Self(0x00002070);
	pub const X64_MTRR_FIX16K_80000:Self=Self(0x00002071);
	pub const X64_MTRR_FIX16K_A0000:Self=Self(0x00002072);
	pub const X64_MTRR_FIX4K_C0000:Self=Self(0x00002073);
	pub const X64_MTRR_FIX4K_C8000:Self=Self(0x00002074);
	pub const X64_MTRR_FIX4K_D0000:Self=Self(0x00002075);
	pub const X64_MTRR_FIX4K_D8000:Self=Self(0x00002076);
	pub const X64_MTRR_FIX4K_E0000:Self=Self(0x00002077);
	pub const X64_MTRR_FIX4K_E8000:Self=Self(0x00002078);
	pub const X64_MTRR_FIX4K_F0000:Self=Self(0x00002079);
	pub const X64_MTRR_FIX4K_F8000:Self=Self(0x0000207A);

	pub const X64_TSC_AUX:Self=Self(0x0000207B);
	pub const X64_BNDCFGS:Self=Self(0x0000207C);
	pub const X64_MCOUNT:Self=Self(0x0000207E);
	pub const X64_ACOUNT:Self=Self(0x0000207F);
	pub const X64_SPEC_CTRL:Self=Self(0x00002084);
	pub const X64_PRED_CMD:Self=Self(0x00002085);
	pub const X64_TSC_VIRTUAL_OFFSET:Self=Self(0x00002087);
	pub const X64_TSX_CTRL:Self=Self(0x00002088);
	pub const X64_XSS:Self=Self(0x0000208B);
	pub const X64_U_CET:Self=Self(0x0000208C);
	pub const X64_S_CET:Self=Self(0x0000208D);
	pub const X64_SSP:Self=Self(0x0000208E);
	pub const X64_PL0_SSP:Self=Self(0x0000208F);
	pub const X64_PL1_SSP:Self=Self(0x00002090);
	pub const X64_PL2_SSP:Self=Self(0x00002091);
	pub const X64_PL3_SSP:Self=Self(0x00002092);
	pub const X64_ISST_ADDR:Self=Self(0x00002093);
	pub const X64_TSC_DEADLINE:Self=Self(0x00002095);
	pub const X64_TSC_ADJUST:Self=Self(0x00002096);
	pub const X64_UMWAIT_CONTROL:Self=Self(0x00002098);
	pub const X64_XFD:Self=Self(0x00002099);
	pub const X64_XFD_ERR:Self=Self(0x0000209A);

	// Feature Control and Nested Capability MSRs
	pub const X64_MISC_ENABLE:Self=Self(0x000020A0);
	pub const X64_FEATURE_CONTROL:Self=Self(0x000020A1);
	pub const X64_VMX_BASIC:Self=Self(0x000020A2);
	pub const X64_VMX_PINBASED_CTLS:Self=Self(0x000020A3);
	pub const X64_VMX_PROCBASED_CTLS:Self=Self(0x000020A4);
	pub const X64_VMX_EXIT_CTLS:Self=Self(0x000020A5);
	pub const X64_VMX_ENTRY_CTLS:Self=Self(0x000020A6);
	pub const X64_VMX_MISC:Self=Self(0x000020A7);
	pub const X64_VMX_CR0_FIXED0:Self=Self(0x000020A8);
	pub const X64_VMX_CR0_FIXED1:Self=Self(0x000020A9);
	pub const X64_VMX_CR4_FIXED0:Self=Self(0x000020AA);
	pub const X64_VMX_CR4_FIXED1:Self=Self(0x000020AB);
	pub const X64_VMX_VMCS_ENUM:Self=Self(0x000020AC);
	pub const X64_VMX_PROCBASED_CTLS2:Self=Self(0x000020AD);
	pub const X64_VMX_EPT_VPID_CAP:Self=Self(0x000020AE);
	pub const X64_VMX_TRUE_PINBASED_CTLS:Self=Self(0x000020AF);
	pub const X64_VMX_TRUE_PROCBASED_CTLS:Self=Self(0x000020B0);
	pub const X64_VMX_TRUE_EXIT_CTLS:Self=Self(0x000020B1);
	pub const X64_VMX_TRUE_ENTRY_CTLS:Self=Self(0x000020B2);
	pub const X64_SVM_HSAVE_PA:Self=Self(0x000020B3);
	pub const X64_SVM_VMCR:Self=Self(0x000020B4);

	// APIC State
	pub const X64_APIC_ID:Self=Self(0x00003002);
	pub const X64_APIC_VERSION:Self=Self(0x00003003);
	// X2APIC State
	pub const X64_APIC_TPR:Self=Self(0x00003008);
	pub const X64_APIC_PPR:Self=Self(0x00003009);
	pub const X64_APIC_EOI:Self=Self(0x0000300B);
	pub const X64_APIC_LDR:Self=Self(0x0000300D);
	pub const X64_APIC_SPURIOUS:Self=Self(0x0000300F);
	pub const X64_APIC_ISR0:Self=Self(0x00003010);
	pub const X64_APIC_ISR1:Self=Self(0x00003011);
	pub const X64_APIC_ISR2:Self=Self(0x00003012);
	pub const X64_APIC_ISR3:Self=Self(0x00003013);
	pub const X64_APIC_ISR4:Self=Self(0x00003014);
	pub const X64_APIC_ISR5:Self=Self(0x00003015);
	pub const X64_APIC_ISR6:Self=Self(0x00003016);
	pub const X64_APIC_ISR7:Self=Self(0x00003017);
	pub const X64_APIC_TMR0:Self=Self(0x00003018);
	pub const X64_APIC_TMR1:Self=Self(0x00003019);
	pub const X64_APIC_TMR2:Self=Self(0x0000301A);
	pub const X64_APIC_TMR3:Self=Self(0x0000301B);
	pub const X64_APIC_TMR4:Self=Self(0x0000301C);
	pub const X64_APIC_TMR5:Self=Self(0x0000301D);
	pub const X64_APIC_TMR6:Self=Self(0x0000301E);
	pub const X64_APIC_TMR7:Self=Self(0x0000301F);
	pub const X64_APIC_IRR0:Self=Self(0x00003020);
	pub const X64_APIC_IRR1:Self=Self(0x00003021);
	pub const X64_APIC_IRR2:Self=Self(0x00003022);
	pub const X64_APIC_IRR3:Self=Self(0x00003023);
	pub const X64_APIC_IRR4:Self=Self(0x00003024);
	pub const X64_APIC_IRR5:Self=Self(0x00003025);
	pub const X64_APIC_IRR6:Self=Self(0x00003026);
	pub const X64_APIC_IRR7:Self=Self(0x00003027);
	pub const X64_APIC_ESE:Self=Self(0x00003028);
	pub const X64_APIC_ICR:Self=Self(0x00003030);
	pub const X64_APIC_LVT_TIMER:Self=Self(0x00003032);
	pub const X64_APIC_LVT_THERMAL:Self=Self(0x00003033);
	pub const X64_APIC_LVT_PERFMON:Self=Self(0x00003034);
	pub const X64_APIC_LVT_LINT0:Self=Self(0x00003035);
	pub const X64_APIC_LVT_LINT1:Self=Self(0x00003036);
	pub const X64_APIC_LVT_ERROR:Self=Self(0x00003037);
	pub const X64_APIC_INIT_COUNT:Self=Self(0x00003038);
	pub const X64_APIC_CURRENT_COUNT:Self=Self(0x00003039);
	pub const X64_APIC_DIVIDE:Self=Self(0x0000303E);
	pub const X64_APIC_SELF_IPI:Self=Self(0x0000303F);

	// SynIC Registers
	pub const SYNIC_SINT0:Self=Self(0x00004000);
	pub const SYNIC_SINT1:Self=Self(0x00004001);
	pub const SYNIC_SINT2:Self=Self(0x00004002);
	pub const SYNIC_SINT3:Self=Self(0x00004003);
	pub const SYNIC_SINT4:Self=Self(0x00004004);
	pub const SYNIC_SINT5:Self=Self(0x00004005);
	pub const SYNIC_SINT6:Self=Self(0x00004006);
	pub const SYNIC_SINT7:Self=Self(0x00004007);
	pub const SYNIC_SINT8:Self=Self(0x00004008);
	pub const SYNIC_SINT9:Self=Self(0x00004009);
	pub const SYNIC_SINT10:Self=Self(0x0000400A);
	pub const SYNIC_SINT11:Self=Self(0x0000400B);
	pub const SYNIC_SINT12:Self=Self(0x0000400C);
	pub const SYNIC_SINT13:Self=Self(0x0000400D);
	pub const SYNIC_SINT14:Self=Self(0x0000400E);
	pub const SYNIC_SINT15:Self=Self(0x0000400F);
	pub const SYNIC_SCONTROL:Self=Self(0x00004010);
	pub const SYNIC_SVERSION:Self=Self(0x00004011);
	pub const SYNIC_SIEFP:Self=Self(0x00004012);
	pub const SYNIC_SIMP:Self=Self(0x00004013);
	pub const SYNIC_EOM:Self=Self(0x00004014);

	// Hypervisor-Defined Registers
	pub const VP_RUNTIME:Self=Self(0x00005000);
	pub const X64_HYPERCALL:Self=Self(0x00005001);
	pub const GUEST_OS_ID:Self=Self(0x00005002);
	pub const VP_ASSIST_PAGE:Self=Self(0x00005013);
	pub const REFERENCE_TSC:Self=Self(0x00005017);
	pub const REFERENCE_TSC_SEQUENCE:Self=Self(0x0000501A);
	pub const X64_NESTED_GUEST_STATE:Self=Self(0x00005050);
	pub const X64_NESTED_CURRENT_VM_GPA:Self=Self(0x00005051);
	pub const X64_NESTED_VMX_INVEPT:Self=Self(0x00005052);
	pub const X64_NESTED_VMX_INVVPID:Self=Self(0x00005053);

	// Interupt/Event Registers
	pub const PENDING_INTERRUPTION:Self=Self(0x80000000);
	pub const INTERRUPT_STATE:Self=Self(0x80000001);
	pub const PENDING_EVENT:Self=Self(0x80000002);
	pub const PENDING_EVENT1:Self=Self(0x80000003);
	pub const DELIVERABILITY_NOTIFICATIONS:Self=Self(0x80000004);
	pub const INTERNAL_ACTIVITY_STATE:Self=Self(0x80000005);
	pub const PENDING_DEBUG_EXCEPTION:Self=Self(0x80000006);
	pub const PENDING_EVENT2:Self=Self(0x80000007);
	pub const PENDING_EVENT3:Self=Self(0x80000008);
}

#[bitfield(u16)] pub struct WHvX64SegmentRegisterAttributes
{
	#[bits(4)] pub segment_type:u8,
	pub system:bool,
	#[bits(2)] pub dpl:u8,
	pub present:bool,
	#[bits(4)] rsvd:u8,
	pub avl:bool,
	pub long_mode:bool,
	pub default_big:bool,
	pub granularity:bool
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64SegmentRegister
{
	pub base:u64,
	pub limit:u32,
	pub selector:u16,
	pub attrib:WHvX64SegmentRegisterAttributes,
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64TableRegister
{
	pub pad:[u16;3],
	pub limit:u16,
	pub base:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64FpControlStatusRegister
{
	pub fp_control:u16,
	pub fp_status:u16,
	pub fp_tag:u8,
	pub rsvd:u8,
	pub last_fp_op:u16,
	pub last_fp_rip:u64,
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64XmmControlStatusRegister
{
	pub last_fp_rdp:u64,
	pub mxcsr:u32,
	pub mxcsr_mask:u32
}

#[bitfield(u64)] pub struct WHvX64InterruptStateRegister
{
	pub interrupt_shadow:bool,
	pub nmi_masked:bool,
	#[bits(62)] rsvd:u64
}

#[bitfield(u64)] pub struct WHvX64PendingInterruptionRegister
{
	pub interruption_pending:bool,
	#[bits(3)] pub interruption_type:WHvX64PendingEventType,
	pub deliver_error_code:bool,
	#[bits(4)] pub instruction_length:u8,
	pub nested_event:bool,
	#[bits(6)] rsvd:u64,
	pub interruption_vector:u16,
	pub error_code:u32
}

#[bitfield(u128)] pub struct WHvX64PendingExceptionEvent
{
	pub event_pending:bool,
	#[bits(3)] pub event_type:WHvX64PendingEventType,
	#[bits(4)] rsvd0:u8,
	pub deliver_error_code:bool,
	#[bits(7)] rsvd1:u8,
	pub vector:u16,
	pub error_code:u32,
	pub exception_parameter:u64
}

#[bitfield(u128)] pub struct WHvX64PendingExternalInterruptEvent
{
	pub event_pending:bool,
	#[bits(3)] pub event_type:WHvX64PendingEventType,
	#[bits(4)] rsvd0:u8,
	pub vector:u8,
	#[bits(48)] rsvd1:u64,
	pub reserved:u64
}

#[bitfield(u128)] pub struct WHvX64PendingSvmNestedExitEvent0
{
	pub event_pending:bool,
	#[bits(4)] pub event_type:WHvX64PendingEventType,
	#[bits(3)] rsvd0:u8,
	pub instruction_bytes_valid:bool,
	#[bits(55)] rsvd1:u64,
	pub exit_code:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64PendingSvmNestedExitEvent1
{
	pub exit_info1:u64,
	pub exit_info2:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64PendingSvmNestedExitEvent2
{
	pub next_rip:u64,
	pub instruction_bytes_fetched_count:u8,
	pub instruction_bytes:[u8;7]
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64PendingSvmNestedExitEvent3
{
	pub instruction_bytes:[u8;8],
	rsvd:u64
}

#[bitfield(u128)] pub struct WHvX64PendingVmxNestedExitEvent0
{
	pub event_pending:bool,
	#[bits(4)] pub event_type:WHvX64PendingEventType,
	#[bits(27)] rsvd0:u32,
	pub exit_reason:u32,
	pub exit_qualification:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64PendingVmxNestedExitEvent1
{
	pub instruction_length:u32,
	pub instruction_info:u32,
	pub exit_interruption_info:u32,
	pub exit_exception_error_code:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64PendingVmxNestedExitEvent2
{
	pub guest_linear_address:u64,
	pub guest_physical_address:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(u8)] pub enum WHvX64PendingEventType
{
	#[default]
	Exception=0,
	ExternalInterrupt=5,
	SvmNestedExit=7,
	VmxNestedExit=8,
}

impl WHvX64PendingEventType
{
	pub const fn from_bits(value:u8)->Self
	{
		match value
		{
			5=>Self::ExternalInterrupt,
			7=>Self::SvmNestedExit,
			8=>Self::VmxNestedExit,
			_=>Self::Exception
		}
	}

	pub const fn into_bits(self)->u8
	{
		match self
		{
			Self::Exception=>0,
			Self::ExternalInterrupt=>5,
			Self::SvmNestedExit=>7,
			Self::VmxNestedExit=>8
		}
	}
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64NestedInveptRegister
{
	pub invept_type:u8,
	pub rsvd:[u8;7],
	pub eptp:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64NestedInvvpidRegister
{
	pub invvpid_type:u8,
	pub rsvd:[u8;3],
	pub vpid:u32,
	pub linear_address:u64
}

#[bitfield(u128)] pub struct WHvX64NestedGuestState
{
	pub nested_virt_active:bool,
	pub nested_guest_mode:bool,
	pub vmentry_pending:bool,
	#[bits(61)] rsvd0:u64,
	rsvd1:u64
}

#[bitfield(u64)] pub struct WHvDeliverabilityNotificationRegister
{
	pub nmi_notification:bool,
	pub interrupt_notification:bool,
	#[bits(4)] pub interrupt_priority:u8,
	#[bits(42)] rsvd:u64,
	pub sint:u16
}

#[bitfield(u64)] pub struct WHvInternalActivityRegister
{
	pub startup_suspend:bool,
	pub halt_suspend:bool,
	pub idle_suspend:bool,
	#[bits(61)] rsvd:u64,
}

#[bitfield(u64)] pub struct WHvX64PendingDebugExceptionRegister
{
	pub breakpoint0:bool,
	pub breakpoint1:bool,
	pub breakpoint2:bool,
	pub breakpoint3:bool,
	pub single_step:bool,
	#[bits(59)] rsvd:u64
}

#[repr(C)] pub union WHvRegisterValue
{
	pub reg8:u8,
	pub reg16:u16,
	pub reg32:u32,
	pub reg64:u64,
	pub reg128:u128,
	pub deliverability_notification:WHvDeliverabilityNotificationRegister,
	pub segment:WHvX64SegmentRegister,
	pub table:WHvX64TableRegister,
	pub fp_cs:WHvX64FpControlStatusRegister,
	pub xmm_cs:WHvX64XmmControlStatusRegister,
	pub interrupt_state:WHvX64InterruptStateRegister,
	pub pending_interruption:WHvX64PendingInterruptionRegister,
	pub exception_event:WHvX64PendingExceptionEvent,
	pub extint_event:WHvX64PendingExternalInterruptEvent,
	pub pending_debug_exception:WHvX64PendingDebugExceptionRegister,
	pub invept:WHvX64NestedInveptRegister,
	pub invvpid:WHvX64NestedInvvpidRegister,
	pub nested_state:WHvX64NestedGuestState,
	pub svm_nested_exit_event0:WHvX64PendingSvmNestedExitEvent0,
	pub svm_nested_exit_event1:WHvX64PendingSvmNestedExitEvent1,
	pub svm_nested_exit_event2:WHvX64PendingSvmNestedExitEvent2,
	pub svm_nested_exit_event3:WHvX64PendingSvmNestedExitEvent3,
	pub vmx_nested_exit_event0:WHvX64PendingVmxNestedExitEvent0,
	pub vmx_nested_exit_event1:WHvX64PendingVmxNestedExitEvent1,
	pub vmx_nested_exit_event2:WHvX64PendingVmxNestedExitEvent2
}

impl Default for WHvRegisterValue
{
	fn default()->Self
	{
		Self
		{
			reg128:0
		}
	}
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvCapabilityCode(pub u32);

impl WHvCapabilityCode
{
	pub const HYPERVISOR_PRESENT:Self=Self(0x00000000);
	pub const FEATURES:Self=Self(0x00000001);
	pub const EXTENDED_VM_EXITS:Self=Self(0x00000002);
	pub const EXCEPTION_EXIT_BITMAP:Self=Self(0x00000003);
	pub const X64_MSR_EXIT_BITMAP:Self=Self(0x00000004);
	pub const GPA_RANGE_POPULATION_FLAGS:Self=Self(0x00000005);
	pub const SCHEDULER_FEATURES:Self=Self(0x00000006);
	pub const PROCESSOR_VENDOR:Self=Self(0x00001000);
	pub const PROCSSOR_FEATURES:Self=Self(0x00001001);
	pub const PROCESSOR_CLFLUSH_SIZE:Self=Self(0x00001002);
	pub const PROCESSOR_XSAVE_FEATURES:Self=Self(0x00001003);
	pub const PROCESSOR_CLOCK_FREQUENCY:Self=Self(0x00001004);
	pub const INTERRUPT_CLOCK_FREQUENCY:Self=Self(0x00001005);
	pub const PROCESSOR_FEATURE_BANKS:Self=Self(0x00001006);
	pub const PROCESSOR_FREQUENCY_CAP:Self=Self(0x00001007);
	pub const SYNTHETIC_PROCESSOR_FEATURE_BANKS:Self=Self(0x00001008);
	pub const PROCESSOR_PERFMON_FEATURES:Self=Self(0x00001009);
	pub const PHYSICAL_ADDRESS_WIDTH:Self=Self(0x0000100A);
	pub const VMX_BASIC:Self=Self(0x00002000);
	pub const VMX_PINBASED_CTLS:Self=Self(0x00002001);
	pub const VMX_PROCBASED_CTLS:Self=Self(0x00002002);
	pub const VMX_EXIT_CTLS:Self=Self(0x00002003);
	pub const VMX_ENTRY_CTLS:Self=Self(0x00002004);
	pub const VMX_MISC:Self=Self(0x00002005);
	pub const VMX_CR0_FIXED0:Self=Self(0x00002006);
	pub const VMX_CR0_FIXED1:Self=Self(0x00002007);
	pub const VMX_CR4_FIXED0:Self=Self(0x00002008);
	pub const VMX_CR4_FIXED1:Self=Self(0x00002009);
	pub const VMX_VMCS_ENUM:Self=Self(0x0000200A);
	pub const VMX_PROCBASED_CTLS2:Self=Self(0x0000200B);
	pub const VMX_EPT_VPID_CAP:Self=Self(0x0000200C);
	pub const VMX_TRUE_PINBASED_CTLS:Self=Self(0x0000200D);
	pub const VMX_TRUE_PROCBASED_CTLS:Self=Self(0x0000200E);
	pub const VMX_TRUE_EXIT_CTLS:Self=Self(0x0000200F);
	pub const VMX_TRUE_ENTRY_CTLS:Self=Self(0x00002010);
}

#[bitfield(u64)] pub struct WHvCapabilityFeatures
{
	pub partial_unmap:bool,
	pub local_apic_emulation:bool,
	pub xsave:bool,
	pub dirty_page_tracking:bool,
	pub speculation_control:bool,
	pub apic_remote_read:bool,
	pub idle_suspend:bool,
	pub virtual_pci_device_support:bool,
	pub iommu_support:bool,
	pub vp_hot_add_remove:bool,
	pub device_access_tracking:bool,
	#[bits(53)] rsvd:u64
}

#[bitfield(u64)] pub struct WHvExtendedVmExits
{
	pub x64_cpuid_exit:bool,
	pub x64_msr_exit:bool,
	pub exception_exit:bool,
	pub x64_rdtsc_exit:bool,
	pub x64_apic_smi_exit_trap:bool,
	pub hypercall_exit:bool,
	pub x64_apic_init_sipi_exit_trap:bool,
	pub x64_apic_write_lint0_exit_trap:bool,
	pub x64_apic_write_lint1_exit_trap:bool,
	pub x64_apic_write_svr_exit_trap:bool,
	pub unknown_synic_connection:bool,
	pub retarget_unknown_vpci_device:bool,
	pub x64_apic_write_ldr_exit_trap:bool,
	pub x64_apic_write_dfr_exit_trap:bool,
	pub gpa_access_fault_exit:bool,
	#[bits(49)] rsvd:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(u32)] pub enum WHvProcessorVendor
{
	#[default] Amd=0x0,
	Intel=0x1,
	Hygon=0x2,
	Arm=0x10
}

/// Return values for `WHvCapabilityCode::PROCESSOR_FEATURES` and input buffer for
/// `WHvPartitionPropertyCodeProcessorFeatures`. This value is embedded in the
/// `WHvProcessorFeatureBanks`.
#[bitfield(u64)] pub struct WHvX64ProcessorFeatures
{
	pub sse3:bool,
	pub lahf_sahf:bool,
	pub ssse3:bool,
	pub sse41:bool,
	pub sse42:bool,
	pub sse4a:bool,
	pub xop:bool,
	pub popcnt:bool,
	pub cmpxchg16b:bool,
	pub alt_movcr8:bool,
	pub lzcnt:bool,
	pub misalign_sse:bool,
	pub mmx_ext:bool,
	pub amd_3dnow:bool,
	pub amd_3dnow_ext:bool,
	pub page_1gb:bool,
	pub aes:bool,
	pub pclmulqdq:bool,
	pub pcid:bool,
	pub fma4:bool,
	pub f16c:bool,
	pub rdrand:bool,
	pub rdwrfsgs:bool,
	pub smep:bool,
	pub enhanced_fast_string:bool,
	pub bmi1:bool,
	pub bmi2:bool,
	#[bits(2)] rsvd1:u64,
	pub movbe:bool,
	pub npiep1:bool,
	pub dep_x87_fpu_save:bool,
	pub rdseed:bool,
	pub adx:bool,
	pub intel_prefetcher:bool,
	pub smap:bool,
	pub hle:bool,
	pub rtm:bool,
	pub rdtscp:bool,
	pub clflushopt:bool,
	pub clwb:bool,
	pub sha:bool,
	pub x87_pointers_saved:bool,
	pub invpcid:bool,
	pub ibrs:bool,
	pub stibp:bool,
	pub ibpb:bool,
	pub unrestricted_guest:bool,
	pub ssbd:bool,
	pub fast_short_rep_mov:bool,
	rsvd3:bool,
	pub rdcl_no:bool,
	pub ibrs_all:bool,
	rsvd4:bool,
	pub ssb_no:bool,
	pub rsba_no:bool,
	rsvd5:bool,
	pub rdpid:bool,
	pub umip:bool,
	pub mds_no:bool,
	pub mdclear:bool,
	pub taa_no:bool,
	pub tsx_ctrl:bool,
	rsvd6:bool,
}

#[bitfield(u64)] pub struct WHvX64ProcessorFeatures1
{
	pub acount_mcount:bool,
	pub tsc_invariant:bool,
	pub clzero:bool,
	pub rdpru:bool,
	pub la57:bool,
	pub mbec:bool,
	pub nested_virt:bool,
	pub psfd:bool,
	pub cet_ss:bool,
	pub cet_ibt:bool,
	pub vmx_exception_inject:bool,
	rsvd2:bool,
	pub umwait_tpause:bool,
	pub movdiri:bool,
	pub movdir64b:bool,
	pub cldemote:bool,
	pub serialize:bool,
	pub tsc_deadline_tmr:bool,
	pub tsc_adjust:bool,
	pub fzl_rep_movsb:bool,
	pub fs_rep_stosb:bool,
	pub fs_rep_cmpsb:bool,
	pub tsx_ldtrk:bool,
	pub vmx_ins_outs:bool,
	rsvd3:bool,
	pub no_sbdr_ssdp:bool,
	pub no_fbsdp:bool,
	pub no_psdp:bool,
	pub fb_clear:bool,
	pub no_btc:bool,
	pub ibpb_rsb_flush:bool,
	pub stibp_always_on:bool,
	pub perf_global_ctrl:bool,
	pub npt_x_only:bool,
	pub npt_ad_flags:bool,
	pub npt_1gb_page:bool,
	rsvd4:bool,
	rsvd5:bool,
	rsvd6:bool,
	rsvd7:bool,
	pub cmpccxadd:bool,
	pub tsc_aux_virtualization:bool,
	pub rmpquery:bool,
	rsvd10:bool,
	rsvd11:bool,
	pub prefetch_i:bool,
	pub sha512:bool,
	rsvd12:bool,
	rsvd13:bool,
	rsvd14:bool,
	pub sm3:bool,
	pub sm4:bool,
	#[bits(6)] rsvd1_52_57:u64,
	rsvd17:bool,
	rsvd18:bool,
	rsvd19:bool,
	#[bits(3)] rsvd20:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorFeatureBanks
{
	pub bank_count:u32,
	rsvd:u32,
	pub bank0:WHvX64ProcessorFeatures,
	pub bank1:WHvX64ProcessorFeatures1
}

#[bitfield(u64)] pub struct WHvSyntheticProcessorFeatures
{
	pub hypervisor_present:bool,
	pub hv1:bool,
	pub access_vp_runtime_reg:bool,
	pub access_partition_ref_counter:bool,
	pub access_synic_regs:bool,
	pub access_synthetic_timer_regs:bool,
	pub access_intr_ctrl_regs:bool,
	pub access_hypercall_regs:bool,
	pub access_vp_index:bool,
	pub access_partition_reference_tsc:bool,
	pub access_guest_idle_reg:bool,
	pub access_frequency_regs:bool,
	rsvdz12:bool,
	rsvdz13:bool,
	rsvdz14:bool,
	pub enable_extended_gva_ranges_for_flush_virtual_address_list:bool,
	rsvdz16:bool,
	rsvdz17:bool,
	pub fast_hypercall_output:bool,
	rsvdz19:bool,
	rsvdz20:bool,
	rsvdz21:bool,
	pub direct_synthetic_timers:bool,
	rsvdz23:bool,
	pub extended_processor_masks:bool,
	pub tb_flush_hypercalls:bool,
	pub synthetic_cluster_ipi:bool,
	pub notify_long_spin_wait:bool,
	pub query_numa_distance:bool,
	pub signal_events:bool,
	pub retarget_device_interrupts:bool,
	pub restore_time:bool,
	pub enlightened_vmcs:bool,
	pub nested_debug_controls:bool,
	pub synthetic_time_unhalted_timer:bool,
	pub idle_spec_ctrl:bool,
	rsvdz36:bool,
	pub wake_vps:bool,
	pub access_vp_regs:bool,
	rsvdz39:bool,
	rsvdz40:bool,
	#[bits(23)] rsvd:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSyntheticProcessorFeaturesBanks
{
	pub bank_count:u32,
	rsvd:u32,
	pub bank0:WHvSyntheticProcessorFeatures
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvInputVtl(pub u8);

impl WHvInputVtl
{
	pub const VTL_ALL:Self=Self(0xF);
}

#[bitfield(u8)] pub struct WHvEnablePartitionVtlFlags
{
	pub enable_mbec:bool,
	pub enable_sss:bool,
	pub enable_hardware_hvpt:bool,
	#[bits(5)] rsvd:u8
}

#[bitfield(u8)] pub struct WHvDisablePartitionVtlFlags
{
	pub scrub_only:bool,
	#[bits(7)] rsvd:u8
}

#[derive(Default, Debug, Clone)]
#[repr(C)] pub struct WHvInitialVpContext
{
	pub rip:u64,
	pub rsp:u64,
	pub rflags:u64,
	pub cs:WHvX64SegmentRegister,
	pub ds:WHvX64SegmentRegister,
	pub es:WHvX64SegmentRegister,
	pub fs:WHvX64SegmentRegister,
	pub gs:WHvX64SegmentRegister,
	pub ss:WHvX64SegmentRegister,
	pub tr:WHvX64SegmentRegister,
	pub ldtr:WHvX64SegmentRegister,
	pub idtr:WHvX64TableRegister,
	pub gdtr:WHvX64TableRegister,
	pub efer:u64,
	pub cr0:u64,
	pub cr3:u64,
	pub cr4:u64,
	pub msr_cr_pat:u64,
}

#[bitfield(u8)] pub struct WHvDisableVpVtlFlags
{
	pub scrub_only:bool,
	#[bits(7)] rsvd:u8
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvPartitionPropertyCode(pub u32);

impl WHvPartitionPropertyCode
{
	pub const EXTENDED_VM_EXITS:Self=Self(0x00000001);
	pub const EXCEPTION_EXIT_BITMAP:Self=Self(0x00000002);
	pub const SEPARATE_SECURITY_DOMAIN:Self=Self(0x00000003);
	pub const NESTED_VIRTUALIZATION:Self=Self(0x00000004);
	pub const X64_MSR_EXIT_BITMAP:Self=Self(0x00000005);
	pub const PRIMARY_NUMA_NODE:Self=Self(0x00000006);
	pub const CPU_RESERVE:Self=Self(0x00000007);
	pub const CPU_CAP:Self=Self(0x00000008);
	pub const CPU_WEIGHT:Self=Self(0x00000009);
	pub const CPU_GROUP_ID:Self=Self(0x0000000A);
	pub const PROCESSOR_FREQUENCY_CAP:Self=Self(0x0000000B);
	pub const ALLOW_DEVICE_ASSIGNMENT:Self=Self(0x0000000C);
	pub const DISABLE_SMT:Self=Self(0x0000000D);

	pub const PROCESSOR_FEATURES:Self=Self(0x00001001);
	pub const PROCESSOR_CLFLUSH_SIZE:Self=Self(0x00001002);
	pub const CPUID_EXIT_LIST:Self=Self(0x00001003);
	pub const CPUID_RESULT_LIST:Self=Self(0x00001004);
	pub const LOCAL_APIC_EMULATION_MODE:Self=Self(0x00001005);
	pub const PROCESSOR_XSAVE_FEATURES:Self=Self(0x00001006);
	pub const PROCESSOR_CLOCK_FREQUENCY:Self=Self(0x00001007);
	pub const INTERRUPT_CLOCK_FREQUENCY:Self=Self(0x00001008);
	pub const APIC_REMOTE_READ_SUPPORT:Self=Self(0x00001009);
	pub const PROCESSOR_FEATURES_BANKS:Self=Self(0x0000100A);
	pub const REFERENCE_TIME:Self=Self(0x0000100B);
	pub const SYNTHETIC_PROCESSOR_FEATURES_BANKS:Self=Self(0x0000100C);
	pub const CPUID_RESULT_LIST2:Self=Self(0x0000100D);
	pub const PROCESSOR_PERFMON_FEATURES:Self=Self(0x0000100E);
	pub const MSR_ACTION_LIST:Self=Self(0x0000100F);
	pub const UNIMPLEMENTED_MSR_ACTION:Self=Self(0x00001010);
	pub const PHYSICAL_ADDRESS_WIDTH:Self=Self(0x00001011);
	pub const PROCESSOR_COUNT:Self=Self(0x00001FFF);
}

#[bitfield(u64)] pub struct WHvProcessorXsaveFeatures
{
	pub xsave:bool,
	pub xsaveopt:bool,
	pub avx:bool,
	pub avx2:bool,
	pub fma:bool,
	pub mpx:bool,
	pub avx512:bool,
	pub avx512dq:bool,
	pub avx512cd:bool,
	pub avx512bw:bool,
	pub avx512vl:bool,
	pub xsavec:bool,
	pub xsaves:bool,
	pub xcr1:bool,
	pub avx512_bitalg:bool,
	pub avx512_ifma:bool,
	pub avx512_vbmi:bool,
	pub avx512_vbmi2:bool,
	pub avx512_vnni:bool,
	pub gfni:bool,
	pub vaes:bool,
	pub avx512_popcntdq:bool,
	pub vpclmulqdq:bool,
	pub avx512_bf16:bool,
	pub avx512_vp2_intersect:bool,
	pub avx512_fp16:bool,
	pub xfd:bool,
	pub amx_tile:bool,
	pub amx_bf16:bool,
	pub amx_int8:bool,
	pub avx_vnni:bool,
	pub avx_ifma:bool,
	pub avx_ne_convert:bool,
	pub avx_vnni_int8:bool,
	pub avx_vnni_int16:bool,
	pub avx10_1_256:bool,
	pub avx10_1_512:bool,
	pub amx_fp16:bool,
	#[bits(26)] rsvd:u64
}

#[bitfield(u64)] pub struct WHvProcessorPerfmonFeatures
{
	pub pmu:bool,
	pub lbr:bool,
	#[bits(62)] rsvd:u64
}

#[bitfield(u64)] pub struct WHvX64MsrExitBitmap
{
	pub unhandled_msrs:bool,
	pub tsc_msr_write:bool,
	pub tsc_msr_read:bool,
	pub apic_base_msr_write:bool,
	pub misc_enable_msr_read:bool,
	pub mc_update_patch_level_msr_read:bool,
	#[bits(58)] rsvd:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvMapGpaRangeFlags(pub u32);

impl WHvMapGpaRangeFlags
{
	pub const NONE:Self=Self(0x0);
	pub const READ:Self=Self(0x1);
	pub const WRITE:Self=Self(0x2);
	pub const EXECUTE:Self=Self(0x4);
	pub const TRACK_DIRTY_PAGES:Self=Self(0x8);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvTranslateGvaFlags(pub u32);

impl WHvTranslateGvaFlags
{
	pub const NONE:Self=Self(0x000);
	pub const VALIDATE_READ:Self=Self(0x001);
	pub const VALIDATE_WRITE:Self=Self(0x002);
	pub const VALIDATE_EXECUTE:Self=Self(0x004);
	pub const PRIVILEGE_EXEMPT:Self=Self(0x008);
	pub const SET_PAGE_TABLE_BITS:Self=Self(0x010);
	pub const ENFORCE_SMAP:Self=Self(0x100);
	pub const OVERRIDE_SMAP:Self=Self(0x200);
}

macro_rules! derive_flags
{
	($type_name:ty)=>
	{
		impl BitOr for $type_name
		{
			type Output=Self;
			fn bitor(self,rhs:Self)->Self::Output
			{
				Self(self.0|rhs.0)
			}
		}

		impl BitOrAssign for $type_name
		{
			fn bitor_assign(&mut self,rhs:Self)
			{
				self.0|=rhs.0;
			}
		}

		impl BitAnd for $type_name
		{
			type Output=Self;
			fn bitand(self,rhs:Self)->Self::Output
			{
				Self(self.0&rhs.0)
			}
		}

		impl BitAndAssign for $type_name
		{
			fn bitand_assign(&mut self,rhs:Self)
			{
				self.0&=rhs.0;
			}
		}

		impl BitXor for $type_name
		{
			type Output=Self;
			fn bitxor(self,rhs:Self)->Self::Output
			{
				Self(self.0^rhs.0)
			}
		}

		impl BitXorAssign for $type_name
		{
			fn bitxor_assign(&mut self,rhs:Self)
			{
				self.0^=rhs.0;
			}
		}
	};
}

derive_flags!(WHvMapGpaRangeFlags);
derive_flags!(WHvTranslateGvaFlags);

#[bitfield(u64)] pub struct WHvTranslateGva2Flags
{
	pub validate_read:bool,
	pub validate_write:bool,
	pub validate_execute:bool,
	pub privilege_exempt:bool,
	pub set_page_table_bits:bool,
	#[bits(3)] rsvd1:u8,
	pub enforce_smap:bool,
	pub override_smap:bool,
	#[bits(46)] rsvd4:u64,
	pub input_vtl:u8
}

#[derive(Default, Debug, Clone, Copy, PartialEq, PartialOrd)]
#[repr(C)] pub struct WHvTranslateGvaResultCode(u32);

impl WHvTranslateGvaResultCode
{
	pub const SUCCESS:Self=Self(0);
	// Translation Failures.
	pub const PAGE_NOT_PRESENT:Self=Self(1);
	pub const PRIVILEGE_VIOLATION:Self=Self(2);
	pub const INVALID_PAGE_TABLE_FLAGS:Self=Self(3);
	// GPA Access Failures.
	pub const GPA_UNMAPPED:Self=Self(4);
	pub const GPA_NO_READ_ACCESS:Self=Self(5);
	pub const GPA_NO_WRITE_ACCESS:Self=Self(6);
	pub const GPA_ILLEGAL_OVERLAY_ACCESS:Self=Self(7);
	pub const INTERCEPT:Self=Self(8);
}

#[derive(Default, Debug, Clone, Copy, PartialEq, PartialOrd)]
#[repr(C)] pub struct WHvTranslateGvaResult
{
	pub result_code:WHvTranslateGvaResultCode,
	rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvMemoryRangeEntry
{
	pub guest_address:u64,
	pub size_in_bytes:u64
}

#[bitfield(u32)] pub struct WHvAdviseGpaRangePopulateFlag
{
	pub prefetch:bool,
	pub avoid_hard_faults:bool,
	#[bits(30)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvMemoryAccessType(pub u32);

impl WHvMemoryAccessType
{
	pub const READ:Self=Self(0);
	pub const WRITE:Self=Self(1);
	pub const EXECUTE:Self=Self(2);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvAdviseGpaRangePopulate
{
	pub flags:WHvAdviseGpaRangePopulateFlag,
	pub access_type:WHvMemoryAccessType
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvCacheType(pub u32);

impl WHvCacheType
{
	pub const UNCACHED:Self=Self(0);
	pub const WRITE_COMBINING:Self=Self(1);
	pub const WRITE_THROUGH:Self=Self(4);
	pub const WRITE_PROTECTED:Self=Self(5);
	pub const WRITE_BACK:Self=Self(6);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvAccessGpaControls
{
	pub cache_type:WHvCacheType,
	pub input_vtl:u8,
	rsvd0:u8,
	rsvd1:u16
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvCapabilityProcessorFrequencyCap
{
	pub is_supported:u32,
	pub highest_frequency_mhz:u32,
	pub nominal_frequency_mhz:u32,
	pub lowest_frequency_mhz:u32,
	pub frequency_step_mhz:u32
}

#[bitfield(u64)] pub struct WHvSchedulerFeatures
{
	pub cpu_reserve:bool,
	pub cpu_cap:bool,
	pub cpu_weight:bool,
	pub cpu_group_id:bool,
	pub disable_smt:bool,
	#[bits(59)] rsvd:u64
}

#[derive(Clone, Copy)]
#[repr(C)] pub union WHvCapability
{
	pub hypervisor_present:bool,
	pub features:WHvCapabilityFeatures,
	pub extended_vm_exits:WHvExtendedVmExits,
	pub processor_vendor:WHvProcessorVendor,
	pub processor_features:WHvX64ProcessorFeatures,
	pub synthetic_processor_features_banks:WHvSyntheticProcessorFeaturesBanks,
	pub clflush_size:u8,
	pub processor_clock_frequency:u64,
	pub processor_feature_banks:WHvProcessorFeatureBanks,
	pub gpa_range_population_flags:WHvAdviseGpaRangePopulateFlag,
	pub processor_frequency_cap:WHvCapabilityProcessorFrequencyCap,
	pub scheduler_features:WHvSchedulerFeatures,
	pub physical_address_width:u32,
	pub nested_feature_register:u64,
	pub processor_xsave_features:WHvProcessorXsaveFeatures,
	pub interrupt_clock_frequency:u64,
	pub processor_perfmon_features:WHvProcessorPerfmonFeatures,
	pub x64_msr_exit_bitmap:WHvX64MsrExitBitmap,
	pub exception_exit_bitmap:WHvExceptionBitmap,
}

impl Default for WHvCapability
{
	fn default() -> Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64CpuidResult
{
	pub function:u32,
	reserved:[u32;3],
	pub eax:u32,
	pub ebx:u32,
	pub ecx:u32,
	pub edx:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvCpuidOutput
{
	pub eax:u32,
	pub ebx:u32,
	pub ecx:u32,
	pub edx:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64CpuidResult2
{
	pub function:u32,
	pub index:u32,
	pub vp_index:u32,
	pub flags:u32,
	pub output:WHvCpuidOutput,
	pub mask:WHvCpuidOutput
}

impl WHvX64CpuidResult2
{
	pub const FLAG_SUBLEAF_SPECIFIC:u32=0x00000001;
	pub const FLAG_VP_SPECIFIC:u32=0x00000002;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvMsrAction
{
	pub index:u32,
	pub read_action:u8,
	pub write_action:u8,
	reserved:u16
}

impl WHvMsrAction
{
	pub const ACTION_ARCHITECTURE_DEFAULT:u8=0;
	pub const ACTION_IGNORE_WRITE_READ_ZERO:u8=1;
	pub const ACTION_EXIT:u8=2;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvExceptionType(pub u32);

impl WHvExceptionType
{
	pub const DIVIDE_ERROR_FAULT:Self=Self(0);
	pub const DEBUG_FAULT_OR_TRAP:Self=Self(1);
	pub const NON_MASKABLE_INTERRUPT:Self=Self(2);
	pub const BREAKPOINT_TRAP:Self=Self(3);
	pub const OVERFLOW_TRAP:Self=Self(4);
	pub const BOUND_RANGE_FAULT:Self=Self(5);
	pub const INVALID_OPCODE_FAULT:Self=Self(6);
	pub const DEVICE_NOT_AVAILABLE_FAULT:Self=Self(7);
	pub const DOUBLE_FAULT_ABORT:Self=Self(8);
	pub const COPROCESSOR_SEGMENT_OVERRUN_FAULT:Self=Self(9);
	pub const INVALID_TSS_FAULT:Self=Self(10);
	pub const SEGMENT_NOT_PRESENT_FAULT:Self=Self(11);
	pub const STACK_FAULT:Self=Self(12);
	pub const GENERAL_PROTECTION_FAULT:Self=Self(13);
	pub const PAGE_FAULT:Self=Self(14);
	pub const X87_FLOATING_POINT_ERROR_FAULT:Self=Self(16);
	pub const ALIGNMENT_CHECK_FAULT:Self=Self(17);
	pub const MACHINE_CHECK_ABORT:Self=Self(18);
	pub const SIMD_FLOATING_POINT_ERROR_FAULT:Self=Self(19);
	pub const CONTROL_PROTECTION_FAULT:Self=Self(21);
}

#[bitfield(u64)] pub struct WHvExceptionBitmap
{
	pub divide_error_fault:bool,
	pub debug_fault_or_trap:bool,
	pub non_maskable_interrupt:bool,
	pub breakpoint_trap:bool,
	pub overflow_trap:bool,
	pub bound_range_fault:bool,
	pub invalid_opcode_fault:bool,
	pub device_not_available_fault:bool,
	pub double_fault_abort:bool,
	pub coprocessor_segment_overrun_fault:bool,
	pub invalid_tss_fault:bool,
	pub segment_not_present_fault:bool,
	pub stack_fault:bool,
	pub general_protection_fault:bool,
	pub page_fault:bool,
	rsvd0:bool,
	pub x87_floating_point_error_fault:bool,
	pub alignment_check_fault:bool,
	pub machine_check_abort:bool,
	pub simd_floating_point_error_fault:bool,
	rsvd1:bool,
	pub control_protection_fault:bool,
	#[bits(42)] rsvd2:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64LocalApicEmulationMode(pub u32);

impl WHvX64LocalApicEmulationMode
{
	pub const NONE:Self=Self(0);
	pub const XAPIC:Self=Self(1);
	pub const X2APIC:Self=Self(2);
}

#[repr(C)] pub union WHVPartitionProperty
{
	pub extended_vm_exits:WHvExtendedVmExits,
	pub processor_features:WHvX64ProcessorFeatures,
	pub synthetic_processor_features_banks:WHvSyntheticProcessorFeaturesBanks,
	pub clflush_size:u8,
	pub processor_count:u32,
	pub separate_security_domain:bool,
	pub nested_virtualization:bool,
	pub processor_clock_frequency:u64,
	pub processor_feature_banks:WHvProcessorFeatureBanks,
	pub reference_time:u64,
	pub primary_numa_node:u16,
	pub cpu_reserve:u32,
	pub cpu_cap:u32,
	pub cpu_weight:u32,
	pub cpu_group_id:u64,
	pub processor_frequency_cap:u32,
	pub allow_device_assignment:bool,
	pub disable_smt:bool,
	pub physical_address_width:u32,
	pub processor_xsave_features:WHvProcessorXsaveFeatures,
	pub cpuid_exit_list:[u32;1],
	pub exception_exit_bitmap:u64,
	pub apic_remote_read:bool,
	pub x64_msr_exit_bitmap:WHvX64MsrExitBitmap,
	pub processor_perfmon_features:WHvProcessorPerfmonFeatures,
	pub interrupt_clock_frequency:u64,
	pub cpuid_result_list:[WHvX64CpuidResult;1],
	pub cpuid_result_list2:[WHvX64CpuidResult2;1],
	pub msr_action_list:[WHvMsrAction;1],
	pub unimplemented_msr_action:u8,
	pub local_apic_emulation_mode:WHvX64LocalApicEmulationMode,
}

#[derive(PartialEq, PartialOrd, Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvRunVpExitReason(pub u32);

impl WHvRunVpExitReason
{
	pub const NONE:Self=Self(0);

	// Standard Exits caused by operations of the virtual processor.
	pub const MEMORY_ACCESS:Self=Self(0x00000001);
	pub const X64_IO_PORT_ACCESS:Self=Self(0x00000002);
	pub const UNRECOVERABLE_EXCEPTION:Self=Self(0x00000004);
	pub const INVALID_VP_REGISTER_VALUE:Self=Self(0x00000005);
	pub const UNSUPPORTED_FEATURE:Self=Self(0x00000006);
	pub const X64_INTERRUPT_WINDOW:Self=Self(0x00000007);
	pub const X64_HALT:Self=Self(0x00000008);
	pub const X64_APIC_EOI:Self=Self(0x00000009);
	pub const SYNIC_SINT_DELIVERABLE:Self=Self(0x0000000A);

	// Additional Exits that can be configured through partition properties.
	pub const X64_MSR_ACCESS:Self=Self(0x00001000);
	pub const X64_CPUID:Self=Self(0x00001001);
	pub const EXCEPTION:Self=Self(0x00001002);
	pub const X64_RDTSC:Self=Self(0x00001003);
	pub const X64_APIC_SMI_TRAP:Self=Self(0x00001004);
	pub const HYPERCALL:Self=Self(0x00001005);
	pub const X64_APIC_INIT_SIPI_TRAP:Self=Self(0x00001006);
	pub const X64_APIC_WRITE_TRAP:Self=Self(0x00001007);

	// Exits caused by the host.
	pub const CANCELLED:Self=Self(0x00002000);
}

#[bitfield(u32)] pub struct WHvX64VpExecutionState
{
	#[bits(2)] pub cpl:u8,
	pub cr0_pe:bool,
	pub cr0_am:bool,
	pub efer_lma:bool,
	pub debug_active:bool,
	pub interruption_pending:bool,
	#[bits(5)] rsvd0:u8,
	pub interrupt_shadow:bool,
	#[bits(3)] rsvd1:u8,
	#[bits(4)] pub instruction_length:u8,
	#[bits(4)] pub cr8:u64,
	rsvd2:u8
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64VpExitContext
{
	pub execution_state:WHvX64VpExecutionState,
	rsvd:u32,
	pub cs:WHvX64SegmentRegister,
	pub rip:u64,
	pub rflags:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSynicSintDeliverbleContext
{
	pub deliverable_sints:u16,
	rsvd1:u16,
	rsvd2:u32
}

#[bitfield(u32)] pub struct WHvMemoryAccessInfo
{
	#[bits(2)] pub access_type:u8,
	pub gpa_unmapped:bool,
	pub gva_valid:bool,
	#[bits(28)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvMemoryAccessContext
{
	pub fetched_bytes:u8,
	rsvd:[u8;3],
	pub instruction_bytes:[u8;16],
	pub access_info:WHvMemoryAccessInfo,
	pub gpa:u64,
	pub gva:u64
}

#[bitfield(u32)] pub struct WHvX64IoPortAccessInfo
{
	pub is_write:bool,
	#[bits(3)] pub access_size:usize,
	pub string_op:bool,
	pub rep_prefix:bool,
	#[bits(26)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64IoPortAccessContext
{
	pub fetched_bytes:u8,
	rsvd:[u8;3],
	pub instruction_bytes:[u8;16],
	access_info:WHvX64IoPortAccessInfo,
	pub port:u16,
	rsvd2:[u16;3],
	pub rax:u64,
	pub rcx:u64,
	pub rsi:u64,
	pub rdi:u64,
	pub ds:WHvX64SegmentRegister,
	pub es:WHvX64SegmentRegister,
}

#[bitfield(u32)] pub struct WHvX64MsrAccessInfo
{
	pub is_write:bool,
	#[bits(31)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64MsrAccessContext
{
	pub access_info:WHvX64MsrAccessInfo,
	pub msr_index:u32,
	pub rax:u64,
	pub rdx:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64CpuidAccessContext
{
	pub rax:u64,
	pub rbx:u64,
	pub rcx:u64,
	pub rdx:u64,
	pub default_result_rax:u64,
	pub default_result_rbx:u64,
	pub default_result_rcx:u64,
	pub default_result_rdx:u64
}

#[bitfield(u32)] pub struct WHvVpExceptionInfo
{
	pub error_code_valid:bool,
	pub software_exception:bool,
	#[bits(30)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpExceptionContext
{
	pub fetched_bytes:u8,
	rsvd:[u8;3],
	pub instruction_bytes:[u8;16],
	pub exception_info:WHvVpExceptionInfo,
	rsvd2:[u8;3],
	pub error_code:u32,
	pub exception_parameter:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64UnsupportedFeatureCode(pub u32);

impl WHvX64UnsupportedFeatureCode
{
	pub const INTERCEPT:Self=Self(1);
	pub const TASK_SWITCH_TSS:Self=Self(2);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64UnsupportedFeatureContext
{
	pub feature_code:WHvX64UnsupportedFeatureCode,
	rsvd:u32,
	pub feature_parameter:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64InterruptionDeliverableContext
{
	pub deliverable_type:u32
}

impl WHvX64InterruptionDeliverableContext
{
	pub const PENDING_INTERRUPT:u32=0;
	pub const PENDING_NMI:u32=2;
	pub const PENDING_EXCEPTION:u32=3;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64ApicEoiContext
{
	pub interrupt_vector:u32,
}

#[bitfield(u64)] pub struct WHvX64RdtscInfo
{
	pub is_rdtscp:bool,
	#[bits(63)] rsvd:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64RdtscContext
{
	pub tsc_aux:u64,
	pub virtual_offset:u64,
	pub tsc:u64,
	pub reference_time:u64,
	pub rdtsc_info:WHvX64RdtscInfo,
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64ApicSmiContext
{
	pub apic_icr:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64HypercallContext
{
	pub rax:u64,
	pub rbx:u64,
	pub rcx:u64,
	pub rdx:u64,
	pub r8:u64,
	pub rsi:u64,
	pub rdi:u64,
	rsvd0:u64,
	pub xmm:[u128;6],
	rsvd1:[u64;2]
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64ApicInitSipiContext
{
	pub apic_icr:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvX64ApicWriteContext
{
	pub write_type:u32,
	rsvd:u32,
	pub write_value:u64
}

impl WHvX64ApicWriteContext
{
	pub const WRITE_TYPE_LDR:u32=0x0D0;
	pub const WRITE_TYPE_DFR:u32=0x0E0;
	pub const WRITE_TYPE_SVR:u32=0x0F0;
	pub const WRITE_TYPE_LINT0:u32=0x350;
	pub const WRITE_TYPE_LINT1:u32=0x360;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvRunVpCancelledContext
{
	pub cancel_reason:u32
}

impl WHvRunVpCancelledContext
{
	pub const REASON_USER:u32=0;
}

#[derive(Clone, Copy)]
#[repr(C)] pub union WHvX64RunVpExitContextUnion
{
	pub memory_access:WHvMemoryAccessContext,
	pub cancel_reason:WHvRunVpCancelledContext,
	pub hypercall:WHvX64HypercallContext,
	pub synic_sint_deliverable:WHvSynicSintDeliverbleContext,
	pub io_port_access:WHvX64IoPortAccessContext,
	pub msr_access:WHvX64MsrAccessContext,
	pub cpuid_access:WHvX64CpuidAccessContext,
	pub vp_exception:WHvVpExceptionContext,
	pub interruption_window:WHvX64InterruptionDeliverableContext,
	pub unsupported_feature:WHvX64UnsupportedFeatureContext,
	pub apic_eoi:WHvX64ApicEoiContext,
	pub rdtsc:WHvX64RdtscContext,
	pub apic_smi:WHvX64ApicSmiContext,
	pub apic_init_sipi:WHvX64ApicInitSipiContext,
	pub apic_write:WHvX64ApicWriteContext,
	pub as_u64:[u64;22]
}

impl Default for WHvX64RunVpExitContextUnion
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Clone, Copy)]
#[repr(C)] pub struct WHvRunVpExitContext
{
	pub exit_reason:WHvRunVpExitReason,
	rsvd:u32,
	pub vp_context:WHvX64VpExitContext,
	#[cfg(target_arch = "x86_64")]
	pub exit_context:WHvX64RunVpExitContextUnion
}

#[bitfield(u128)] pub struct WHvX64InterruptControl
{
	pub interrupt_type:u8,
	#[bits(4)] pub destination_type:u8,
	#[bits(4)] pub trigger_mode:u8,
	pub target_vtl:u8,
	#[bits(40)] rsvd:u64,
	pub destination:u32,
	pub vector:u32
}

impl WHvX64InterruptControl
{
	pub const INTERRUPT_TYPE_FIXED:u8=0;
	pub const INTERRUPT_TYPE_LOWEST_PRIORITY:u8=1;
	pub const INTERRUPT_TYPE_SMI:u8=2;
	pub const INTERRUPT_TYPE_NMI:u8=4;
	pub const INTERRUPT_TYPE_INIT:u8=5;
	pub const INTERRUPT_TYPE_SIPI:u8=6;
	pub const INTERRUPT_TYPE_LOCAL_INT1:u8=9;

	pub const DESTINATION_MODE_LOGICAL:u8=0;
	pub const DESTINATION_MODE_PHYSICAL:u8=1;

	pub const TRIGGER_MODE_EDGE:u8=0;
	pub const TRIGGER_MODE_LEVEL:u8=1;
}

#[bitfield(u32)] pub struct WHvDoorbellMatchFlags
{
	pub match_on_value:bool,
	pub match_on_length:bool,
	#[bits(30)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvDoorbellMatchData
{
	pub guest_physical_address:u64,
	pub value:u64,
	pub length:u32,
	pub flags:WHvDoorbellMatchFlags
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvPartitionCounterSet(pub u32);

impl WHvPartitionCounterSet
{
	pub const MEMORY:Self=Self(0);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvPartitionMemoryCounters
{
	pub mapped_4k_pages:u64,
	pub mapped_2m_pages:u64,
	pub mapped_1g_pages:u64,
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorCounterSet(pub u32);

impl WHvProcessorCounterSet
{
	pub const RUNTIME:Self=Self(0);
	pub const INTERCEPTS:Self=Self(1);
	pub const EVENTS:Self=Self(2);
	pub const APIC:Self=Self(3);
	pub const SYNTHETIC_FEATURES:Self=Self(4);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorRuntimeCounters
{
	pub total_runtime_100ns:u64,
	pub hypervisor_runtime_100ns:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorInterceptCounter
{
	pub count:u64,
	pub time_100ns:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorInterceptCounters
{
	pub page_invalidations:WHvProcessorInterceptCounter,
	pub control_register_accesses:WHvProcessorInterceptCounter,
	pub io_instructions:WHvProcessorInterceptCounter,
	pub halt_instructions:WHvProcessorInterceptCounter,
	pub cpuid_instructions:WHvProcessorInterceptCounter,
	pub msr_accesses:WHvProcessorInterceptCounter,
	pub other_intercepts:WHvProcessorInterceptCounter,
	pub pending_interrupts:WHvProcessorInterceptCounter,
	pub emulated_instructions:WHvProcessorInterceptCounter,
	pub debug_register_accesses:WHvProcessorInterceptCounter,
	pub page_fault_intercepts:WHvProcessorInterceptCounter,
	pub nested_page_fault_intercepts:WHvProcessorInterceptCounter,
	pub hypercalls:WHvProcessorInterceptCounter,
	pub rdpmc_instructions:WHvProcessorInterceptCounter
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorEventCounters
{
	pub page_fault_count:u64,
	pub exception_count:u64,
	pub interrupt_count:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorApicCounters
{
	pub mmio_access_count:u64,
	pub eoi_access_count:u64,
	pub tpr_access_count:u64,
	pub sent_ipi_count:u64,
	pub self_ipi_count:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvProcessorSyntheticFeatureCounters
{
	pub synthetic_interrupts_count:u64,
	pub long_spin_wait_hypercalls_count:u64,
	pub other_hypercalls_count:u64,
	pub synthetic_interrupt_hypercalls_count:u64,
	pub virtual_interrupt_hypercalls_count:u64,
	pub virtual_mmu_hypercalls_count:u64
}

#[derive(Clone, Copy)]
#[repr(C)] pub union WHvVtlPermissionSet
{
	pub as_u32:u32,
	pub vtl_permission_from1:[u16;2]
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvAdviseGpaRangeCode(pub u32);

impl WHvAdviseGpaRangeCode
{
	pub const POPULATE:Self=Self(0);
	pub const PIN:Self=Self(1);
	pub const UNPIN:Self=Self(2);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVirtualProcessorStateType(pub u32);

impl WHvVirtualProcessorStateType
{
	pub const SYNIC_MESSAGE_PAGE:Self=Self(0x00000001);
	pub const SYNIC_EVENT_FLAGS_PAGE:Self=Self(0x00000002);
	pub const SYNIC_TIMER_STATE:Self=Self(0x00000003);
	
	pub const INTERRUPT_CONTROLLER_STATE2:Self=Self(0x00001000);
	pub const XSAVE_STATE:Self=Self(0x00001001);
	pub const NESTED_STATE:Self=Self(0x00001002);
}

#[bitfield(u64)] pub struct WHvNestedEnlightenmentsControl
{
	pub direct_hypercall:bool,
	pub virtualization_exception:bool,
	#[bits(30)] rsvd0:u32,
	pub inter_partition_communication:bool,
	#[bits(31)] rsvd1:u32
}

#[bitfield(u32)] pub struct WHvX64VmxNestedFlags
{
	pub guest_mode:bool,
	pub vmxon:bool,
	pub current_vmcs_valid:bool,
	pub vmentry_pending:bool,
	pub vmcs_enlightened:bool,
	pub enlightened_vmentry:bool,
	#[bits(26)] rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C,align(4096))] pub struct WHvX64VmxNestedState
{
	pub vendor:u32,
	pub flags:WHvX64VmxNestedFlags,
	pub nested_enlightenments_control:WHvNestedEnlightenmentsControl,
	pub pdpt:[u64;4],
	pub vmxon_region_gpa:u64,
	pub vmcs_gpa:u64,
	pub current_enlightened_vmcs_gpa:u64,
	pub virtual_tpr:u32,
	pub virtual_ppr:u32,
	pub virtual_isr:[u32;8],
	pub virtual_irr:[u32;8],
	pub virtual_icr_lo:u32,
	pub virtual_icr_hi:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSvmVmcbSegment
{
	pub selector:u16,
	pub attrib:u16,
	pub limit:u32,
	pub base:u64
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSvmNestedHostState
{
	pub rip:u64,
	pub rsp:u64,
	pub rflags:u64,
	pub rax:u64,
	pub es:WHvSvmVmcbSegment,
	pub cs:WHvSvmVmcbSegment,
	pub ss:WHvSvmVmcbSegment,
	pub ds:WHvSvmVmcbSegment,
	pub gdtr:WHvSvmVmcbSegment,
	pub idtr:WHvSvmVmcbSegment,
	pub efer:u64,
	pub cr0:u64,
	pub cr3:u64,
	pub cr4:u64,
	pub virtual_tpr:u64,
	rsvd:[u64;6]
}

#[bitfield(u32)] pub struct WHvSvmNestedFlags
{
	pub guest_mode:bool,
	pub vmrun_pending:bool,
	pub host_save_gpa_valid:bool,
	pub current_vmcb_valid:bool,
	#[bits(28)] rsvd:u32
}

#[derive(Debug, Clone, Copy)]
#[repr(C,align(4096))] pub struct WHvX64SvmNestedState
{
	pub vendor:u32,
	pub flags:WHvSvmNestedFlags,
	pub nested_enlightenments_control:WHvNestedEnlightenmentsControl,
	pub host_save_gpa:u64,
	pub vmcr_msr:u64,
	pub virtual_tsc_ratio:u64,
	pub vmcb_gpa:u64,
	pub host_state:WHvSvmNestedHostState,
	rsvd:[u8;3832],
	pub vmcb_bytes:[u8;4096]
}

impl Default for WHvX64SvmNestedState
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Clone, Copy)]
#[repr(C)] pub union WHvNestedState
{
	pub vmx:WHvX64VmxNestedState,
	pub svm:WHvX64SvmNestedState
}

impl Default for WHvNestedState
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSynicEventParameters
{
	pub vp_index:u32,
	pub target_sint:u8,
	pub target_vtl:u8,
	pub flag_number:u16
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvAllocateVpciResourceFlags(pub u32);

impl WHvAllocateVpciResourceFlags
{
	pub const NONE:Self=Self(0);
	pub const ALLOW_DIRECT_P2P:Self=Self(0x1);
}

#[derive(Debug, Clone, Copy)]
#[repr(C)] pub struct WHvSriovResourceDescriptor
{
	pub pnp_instance_id:[u16;200],
	pub virtual_function_id_lo:u32,
	pub virtual_function_id_hi:u32,
	pub virtual_function_index:u16,
	rsvd:u16
}

impl Default for WHvSriovResourceDescriptor
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciDeviceNotification
{
	pub notification_type:u32,
	rsvd1:u32,
	rsvd2:u64
}

impl WHvVpciDeviceNotification
{
	pub const NOTIFICATION_UNDEFINED:u32=0;
	pub const NOTIFICATION_MMIO_REMAPPING:u32=1;
	pub const NOTIFICATION_SURPRISE_REMOVAL:u32=2;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvCreateVpciDeviceFlags(pub u32);

impl WHvCreateVpciDeviceFlags
{
	pub const NONE:Self=Self(0);
	pub const PHYSICALLY_BACKED:Self=Self(0x1);
	pub const USE_LOGICAL_INTERRUPTS:Self=Self(0x2);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciDevicePropertyCode(pub u32);

impl WHvVpciDevicePropertyCode
{
	pub const UNDEFINED:Self=Self(0);
	pub const HARDWARE_IDS:Self=Self(1);
	pub const PROBED_BARS:Self=Self(2);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciHardwareIds
{
	pub vendor_id:u16,
	pub device_id:u16,
	pub revision_id:u8,
	pub prog_if:u8,
	pub subclass:u8,
	pub base_class:u8,
	pub subsystem_vendor_id:u16,
	pub subsystem_device_id:u16
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciProbedBars(pub [u32;6]);

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciDeviceRegisterSpace(pub u32);

impl WHvVpciDeviceRegisterSpace
{
	pub const CONFIG_SPACE:Self=Self(u32::MAX);
	pub const BAR0:Self=Self(0);
	pub const BAR1:Self=Self(1);
	pub const BAR2:Self=Self(2);
	pub const BAR3:Self=Self(3);
	pub const BAR4:Self=Self(4);
	pub const BAR5:Self=Self(5);
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciMmioMapping
{
	pub location:WHvVpciDeviceRegisterSpace,
	pub flags:u32,
	pub size_in_bytes:u64,
	pub offset_in_bytes:u64,
	pub virtual_address:*mut core::ffi::c_void
}

impl WHvVpciMmioMapping
{
	pub const FLAG_READ_ACCESS:u32=1;
	pub const FLAG_WRITE_ACCESS:u32=2;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciDeviceRegister
{
	pub location:WHvVpciDeviceRegisterSpace,
	pub size_in_bytes:u32,
	pub offset_in_bytes:u64,
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciInterruptTarget
{
	pub vector:u32,
	pub flags:u32,
	pub processor_count:u32,
	pub processors:[u32;1]
}

impl WHvVpciInterruptTarget
{
	pub const FLAG_NONE:u32=0;
	pub const FLAG_MULTICAST:u32=0x1;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVpciDeviceInterruptParameter
{
	pub logical_device_id:u64,
	pub msi_address:u64,
	pub msi_data:u32,
	rsvd:u32
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct DevicePowerState(pub u32);

impl DevicePowerState
{
	pub const UNSPECIFIED:Self=Self(0);
	pub const D0:Self=Self(1);
	pub const D1:Self=Self(2);
	pub const D2:Self=Self(3);
	pub const D3:Self=Self(4);
	pub const MAXIMUM:Self=Self(5);
}

pub type WHvTriggerHandle=*mut core::ffi::c_void;

#[derive(Clone, Copy)]
#[repr(C,packed(8))] pub union WHvTriggerParametersUnion
{
	#[cfg(target_arch = "x86_64")]
	pub interrupt:WHvX64InterruptControl,
	pub synic_event:WHvSynicEventParameters,
	pub device_interrupt:WHvVpciDeviceInterruptParameter
}

impl Default for WHvTriggerParametersUnion
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Clone, Copy)]
#[repr(C,packed(8))] pub struct WHvTriggerParameters
{
	pub trigger_type:u32,
	rsvd:u32,
	pub event:WHvTriggerParametersUnion
}

impl WHvTriggerParameters
{
	pub const TRIGGER_TYPE_INTERRUPT:u32=0;
	pub const SYNIC_EVENT:u32=1;
	pub const DEVICE_INTERRUPT:u32=2;
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvVirtualProcessorProperty
{
	pub property_code:u32,
	rsvd:u32,
	pub numa_node:u16,
	padding:[u16;3]
}

impl WHvVirtualProcessorProperty
{
	pub const CODE_NUMA_NODE:u32=0;
}

#[derive(Clone, Copy)]
#[repr(C)] pub union WHvNotificationPortParameterUnion
{
	pub doorbell:WHvDoorbellMatchData,
	pub connection_id:u32
}

impl Default for WHvNotificationPortParameterUnion
{
	fn default()->Self
	{
		unsafe
		{
			core::mem::zeroed()
		}
	}
}

#[derive(Default, Clone, Copy)]
#[repr(C)] pub struct WHvNotificationPortParameters
{
	pub notification_port_type:u32,
	rsvd0:u16,
	rsvd1:u8,
	pub connection_vtl:u8,
	pub u:WHvNotificationPortParameterUnion
}

#[derive(Default, Debug, Clone, Copy)]
#[repr(C)] pub struct WHvNotificationPortPropertyCode(pub u32);

impl WHvNotificationPortPropertyCode
{
	pub const PREFERRED_TARGET_VTL:Self=Self(1);
	pub const PREFERRED_TARGET_DURATION:Self=Self(5);
}

pub type WHvNotificationPortProperty=u64;

pub const WHV_ANY_VP:u32=u32::MAX;

pub const WHV_NOTIFICIATION_PORT_PREFERRED_DURATION_MAX:u64=u64::MAX;

pub type WHvNotificationPortHandle=*mut core::ffi::c_void;

pub const WHV_SYNIC_MESSAGE_SIZE:usize=256;