vyre 0.4.0

GPU compute intermediate representation with a standard operation library
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

schema_version = 1

id = "workgroup.queue_fifo"
archetype = "workgroup-coordinated-sequential"
display_name = "workgroup.queue_fifo"
summary = "Bounded FIFO queue stored in workgroup SRAM with atomic tail reservation."
category = "C"

[intrinsic]
wgsl = "workgroup_queue_fifo_enqueue"
operations = [
  "workgroup_queue_fifo_enqueue",
  "workgroup_queue_fifo_dequeue",
  "workgroup_queue_fifo_len",
  "workgroup_queue_fifo_is_empty",
]

[signature]
inputs = ["U32", "U32"]
outputs = ["U32", "U32"]
handle = "U32"
value_type = "U32"

laws = [
  "Deterministic",
  "WorkgroupInvariant",
  "BoundedCapacity",
  "QueueFifoTotalOrderPreserving",
  "QueueEnqueueThenDequeueIdentityWhenEmpty",
]
equivalence_classes = ["empty", "single_enqueue", "wraparound", "overflow", "multi_producer_tail"]
workgroup_size = [64, 1, 1]
capacity = 256
tags = ["workgroup", "queue", "fifo", "sram", "atomic-tail", "category-c"]
fixtures_dir = "fixtures/"