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//! IntelĀ® 64 and IA-32 Architectures Software Developer's Manual: 29.4.3.1 Operations that Invalidate Cached Mappings
//!
//! The INVEPT instruction invalidates entries in the translation lookaside buffer (TLB) and other processor structures
//! that cache translations derived from EPT. It's used to ensure that modifications to EPT entries don't cause
//! inconsistencies due to stale cached translations.
/// Represents the types of INVEPT operations.
/// Executes the INVEPT instruction.
///
/// # Arguments
/// * `invept_type` - The type of INVEPT operation to perform.
/// * `eptp` - The EPT pointer used for Single Context INVEPT. It should be a 64-bit value formed by
/// concatenating the EPTP's memory type (bits 2:0), page-walk length (bits 5:3), and address of the EPTP
/// (bits 63:12). For All Contexts INVEPT, this value is ignored.
///
/// # Safety
/// This function is unsafe because it involves inline assembly and direct interaction with CPU features.
/// Invalidates entries in the TLB and other processor structures that cache translations derived from EPT.
///
/// This function is used to ensure that modifications to EPT entries don't cause inconsistencies due to
/// stale cached translations. It specifically invalidates mappings associated with a single EPTP value.
///
/// # Arguments
/// * `eptp` - The Extended Page Table Pointer used for Single Context INVEPT.
/// It should be a 64-bit value formed by concatenating the EPTP's memory type (bits 2:0),
/// page-walk length (bits 5:3), and address of the EPTP (bits 63:12).
/// Invalidates entries in the TLB and other processor structures that cache translations derived from EPT
/// for all EPTP values.
///
/// This function is used to invalidate guest-physical mappings and combined mappings associated with all
/// EPT Pointer Table Roots (EPTRTAs) and, for combined mappings, for all VPIDs and PCIDs.